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64 lines
1.5 KiB
Plaintext
64 lines
1.5 KiB
Plaintext
* Board Control and Status (BCSR)
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Required properties:
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- compatible : Should be "fsl,<board>-bcsr"
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- reg : Offset and length of the register set for the device
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Example:
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bcsr@f8000000 {
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compatible = "fsl,mpc8360mds-bcsr";
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reg = <f8000000 8000>;
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};
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* Freescale on board FPGA
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This is the memory-mapped registers for on board FPGA.
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Required properities:
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- compatible : should be "fsl,fpga-pixis".
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- reg : should contain the address and the length of the FPPGA register
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set.
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- interrupt-parent: should specify phandle for the interrupt controller.
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- interrupts : should specify event (wakeup) IRQ.
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Example (MPC8610HPCD):
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board-control@e8000000 {
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compatible = "fsl,fpga-pixis";
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reg = <0xe8000000 32>;
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interrupt-parent = <&mpic>;
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interrupts = <8 8>;
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};
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* Freescale BCSR GPIO banks
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Some BCSR registers act as simple GPIO controllers, each such
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register can be represented by the gpio-controller node.
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Required properities:
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- compatible : Should be "fsl,<board>-bcsr-gpio".
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- reg : Should contain the address and the length of the GPIO bank
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register.
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- #gpio-cells : Should be two. The first cell is the pin number and the
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second cell is used to specify optional parameters (currently unused).
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- gpio-controller : Marks the port as GPIO controller.
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Example:
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bcsr@1,0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "fsl,mpc8360mds-bcsr";
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reg = <1 0 0x8000>;
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ranges = <0 1 0 0x8000>;
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bcsr13: gpio-controller@d {
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#gpio-cells = <2>;
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compatible = "fsl,mpc8360mds-bcsr-gpio";
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reg = <0xd 1>;
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gpio-controller;
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};
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};
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