mirror of https://gitee.com/openkylin/linux.git
132 lines
3.2 KiB
C
132 lines
3.2 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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/*
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* Copyright (c) 2016 BayLibre, SAS.
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* Author: Neil Armstrong <narmstrong@baylibre.com>
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*/
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#include <linux/platform_device.h>
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#include <linux/mfd/syscon.h>
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#include "clk-regmap.h"
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#include "meson-aoclk.h"
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#include "gxbb-aoclk.h"
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#define GXBB_AO_GATE(_name, _bit) \
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static struct clk_regmap _name##_ao = { \
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.data = &(struct clk_regmap_gate_data) { \
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.offset = AO_RTI_GEN_CNTL_REG0, \
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.bit_idx = (_bit), \
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}, \
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.hw.init = &(struct clk_init_data) { \
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.name = #_name "_ao", \
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.ops = &clk_regmap_gate_ops, \
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.parent_names = (const char *[]){ "clk81" }, \
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.num_parents = 1, \
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.flags = CLK_IGNORE_UNUSED, \
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}, \
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}
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GXBB_AO_GATE(remote, 0);
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GXBB_AO_GATE(i2c_master, 1);
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GXBB_AO_GATE(i2c_slave, 2);
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GXBB_AO_GATE(uart1, 3);
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GXBB_AO_GATE(uart2, 5);
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GXBB_AO_GATE(ir_blaster, 6);
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static struct aoclk_cec_32k cec_32k_ao = {
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.hw.init = &(struct clk_init_data) {
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.name = "cec_32k_ao",
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.ops = &meson_aoclk_cec_32k_ops,
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.parent_names = (const char *[]){ "xtal" },
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.num_parents = 1,
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.flags = CLK_IGNORE_UNUSED,
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},
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};
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static const unsigned int gxbb_aoclk_reset[] = {
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[RESET_AO_REMOTE] = 16,
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[RESET_AO_I2C_MASTER] = 18,
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[RESET_AO_I2C_SLAVE] = 19,
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[RESET_AO_UART1] = 17,
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[RESET_AO_UART2] = 22,
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[RESET_AO_IR_BLASTER] = 23,
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};
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static struct clk_regmap *gxbb_aoclk_gate[] = {
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[CLKID_AO_REMOTE] = &remote_ao,
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[CLKID_AO_I2C_MASTER] = &i2c_master_ao,
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[CLKID_AO_I2C_SLAVE] = &i2c_slave_ao,
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[CLKID_AO_UART1] = &uart1_ao,
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[CLKID_AO_UART2] = &uart2_ao,
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[CLKID_AO_IR_BLASTER] = &ir_blaster_ao,
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};
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static const struct clk_hw_onecell_data gxbb_aoclk_onecell_data = {
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.hws = {
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[CLKID_AO_REMOTE] = &remote_ao.hw,
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[CLKID_AO_I2C_MASTER] = &i2c_master_ao.hw,
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[CLKID_AO_I2C_SLAVE] = &i2c_slave_ao.hw,
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[CLKID_AO_UART1] = &uart1_ao.hw,
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[CLKID_AO_UART2] = &uart2_ao.hw,
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[CLKID_AO_IR_BLASTER] = &ir_blaster_ao.hw,
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[CLKID_AO_CEC_32K] = &cec_32k_ao.hw,
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},
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.num = NR_CLKS,
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};
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static int gxbb_register_cec_ao_32k(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct regmap *regmap;
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int ret;
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regmap = syscon_node_to_regmap(of_get_parent(dev->of_node));
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if (IS_ERR(regmap)) {
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dev_err(dev, "failed to get regmap\n");
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return PTR_ERR(regmap);
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}
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/* Specific clocks */
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cec_32k_ao.regmap = regmap;
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ret = devm_clk_hw_register(dev, &cec_32k_ao.hw);
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if (ret) {
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dev_err(&pdev->dev, "clk cec_32k_ao register failed.\n");
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return ret;
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}
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return 0;
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}
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static const struct meson_aoclk_data gxbb_aoclkc_data = {
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.reset_reg = AO_RTI_GEN_CNTL_REG0,
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.num_reset = ARRAY_SIZE(gxbb_aoclk_reset),
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.reset = gxbb_aoclk_reset,
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.num_clks = ARRAY_SIZE(gxbb_aoclk_gate),
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.clks = gxbb_aoclk_gate,
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.hw_data = &gxbb_aoclk_onecell_data,
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};
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static int gxbb_aoclkc_probe(struct platform_device *pdev)
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{
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int ret = gxbb_register_cec_ao_32k(pdev);
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if (ret)
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return ret;
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return meson_aoclkc_probe(pdev);
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}
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static const struct of_device_id gxbb_aoclkc_match_table[] = {
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{
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.compatible = "amlogic,meson-gx-aoclkc",
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.data = &gxbb_aoclkc_data,
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},
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{ }
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};
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static struct platform_driver gxbb_aoclkc_driver = {
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.probe = gxbb_aoclkc_probe,
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.driver = {
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.name = "gxbb-aoclkc",
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.of_match_table = gxbb_aoclkc_match_table,
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},
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};
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builtin_platform_driver(gxbb_aoclkc_driver);
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