mirror of https://gitee.com/openkylin/linux.git
257 lines
6.5 KiB
C
257 lines
6.5 KiB
C
/* linux/arch/arm/mach-exynos4/cpuidle.c
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*
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* Copyright (c) 2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/cpuidle.h>
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#include <linux/cpu_pm.h>
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#include <linux/io.h>
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#include <linux/export.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <linux/platform_device.h>
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#include <asm/proc-fns.h>
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#include <asm/smp_scu.h>
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#include <asm/suspend.h>
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#include <asm/unified.h>
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#include <asm/cpuidle.h>
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#include <plat/cpu.h>
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#include <plat/pm.h>
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#include <mach/map.h>
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#include "common.h"
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#include "regs-pmu.h"
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#define REG_DIRECTGO_ADDR (samsung_rev() == EXYNOS4210_REV_1_1 ? \
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S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
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(S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
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#define REG_DIRECTGO_FLAG (samsung_rev() == EXYNOS4210_REV_1_1 ? \
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S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
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(S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
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#define S5P_CHECK_AFTR 0xFCBA0D10
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#define EXYNOS5_PWR_CTRL1 (S5P_VA_CMU + 0x01020)
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#define EXYNOS5_PWR_CTRL2 (S5P_VA_CMU + 0x01024)
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#define PWR_CTRL1_CORE2_DOWN_RATIO (7 << 28)
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#define PWR_CTRL1_CORE1_DOWN_RATIO (7 << 16)
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#define PWR_CTRL1_DIV2_DOWN_EN (1 << 9)
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#define PWR_CTRL1_DIV1_DOWN_EN (1 << 8)
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#define PWR_CTRL1_USE_CORE1_WFE (1 << 5)
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#define PWR_CTRL1_USE_CORE0_WFE (1 << 4)
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#define PWR_CTRL1_USE_CORE1_WFI (1 << 1)
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#define PWR_CTRL1_USE_CORE0_WFI (1 << 0)
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#define PWR_CTRL2_DIV2_UP_EN (1 << 25)
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#define PWR_CTRL2_DIV1_UP_EN (1 << 24)
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#define PWR_CTRL2_DUR_STANDBY2_VAL (1 << 16)
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#define PWR_CTRL2_DUR_STANDBY1_VAL (1 << 8)
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#define PWR_CTRL2_CORE2_UP_RATIO (1 << 4)
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#define PWR_CTRL2_CORE1_UP_RATIO (1 << 0)
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static int exynos4_enter_lowpower(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index);
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static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
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static struct cpuidle_driver exynos4_idle_driver = {
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.name = "exynos4_idle",
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.owner = THIS_MODULE,
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.states = {
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[0] = ARM_CPUIDLE_WFI_STATE,
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[1] = {
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.enter = exynos4_enter_lowpower,
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.exit_latency = 300,
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.target_residency = 100000,
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.flags = CPUIDLE_FLAG_TIME_VALID,
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.name = "C1",
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.desc = "ARM power down",
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},
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},
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.state_count = 2,
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.safe_state_index = 0,
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};
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/* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
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static void exynos4_set_wakeupmask(void)
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{
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__raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
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}
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static unsigned int g_pwr_ctrl, g_diag_reg;
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static void save_cpu_arch_register(void)
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{
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/*read power control register*/
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asm("mrc p15, 0, %0, c15, c0, 0" : "=r"(g_pwr_ctrl) : : "cc");
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/*read diagnostic register*/
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asm("mrc p15, 0, %0, c15, c0, 1" : "=r"(g_diag_reg) : : "cc");
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return;
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}
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static void restore_cpu_arch_register(void)
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{
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/*write power control register*/
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asm("mcr p15, 0, %0, c15, c0, 0" : : "r"(g_pwr_ctrl) : "cc");
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/*write diagnostic register*/
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asm("mcr p15, 0, %0, c15, c0, 1" : : "r"(g_diag_reg) : "cc");
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return;
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}
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static int idle_finisher(unsigned long flags)
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{
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cpu_do_idle();
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return 1;
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}
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static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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unsigned long tmp;
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exynos4_set_wakeupmask();
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/* Set value of power down register for aftr mode */
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exynos_sys_powerdown_conf(SYS_AFTR);
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__raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
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__raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
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save_cpu_arch_register();
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/* Setting Central Sequence Register for power down mode */
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tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
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tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
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__raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
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cpu_pm_enter();
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cpu_suspend(0, idle_finisher);
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#ifdef CONFIG_SMP
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if (!soc_is_exynos5250())
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scu_enable(S5P_VA_SCU);
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#endif
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cpu_pm_exit();
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restore_cpu_arch_register();
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/*
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* If PMU failed while entering sleep mode, WFI will be
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* ignored by PMU and then exiting cpu_do_idle().
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* S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
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* in this situation.
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*/
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tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
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if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
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tmp |= S5P_CENTRAL_LOWPWR_CFG;
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__raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
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}
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/* Clear wakeup state register */
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__raw_writel(0x0, S5P_WAKEUP_STAT);
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return index;
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}
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static int exynos4_enter_lowpower(struct cpuidle_device *dev,
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struct cpuidle_driver *drv,
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int index)
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{
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int new_index = index;
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/* AFTR can only be entered when cores other than CPU0 are offline */
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if (num_online_cpus() > 1 || dev->cpu != 0)
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new_index = drv->safe_state_index;
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if (new_index == 0)
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return arm_cpuidle_simple_enter(dev, drv, new_index);
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else
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return exynos4_enter_core0_aftr(dev, drv, new_index);
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}
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static void __init exynos5_core_down_clk(void)
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{
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unsigned int tmp;
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/*
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* Enable arm clock down (in idle) and set arm divider
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* ratios in WFI/WFE state.
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*/
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tmp = PWR_CTRL1_CORE2_DOWN_RATIO | \
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PWR_CTRL1_CORE1_DOWN_RATIO | \
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PWR_CTRL1_DIV2_DOWN_EN | \
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PWR_CTRL1_DIV1_DOWN_EN | \
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PWR_CTRL1_USE_CORE1_WFE | \
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PWR_CTRL1_USE_CORE0_WFE | \
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PWR_CTRL1_USE_CORE1_WFI | \
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PWR_CTRL1_USE_CORE0_WFI;
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__raw_writel(tmp, EXYNOS5_PWR_CTRL1);
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/*
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* Enable arm clock up (on exiting idle). Set arm divider
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* ratios when not in idle along with the standby duration
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* ratios.
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*/
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tmp = PWR_CTRL2_DIV2_UP_EN | \
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PWR_CTRL2_DIV1_UP_EN | \
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PWR_CTRL2_DUR_STANDBY2_VAL | \
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PWR_CTRL2_DUR_STANDBY1_VAL | \
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PWR_CTRL2_CORE2_UP_RATIO | \
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PWR_CTRL2_CORE1_UP_RATIO;
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__raw_writel(tmp, EXYNOS5_PWR_CTRL2);
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}
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static int exynos_cpuidle_probe(struct platform_device *pdev)
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{
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int cpu_id, ret;
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struct cpuidle_device *device;
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if (soc_is_exynos5250())
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exynos5_core_down_clk();
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if (soc_is_exynos5440())
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exynos4_idle_driver.state_count = 1;
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ret = cpuidle_register_driver(&exynos4_idle_driver);
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if (ret) {
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dev_err(&pdev->dev, "failed to register cpuidle driver\n");
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return ret;
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}
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for_each_online_cpu(cpu_id) {
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device = &per_cpu(exynos4_cpuidle_device, cpu_id);
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device->cpu = cpu_id;
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ret = cpuidle_register_device(device);
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if (ret) {
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dev_err(&pdev->dev, "failed to register cpuidle device\n");
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return ret;
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}
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}
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return 0;
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}
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static struct platform_driver exynos_cpuidle_driver = {
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.probe = exynos_cpuidle_probe,
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.driver = {
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.name = "exynos_cpuidle",
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.owner = THIS_MODULE,
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},
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};
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module_platform_driver(exynos_cpuidle_driver);
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