mirror of https://gitee.com/openkylin/linux.git
86 lines
3.5 KiB
C
86 lines
3.5 KiB
C
/*******************************************************************************
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Intel 82599 Virtual Function driver
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Copyright(c) 1999 - 2012 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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#ifndef _IXGBEVF_REGS_H_
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#define _IXGBEVF_REGS_H_
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#define IXGBE_VFCTRL 0x00000
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#define IXGBE_VFSTATUS 0x00008
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#define IXGBE_VFLINKS 0x00010
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#define IXGBE_VFFRTIMER 0x00048
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#define IXGBE_VFRXMEMWRAP 0x03190
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#define IXGBE_VTEICR 0x00100
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#define IXGBE_VTEICS 0x00104
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#define IXGBE_VTEIMS 0x00108
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#define IXGBE_VTEIMC 0x0010C
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#define IXGBE_VTEIAC 0x00110
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#define IXGBE_VTEIAM 0x00114
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#define IXGBE_VTEITR(x) (0x00820 + (4 * (x)))
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#define IXGBE_VTIVAR(x) (0x00120 + (4 * (x)))
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#define IXGBE_VTIVAR_MISC 0x00140
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#define IXGBE_VTRSCINT(x) (0x00180 + (4 * (x)))
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#define IXGBE_VFRDBAL(x) (0x01000 + (0x40 * (x)))
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#define IXGBE_VFRDBAH(x) (0x01004 + (0x40 * (x)))
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#define IXGBE_VFRDLEN(x) (0x01008 + (0x40 * (x)))
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#define IXGBE_VFRDH(x) (0x01010 + (0x40 * (x)))
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#define IXGBE_VFRDT(x) (0x01018 + (0x40 * (x)))
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#define IXGBE_VFRXDCTL(x) (0x01028 + (0x40 * (x)))
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#define IXGBE_VFSRRCTL(x) (0x01014 + (0x40 * (x)))
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#define IXGBE_VFRSCCTL(x) (0x0102C + (0x40 * (x)))
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#define IXGBE_VFPSRTYPE 0x00300
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#define IXGBE_VFTDBAL(x) (0x02000 + (0x40 * (x)))
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#define IXGBE_VFTDBAH(x) (0x02004 + (0x40 * (x)))
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#define IXGBE_VFTDLEN(x) (0x02008 + (0x40 * (x)))
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#define IXGBE_VFTDH(x) (0x02010 + (0x40 * (x)))
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#define IXGBE_VFTDT(x) (0x02018 + (0x40 * (x)))
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#define IXGBE_VFTXDCTL(x) (0x02028 + (0x40 * (x)))
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#define IXGBE_VFTDWBAL(x) (0x02038 + (0x40 * (x)))
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#define IXGBE_VFTDWBAH(x) (0x0203C + (0x40 * (x)))
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#define IXGBE_VFDCA_RXCTRL(x) (0x0100C + (0x40 * (x)))
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#define IXGBE_VFDCA_TXCTRL(x) (0x0200c + (0x40 * (x)))
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#define IXGBE_VFGPRC 0x0101C
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#define IXGBE_VFGPTC 0x0201C
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#define IXGBE_VFGORC_LSB 0x01020
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#define IXGBE_VFGORC_MSB 0x01024
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#define IXGBE_VFGOTC_LSB 0x02020
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#define IXGBE_VFGOTC_MSB 0x02024
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#define IXGBE_VFMPRC 0x01034
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#define IXGBE_WRITE_REG(a, reg, value) writel((value), ((a)->hw_addr + (reg)))
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#define IXGBE_READ_REG(a, reg) readl((a)->hw_addr + (reg))
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#define IXGBE_WRITE_REG_ARRAY(a, reg, offset, value) ( \
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writel((value), ((a)->hw_addr + (reg) + ((offset) << 2))))
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#define IXGBE_READ_REG_ARRAY(a, reg, offset) ( \
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readl((a)->hw_addr + (reg) + ((offset) << 2)))
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#define IXGBE_WRITE_FLUSH(a) (IXGBE_READ_REG(a, IXGBE_VFSTATUS))
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#endif /* _IXGBEVF_REGS_H_ */
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