mirror of https://gitee.com/openkylin/linux.git
257 lines
6.9 KiB
C
257 lines
6.9 KiB
C
/*
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* Copyright 2008 Advanced Micro Devices, Inc.
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* Copyright 2008 Red Hat Inc.
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* Copyright 2009 Jerome Glisse.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Dave Airlie
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* Alex Deucher
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* Jerome Glisse
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*/
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#include "drmP.h"
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#include "drm_crtc_helper.h"
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#include "radeon_drm.h"
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#include "radeon_reg.h"
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#include "radeon.h"
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#include "atom.h"
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irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
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{
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struct drm_device *dev = (struct drm_device *) arg;
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struct radeon_device *rdev = dev->dev_private;
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return radeon_irq_process(rdev);
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}
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/*
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* Handle hotplug events outside the interrupt handler proper.
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*/
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static void radeon_hotplug_work_func(struct work_struct *work)
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{
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struct radeon_device *rdev = container_of(work, struct radeon_device,
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hotplug_work);
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struct drm_device *dev = rdev->ddev;
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struct drm_mode_config *mode_config = &dev->mode_config;
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struct drm_connector *connector;
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if (mode_config->num_connector) {
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list_for_each_entry(connector, &mode_config->connector_list, head)
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radeon_connector_hotplug(connector);
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}
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/* Just fire off a uevent and let userspace tell us what to do */
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drm_helper_hpd_irq_event(dev);
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}
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void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
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{
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struct radeon_device *rdev = dev->dev_private;
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unsigned i;
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/* Disable *all* interrupts */
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for (i = 0; i < RADEON_NUM_RINGS; i++)
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rdev->irq.sw_int[i] = false;
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rdev->irq.gui_idle = false;
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for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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rdev->irq.hpd[i] = false;
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for (i = 0; i < RADEON_MAX_CRTCS; i++) {
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rdev->irq.crtc_vblank_int[i] = false;
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rdev->irq.pflip[i] = false;
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}
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radeon_irq_set(rdev);
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/* Clear bits */
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radeon_irq_process(rdev);
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}
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int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
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{
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struct radeon_device *rdev = dev->dev_private;
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unsigned i;
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dev->max_vblank_count = 0x001fffff;
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for (i = 0; i < RADEON_NUM_RINGS; i++)
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rdev->irq.sw_int[i] = true;
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radeon_irq_set(rdev);
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return 0;
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}
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void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
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{
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struct radeon_device *rdev = dev->dev_private;
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unsigned i;
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if (rdev == NULL) {
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return;
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}
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/* Disable *all* interrupts */
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for (i = 0; i < RADEON_NUM_RINGS; i++)
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rdev->irq.sw_int[i] = false;
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rdev->irq.gui_idle = false;
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for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
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rdev->irq.hpd[i] = false;
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for (i = 0; i < RADEON_MAX_CRTCS; i++) {
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rdev->irq.crtc_vblank_int[i] = false;
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rdev->irq.pflip[i] = false;
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}
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radeon_irq_set(rdev);
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}
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static bool radeon_msi_ok(struct radeon_device *rdev)
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{
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/* RV370/RV380 was first asic with MSI support */
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if (rdev->family < CHIP_RV380)
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return false;
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/* MSIs don't work on AGP */
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if (rdev->flags & RADEON_IS_AGP)
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return false;
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/* force MSI on */
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if (radeon_msi == 1)
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return true;
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else if (radeon_msi == 0)
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return false;
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/* Quirks */
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/* HP RS690 only seems to work with MSIs. */
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if ((rdev->pdev->device == 0x791f) &&
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(rdev->pdev->subsystem_vendor == 0x103c) &&
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(rdev->pdev->subsystem_device == 0x30c2))
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return true;
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/* Dell RS690 only seems to work with MSIs. */
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if ((rdev->pdev->device == 0x791f) &&
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(rdev->pdev->subsystem_vendor == 0x1028) &&
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(rdev->pdev->subsystem_device == 0x01fd))
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return true;
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if (rdev->flags & RADEON_IS_IGP) {
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/* APUs work fine with MSIs */
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if (rdev->family >= CHIP_PALM)
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return true;
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/* lots of IGPs have problems with MSIs */
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return false;
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}
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return true;
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}
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int radeon_irq_kms_init(struct radeon_device *rdev)
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{
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int i;
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int r = 0;
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INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
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spin_lock_init(&rdev->irq.sw_lock);
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for (i = 0; i < rdev->num_crtc; i++)
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spin_lock_init(&rdev->irq.pflip_lock[i]);
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r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
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if (r) {
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return r;
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}
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/* enable msi */
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rdev->msi_enabled = 0;
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if (radeon_msi_ok(rdev)) {
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int ret = pci_enable_msi(rdev->pdev);
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if (!ret) {
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rdev->msi_enabled = 1;
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dev_info(rdev->dev, "radeon: using MSI.\n");
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}
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}
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rdev->irq.installed = true;
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r = drm_irq_install(rdev->ddev);
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if (r) {
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rdev->irq.installed = false;
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return r;
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}
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DRM_INFO("radeon: irq initialized.\n");
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return 0;
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}
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void radeon_irq_kms_fini(struct radeon_device *rdev)
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{
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drm_vblank_cleanup(rdev->ddev);
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if (rdev->irq.installed) {
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drm_irq_uninstall(rdev->ddev);
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rdev->irq.installed = false;
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if (rdev->msi_enabled)
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pci_disable_msi(rdev->pdev);
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}
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flush_work_sync(&rdev->hotplug_work);
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}
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void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
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{
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unsigned long irqflags;
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spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
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if (rdev->ddev->irq_enabled && (++rdev->irq.sw_refcount[ring] == 1)) {
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rdev->irq.sw_int[ring] = true;
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radeon_irq_set(rdev);
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}
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spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
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}
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void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
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{
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unsigned long irqflags;
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spin_lock_irqsave(&rdev->irq.sw_lock, irqflags);
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BUG_ON(rdev->ddev->irq_enabled && rdev->irq.sw_refcount[ring] <= 0);
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if (rdev->ddev->irq_enabled && (--rdev->irq.sw_refcount[ring] == 0)) {
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rdev->irq.sw_int[ring] = false;
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radeon_irq_set(rdev);
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}
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spin_unlock_irqrestore(&rdev->irq.sw_lock, irqflags);
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}
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void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
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{
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unsigned long irqflags;
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if (crtc < 0 || crtc >= rdev->num_crtc)
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return;
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spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
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if (rdev->ddev->irq_enabled && (++rdev->irq.pflip_refcount[crtc] == 1)) {
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rdev->irq.pflip[crtc] = true;
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radeon_irq_set(rdev);
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}
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spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
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}
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void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
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{
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unsigned long irqflags;
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if (crtc < 0 || crtc >= rdev->num_crtc)
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return;
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spin_lock_irqsave(&rdev->irq.pflip_lock[crtc], irqflags);
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BUG_ON(rdev->ddev->irq_enabled && rdev->irq.pflip_refcount[crtc] <= 0);
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if (rdev->ddev->irq_enabled && (--rdev->irq.pflip_refcount[crtc] == 0)) {
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rdev->irq.pflip[crtc] = false;
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radeon_irq_set(rdev);
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}
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spin_unlock_irqrestore(&rdev->irq.pflip_lock[crtc], irqflags);
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}
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