mirror of https://gitee.com/openkylin/linux.git
655 lines
20 KiB
C
655 lines
20 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Machine check exception handling CPU-side for power7 and power8
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*
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* Copyright 2013 IBM Corporation
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* Author: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
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*/
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#undef DEBUG
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#define pr_fmt(fmt) "mce_power: " fmt
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#include <linux/types.h>
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#include <linux/ptrace.h>
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#include <linux/extable.h>
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#include <asm/mmu.h>
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#include <asm/mce.h>
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#include <asm/machdep.h>
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#include <asm/pgtable.h>
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#include <asm/pte-walk.h>
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#include <asm/sstep.h>
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#include <asm/exception-64s.h>
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#include <asm/extable.h>
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/*
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* Convert an address related to an mm to a PFN. NOTE: we are in real
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* mode, we could potentially race with page table updates.
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*/
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unsigned long addr_to_pfn(struct pt_regs *regs, unsigned long addr)
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{
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pte_t *ptep;
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unsigned int shift;
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unsigned long pfn, flags;
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struct mm_struct *mm;
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if (user_mode(regs))
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mm = current->mm;
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else
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mm = &init_mm;
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local_irq_save(flags);
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ptep = __find_linux_pte(mm->pgd, addr, NULL, &shift);
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if (!ptep || pte_special(*ptep)) {
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pfn = ULONG_MAX;
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goto out;
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}
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if (shift <= PAGE_SHIFT)
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pfn = pte_pfn(*ptep);
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else {
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unsigned long rpnmask = (1ul << shift) - PAGE_SIZE;
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pfn = pte_pfn(__pte(pte_val(*ptep) | (addr & rpnmask)));
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}
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out:
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local_irq_restore(flags);
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return pfn;
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}
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/* flush SLBs and reload */
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#ifdef CONFIG_PPC_BOOK3S_64
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void flush_and_reload_slb(void)
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{
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/* Invalidate all SLBs */
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slb_flush_all_realmode();
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#ifdef CONFIG_KVM_BOOK3S_HANDLER
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/*
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* If machine check is hit when in guest or in transition, we will
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* only flush the SLBs and continue.
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*/
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if (get_paca()->kvm_hstate.in_guest)
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return;
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#endif
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if (early_radix_enabled())
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return;
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/*
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* This probably shouldn't happen, but it may be possible it's
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* called in early boot before SLB shadows are allocated.
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*/
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if (!get_slb_shadow())
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return;
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slb_restore_bolted_realmode();
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}
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#endif
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static void flush_erat(void)
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{
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#ifdef CONFIG_PPC_BOOK3S_64
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if (!early_cpu_has_feature(CPU_FTR_ARCH_300)) {
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flush_and_reload_slb();
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return;
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}
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#endif
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asm volatile(PPC_ISA_3_0_INVALIDATE_ERAT : : :"memory");
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}
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#define MCE_FLUSH_SLB 1
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#define MCE_FLUSH_TLB 2
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#define MCE_FLUSH_ERAT 3
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static int mce_flush(int what)
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{
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#ifdef CONFIG_PPC_BOOK3S_64
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if (what == MCE_FLUSH_SLB) {
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flush_and_reload_slb();
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return 1;
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}
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#endif
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if (what == MCE_FLUSH_ERAT) {
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flush_erat();
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return 1;
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}
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if (what == MCE_FLUSH_TLB) {
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tlbiel_all();
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return 1;
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}
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return 0;
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}
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#define SRR1_MC_LOADSTORE(srr1) ((srr1) & PPC_BIT(42))
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struct mce_ierror_table {
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unsigned long srr1_mask;
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unsigned long srr1_value;
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bool nip_valid; /* nip is a valid indicator of faulting address */
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unsigned int error_type;
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unsigned int error_subtype;
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unsigned int error_class;
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unsigned int initiator;
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unsigned int severity;
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bool sync_error;
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};
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static const struct mce_ierror_table mce_p7_ierror_table[] = {
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{ 0x00000000001c0000, 0x0000000000040000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000001c0000, 0x0000000000080000, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000001c0000, 0x00000000000c0000, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000001c0000, 0x0000000000100000, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_INDETERMINATE, /* BOTH */
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MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000001c0000, 0x0000000000140000, true,
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MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000001c0000, 0x0000000000180000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000001c0000, 0x00000000001c0000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0, 0, 0, 0, 0, 0, 0 } };
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static const struct mce_ierror_table mce_p8_ierror_table[] = {
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{ 0x00000000081c0000, 0x0000000000040000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000000080000, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x00000000000c0000, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x0000000000100000, true,
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MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x0000000000140000, true,
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MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x0000000000180000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x00000000001c0000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000008000000, true,
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MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_IFETCH_TIMEOUT, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000008040000, true,
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MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0, 0, 0, 0, 0, 0, 0 } };
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static const struct mce_ierror_table mce_p9_ierror_table[] = {
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{ 0x00000000081c0000, 0x0000000000040000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_IFETCH, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000000080000, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x00000000000c0000, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x0000000000100000, true,
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MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x0000000000140000, true,
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MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000000081c0000, 0x0000000000180000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x00000000001c0000, true,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH_FOREIGN, MCE_ECLASS_SOFTWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000008000000, true,
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MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_IFETCH_TIMEOUT, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000008040000, true,
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MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_PAGE_TABLE_WALK_IFETCH_TIMEOUT,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x00000000080c0000, true,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_IFETCH, MCE_ECLASS_SOFTWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000008100000, true,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH, MCE_ECLASS_SOFTWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000000081c0000, 0x0000000008140000, false,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_STORE, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_FATAL, false }, /* ASYNC is fatal */
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{ 0x00000000081c0000, 0x0000000008180000, false,
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MCE_ERROR_TYPE_LINK,MCE_LINK_ERROR_STORE_TIMEOUT,
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MCE_INITIATOR_CPU, MCE_SEV_FATAL, false }, /* ASYNC is fatal */
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{ 0x00000000081c0000, 0x00000000081c0000, true, MCE_ECLASS_HARDWARE,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_IFETCH_FOREIGN,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0, 0, 0, 0, 0, 0, 0 } };
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struct mce_derror_table {
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unsigned long dsisr_value;
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bool dar_valid; /* dar is a valid indicator of faulting address */
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unsigned int error_type;
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unsigned int error_subtype;
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unsigned int error_class;
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unsigned int initiator;
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unsigned int severity;
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bool sync_error;
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};
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static const struct mce_derror_table mce_p7_derror_table[] = {
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{ 0x00008000, false,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00004000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000800, true,
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MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000400, true,
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MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000100, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000040, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_INDETERMINATE, /* BOTH */
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MCE_ECLASS_HARD_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0, false, 0, 0, 0, 0, 0 } };
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static const struct mce_derror_table mce_p8_derror_table[] = {
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{ 0x00008000, false,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00004000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00002000, true,
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MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_LOAD_TIMEOUT, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00001000, true,
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MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_PAGE_TABLE_WALK_LOAD_STORE_TIMEOUT,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000800, true,
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MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000400, true,
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MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000200, true,
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MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, /* SECONDARY ERAT */
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MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */
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MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000100, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0, false, 0, 0, 0, 0, 0 } };
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static const struct mce_derror_table mce_p9_derror_table[] = {
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{ 0x00008000, false,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_LOAD_STORE, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00004000, true,
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MCE_ERROR_TYPE_UE, MCE_UE_ERROR_PAGE_TABLE_WALK_LOAD_STORE,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00002000, true,
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MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_LOAD_TIMEOUT, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00001000, true,
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MCE_ERROR_TYPE_LINK, MCE_LINK_ERROR_PAGE_TABLE_WALK_LOAD_STORE_TIMEOUT,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000800, true,
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MCE_ERROR_TYPE_ERAT, MCE_ERAT_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000400, true,
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MCE_ERROR_TYPE_TLB, MCE_TLB_ERROR_MULTIHIT, MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000200, false,
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MCE_ERROR_TYPE_USER, MCE_USER_ERROR_TLBIE, MCE_ECLASS_SOFTWARE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000080, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_MULTIHIT, /* Before PARITY */
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MCE_ECLASS_SOFT_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_WARNING, true },
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{ 0x00000100, true,
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MCE_ERROR_TYPE_SLB, MCE_SLB_ERROR_PARITY, MCE_ECLASS_HARD_INDETERMINATE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000040, true,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000020, false,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000010, false,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_PAGE_TABLE_WALK_LOAD_STORE_FOREIGN,
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MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0x00000008, false,
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MCE_ERROR_TYPE_RA, MCE_RA_ERROR_LOAD_STORE_FOREIGN, MCE_ECLASS_HARDWARE,
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MCE_INITIATOR_CPU, MCE_SEV_SEVERE, true },
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{ 0, false, 0, 0, 0, 0, 0 } };
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static int mce_find_instr_ea_and_phys(struct pt_regs *regs, uint64_t *addr,
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uint64_t *phys_addr)
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{
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/*
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* Carefully look at the NIP to determine
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* the instruction to analyse. Reading the NIP
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* in real-mode is tricky and can lead to recursive
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* faults
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*/
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int instr;
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unsigned long pfn, instr_addr;
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struct instruction_op op;
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struct pt_regs tmp = *regs;
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pfn = addr_to_pfn(regs, regs->nip);
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if (pfn != ULONG_MAX) {
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instr_addr = (pfn << PAGE_SHIFT) + (regs->nip & ~PAGE_MASK);
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instr = *(unsigned int *)(instr_addr);
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if (!analyse_instr(&op, &tmp, instr)) {
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pfn = addr_to_pfn(regs, op.ea);
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*addr = op.ea;
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*phys_addr = (pfn << PAGE_SHIFT);
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return 0;
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}
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/*
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* analyse_instr() might fail if the instruction
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* is not a load/store, although this is unexpected
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* for load/store errors or if we got the NIP
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* wrong
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*/
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}
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*addr = 0;
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return -1;
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}
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static int mce_handle_ierror(struct pt_regs *regs,
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const struct mce_ierror_table table[],
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struct mce_error_info *mce_err, uint64_t *addr,
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uint64_t *phys_addr)
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{
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uint64_t srr1 = regs->msr;
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int handled = 0;
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int i;
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*addr = 0;
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for (i = 0; table[i].srr1_mask; i++) {
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if ((srr1 & table[i].srr1_mask) != table[i].srr1_value)
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continue;
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/* attempt to correct the error */
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switch (table[i].error_type) {
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case MCE_ERROR_TYPE_SLB:
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if (local_paca->in_mce == 1)
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slb_save_contents(local_paca->mce_faulty_slbs);
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handled = mce_flush(MCE_FLUSH_SLB);
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break;
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case MCE_ERROR_TYPE_ERAT:
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handled = mce_flush(MCE_FLUSH_ERAT);
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break;
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case MCE_ERROR_TYPE_TLB:
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handled = mce_flush(MCE_FLUSH_TLB);
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break;
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}
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/* now fill in mce_error_info */
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mce_err->error_type = table[i].error_type;
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mce_err->error_class = table[i].error_class;
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switch (table[i].error_type) {
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case MCE_ERROR_TYPE_UE:
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mce_err->u.ue_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_SLB:
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mce_err->u.slb_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_ERAT:
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mce_err->u.erat_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_TLB:
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mce_err->u.tlb_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_USER:
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mce_err->u.user_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_RA:
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mce_err->u.ra_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_LINK:
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mce_err->u.link_error_type = table[i].error_subtype;
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break;
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}
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mce_err->sync_error = table[i].sync_error;
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mce_err->severity = table[i].severity;
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mce_err->initiator = table[i].initiator;
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if (table[i].nip_valid) {
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*addr = regs->nip;
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if (mce_err->sync_error &&
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table[i].error_type == MCE_ERROR_TYPE_UE) {
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unsigned long pfn;
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if (get_paca()->in_mce < MAX_MCE_DEPTH) {
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pfn = addr_to_pfn(regs, regs->nip);
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if (pfn != ULONG_MAX) {
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*phys_addr =
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(pfn << PAGE_SHIFT);
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}
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}
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}
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}
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return handled;
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}
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mce_err->error_type = MCE_ERROR_TYPE_UNKNOWN;
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mce_err->error_class = MCE_ECLASS_UNKNOWN;
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mce_err->severity = MCE_SEV_SEVERE;
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mce_err->initiator = MCE_INITIATOR_CPU;
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mce_err->sync_error = true;
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return 0;
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}
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static int mce_handle_derror(struct pt_regs *regs,
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const struct mce_derror_table table[],
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struct mce_error_info *mce_err, uint64_t *addr,
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uint64_t *phys_addr)
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{
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uint64_t dsisr = regs->dsisr;
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int handled = 0;
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int found = 0;
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int i;
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*addr = 0;
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for (i = 0; table[i].dsisr_value; i++) {
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if (!(dsisr & table[i].dsisr_value))
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continue;
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/* attempt to correct the error */
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switch (table[i].error_type) {
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case MCE_ERROR_TYPE_SLB:
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if (local_paca->in_mce == 1)
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slb_save_contents(local_paca->mce_faulty_slbs);
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if (mce_flush(MCE_FLUSH_SLB))
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handled = 1;
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break;
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case MCE_ERROR_TYPE_ERAT:
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if (mce_flush(MCE_FLUSH_ERAT))
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handled = 1;
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break;
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case MCE_ERROR_TYPE_TLB:
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if (mce_flush(MCE_FLUSH_TLB))
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handled = 1;
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break;
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}
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/*
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* Attempt to handle multiple conditions, but only return
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* one. Ensure uncorrectable errors are first in the table
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* to match.
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*/
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if (found)
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continue;
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/* now fill in mce_error_info */
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mce_err->error_type = table[i].error_type;
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mce_err->error_class = table[i].error_class;
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switch (table[i].error_type) {
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case MCE_ERROR_TYPE_UE:
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mce_err->u.ue_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_SLB:
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mce_err->u.slb_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_ERAT:
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mce_err->u.erat_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_TLB:
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mce_err->u.tlb_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_USER:
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mce_err->u.user_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_RA:
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mce_err->u.ra_error_type = table[i].error_subtype;
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break;
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case MCE_ERROR_TYPE_LINK:
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mce_err->u.link_error_type = table[i].error_subtype;
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break;
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}
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mce_err->sync_error = table[i].sync_error;
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mce_err->severity = table[i].severity;
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mce_err->initiator = table[i].initiator;
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if (table[i].dar_valid)
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*addr = regs->dar;
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else if (mce_err->sync_error &&
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table[i].error_type == MCE_ERROR_TYPE_UE) {
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/*
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* We do a maximum of 4 nested MCE calls, see
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* kernel/exception-64s.h
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*/
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if (get_paca()->in_mce < MAX_MCE_DEPTH)
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mce_find_instr_ea_and_phys(regs, addr,
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phys_addr);
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}
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found = 1;
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}
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if (found)
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return handled;
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mce_err->error_type = MCE_ERROR_TYPE_UNKNOWN;
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mce_err->error_class = MCE_ECLASS_UNKNOWN;
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mce_err->severity = MCE_SEV_SEVERE;
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mce_err->initiator = MCE_INITIATOR_CPU;
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mce_err->sync_error = true;
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return 0;
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}
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static long mce_handle_ue_error(struct pt_regs *regs,
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struct mce_error_info *mce_err)
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{
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long handled = 0;
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mce_common_process_ue(regs, mce_err);
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if (mce_err->ignore_event)
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return 1;
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/*
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* On specific SCOM read via MMIO we may get a machine check
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* exception with SRR0 pointing inside opal. If that is the
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* case OPAL may have recovery address to re-read SCOM data in
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* different way and hence we can recover from this MC.
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*/
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if (ppc_md.mce_check_early_recovery) {
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if (ppc_md.mce_check_early_recovery(regs))
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handled = 1;
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}
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return handled;
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}
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static long mce_handle_error(struct pt_regs *regs,
|
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const struct mce_derror_table dtable[],
|
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const struct mce_ierror_table itable[])
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{
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struct mce_error_info mce_err = { 0 };
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uint64_t addr, phys_addr = ULONG_MAX;
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uint64_t srr1 = regs->msr;
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long handled;
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if (SRR1_MC_LOADSTORE(srr1))
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handled = mce_handle_derror(regs, dtable, &mce_err, &addr,
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&phys_addr);
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else
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handled = mce_handle_ierror(regs, itable, &mce_err, &addr,
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&phys_addr);
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if (!handled && mce_err.error_type == MCE_ERROR_TYPE_UE)
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handled = mce_handle_ue_error(regs, &mce_err);
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save_mce_event(regs, handled, &mce_err, regs->nip, addr, phys_addr);
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return handled;
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}
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long __machine_check_early_realmode_p7(struct pt_regs *regs)
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{
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/* P7 DD1 leaves top bits of DSISR undefined */
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regs->dsisr &= 0x0000ffff;
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return mce_handle_error(regs, mce_p7_derror_table, mce_p7_ierror_table);
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}
|
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long __machine_check_early_realmode_p8(struct pt_regs *regs)
|
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{
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return mce_handle_error(regs, mce_p8_derror_table, mce_p8_ierror_table);
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}
|
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long __machine_check_early_realmode_p9(struct pt_regs *regs)
|
|
{
|
|
/*
|
|
* On POWER9 DD2.1 and below, it's possible to get a machine check
|
|
* caused by a paste instruction where only DSISR bit 25 is set. This
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|
* will result in the MCE handler seeing an unknown event and the kernel
|
|
* crashing. An MCE that occurs like this is spurious, so we don't need
|
|
* to do anything in terms of servicing it. If there is something that
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* needs to be serviced, the CPU will raise the MCE again with the
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* correct DSISR so that it can be serviced properly. So detect this
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* case and mark it as handled.
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|
*/
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if (SRR1_MC_LOADSTORE(regs->msr) && regs->dsisr == 0x02000000)
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return 1;
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return mce_handle_error(regs, mce_p9_derror_table, mce_p9_ierror_table);
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|
}
|