mirror of https://gitee.com/openkylin/linux.git
149 lines
3.9 KiB
C
149 lines
3.9 KiB
C
/*
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* Copyright (c) 2010 Atheros Communications Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "hw.h"
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#include "ar9003_phy.h"
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/**
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* ar9003_hw_set_channel - set channel on single-chip device
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* @ah: atheros hardware structure
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* @chan:
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*
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* This is the function to change channel on single-chip devices, that is
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* all devices after ar9280.
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*
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* This function takes the channel value in MHz and sets
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* hardware channel value. Assumes writes have been enabled to analog bus.
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*
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* Actual Expression,
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*
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* For 2GHz channel,
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* Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
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* (freq_ref = 40MHz)
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*
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* For 5GHz channel,
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* Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
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* (freq_ref = 40MHz/(24>>amodeRefSel))
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*
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* For 5GHz channels which are 5MHz spaced,
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* Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
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* (freq_ref = 40MHz)
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*/
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static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
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{
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/* TODO */
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return 0;
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}
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/**
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* ar9003_hw_spur_mitigate - convert baseband spur frequency
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* @ah: atheros hardware structure
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* @chan:
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*
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* For single-chip solutions. Converts to baseband spur frequency given the
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* input channel frequency and compute register settings below.
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*
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* Spur mitigation for MRC CCK
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*/
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static void ar9003_hw_spur_mitigate(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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/* TODO */
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}
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static u32 ar9003_hw_compute_pll_control(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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/* TODO */
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return 0;
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}
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static void ar9003_hw_set_channel_regs(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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/* TODO */
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}
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static void ar9003_hw_init_bb(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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/* TODO */
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}
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static int ar9003_hw_process_ini(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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/* TODO */
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return -1;
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}
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static void ar9003_hw_set_rfmode(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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/* TODO */
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}
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static void ar9003_hw_mark_phy_inactive(struct ath_hw *ah)
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{
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/* TODO */
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}
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static void ar9003_hw_set_delta_slope(struct ath_hw *ah,
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struct ath9k_channel *chan)
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{
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/* TODO */
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}
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static bool ar9003_hw_rfbus_req(struct ath_hw *ah)
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{
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/* TODO */
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return false;
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}
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static void ar9003_hw_rfbus_done(struct ath_hw *ah)
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{
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/* TODO */
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}
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static void ar9003_hw_enable_rfkill(struct ath_hw *ah)
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{
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/* TODO */
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}
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static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
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{
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/* TODO */
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}
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void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
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{
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struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
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priv_ops->rf_set_freq = ar9003_hw_set_channel;
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priv_ops->spur_mitigate_freq = ar9003_hw_spur_mitigate;
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priv_ops->compute_pll_control = ar9003_hw_compute_pll_control;
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priv_ops->set_channel_regs = ar9003_hw_set_channel_regs;
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priv_ops->init_bb = ar9003_hw_init_bb;
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priv_ops->process_ini = ar9003_hw_process_ini;
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priv_ops->set_rfmode = ar9003_hw_set_rfmode;
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priv_ops->mark_phy_inactive = ar9003_hw_mark_phy_inactive;
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priv_ops->set_delta_slope = ar9003_hw_set_delta_slope;
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priv_ops->rfbus_req = ar9003_hw_rfbus_req;
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priv_ops->rfbus_done = ar9003_hw_rfbus_done;
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priv_ops->enable_rfkill = ar9003_hw_enable_rfkill;
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priv_ops->set_diversity = ar9003_hw_set_diversity;
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}
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