mirror of https://gitee.com/openkylin/linux.git
717dab9d67
PHY regulators which are enabled from power_on() must be ON before turning-on clocks and initializing it as part of init(). As most of the core drivers perform power_on() after init(), move PHY regulators enable to com_init() and use power_on() to only enable pipe_clk. This pipe_clk is output from PHY and some core drivers e.g. PCIe follow specific sequence after phy_init() that mandates pipe_clk to be enabled from power_on() only. On similar lines move clk_enable from init() to com_init() which executes once for multi lane PHYs. Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| phy-qcom-apq8064-sata.c | ||
| phy-qcom-ipq806x-sata.c | ||
| phy-qcom-qmp.c | ||
| phy-qcom-qusb2.c | ||
| phy-qcom-ufs-i.h | ||
| phy-qcom-ufs-qmp-14nm.c | ||
| phy-qcom-ufs-qmp-14nm.h | ||
| phy-qcom-ufs-qmp-20nm.c | ||
| phy-qcom-ufs-qmp-20nm.h | ||
| phy-qcom-ufs.c | ||
| phy-qcom-usb-hs.c | ||
| phy-qcom-usb-hsic.c | ||