mirror of https://gitee.com/openkylin/linux.git
388 lines
9.8 KiB
C
388 lines
9.8 KiB
C
/*
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* The file intends to implement the platform dependent EEH operations on
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* powernv platform. Actually, the powernv was created in order to fully
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* hypervisor support.
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*
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* Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2013.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/atomic.h>
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#include <linux/delay.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/msi.h>
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#include <linux/of.h>
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#include <linux/pci.h>
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#include <linux/proc_fs.h>
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#include <linux/rbtree.h>
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <linux/spinlock.h>
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#include <asm/eeh.h>
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#include <asm/eeh_event.h>
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#include <asm/firmware.h>
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#include <asm/io.h>
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#include <asm/iommu.h>
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#include <asm/machdep.h>
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#include <asm/msi_bitmap.h>
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#include <asm/opal.h>
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#include <asm/ppc-pci.h>
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#include "powernv.h"
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#include "pci.h"
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/**
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* powernv_eeh_init - EEH platform dependent initialization
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*
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* EEH platform dependent initialization on powernv
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*/
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static int powernv_eeh_init(void)
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{
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/* We require OPALv3 */
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if (!firmware_has_feature(FW_FEATURE_OPALv3)) {
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pr_warning("%s: OPALv3 is required !\n", __func__);
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return -EINVAL;
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}
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/* Set EEH probe mode */
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eeh_probe_mode_set(EEH_PROBE_MODE_DEV);
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return 0;
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}
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/**
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* powernv_eeh_post_init - EEH platform dependent post initialization
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*
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* EEH platform dependent post initialization on powernv. When
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* the function is called, the EEH PEs and devices should have
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* been built. If the I/O cache staff has been built, EEH is
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* ready to supply service.
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*/
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static int powernv_eeh_post_init(void)
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{
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struct pci_controller *hose;
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struct pnv_phb *phb;
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int ret = 0;
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list_for_each_entry(hose, &hose_list, list_node) {
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phb = hose->private_data;
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if (phb->eeh_ops && phb->eeh_ops->post_init) {
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ret = phb->eeh_ops->post_init(hose);
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if (ret)
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break;
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}
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}
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return ret;
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}
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/**
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* powernv_eeh_dev_probe - Do probe on PCI device
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* @dev: PCI device
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* @flag: unused
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*
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* When EEH module is installed during system boot, all PCI devices
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* are checked one by one to see if it supports EEH. The function
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* is introduced for the purpose. By default, EEH has been enabled
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* on all PCI devices. That's to say, we only need do necessary
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* initialization on the corresponding eeh device and create PE
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* accordingly.
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*
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* It's notable that's unsafe to retrieve the EEH device through
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* the corresponding PCI device. During the PCI device hotplug, which
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* was possiblly triggered by EEH core, the binding between EEH device
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* and the PCI device isn't built yet.
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*/
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static int powernv_eeh_dev_probe(struct pci_dev *dev, void *flag)
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{
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struct pci_controller *hose = pci_bus_to_host(dev->bus);
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struct pnv_phb *phb = hose->private_data;
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struct device_node *dn = pci_device_to_OF_node(dev);
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struct eeh_dev *edev = of_node_to_eeh_dev(dn);
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/*
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* When probing the root bridge, which doesn't have any
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* subordinate PCI devices. We don't have OF node for
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* the root bridge. So it's not reasonable to continue
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* the probing.
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*/
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if (!dn || !edev || edev->pe)
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return 0;
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/* Skip for PCI-ISA bridge */
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if ((dev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
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return 0;
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/* Initialize eeh device */
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edev->class_code = dev->class;
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edev->mode &= 0xFFFFFF00;
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if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
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edev->mode |= EEH_DEV_BRIDGE;
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if (pci_is_pcie(dev)) {
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edev->pcie_cap = pci_pcie_cap(dev);
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if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT)
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edev->mode |= EEH_DEV_ROOT_PORT;
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else if (pci_pcie_type(dev) == PCI_EXP_TYPE_DOWNSTREAM)
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edev->mode |= EEH_DEV_DS_PORT;
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}
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edev->config_addr = ((dev->bus->number << 8) | dev->devfn);
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edev->pe_config_addr = phb->bdfn_to_pe(phb, dev->bus, dev->devfn & 0xff);
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/* Create PE */
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eeh_add_to_parent_pe(edev);
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/*
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* Enable EEH explicitly so that we will do EEH check
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* while accessing I/O stuff
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*/
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eeh_subsystem_enabled = 1;
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/* Save memory bars */
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eeh_save_bars(edev);
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return 0;
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}
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/**
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* powernv_eeh_set_option - Initialize EEH or MMIO/DMA reenable
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* @pe: EEH PE
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* @option: operation to be issued
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*
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* The function is used to control the EEH functionality globally.
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* Currently, following options are support according to PAPR:
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* Enable EEH, Disable EEH, Enable MMIO and Enable DMA
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*/
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static int powernv_eeh_set_option(struct eeh_pe *pe, int option)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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int ret = -EEXIST;
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/*
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* What we need do is pass it down for hardware
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* implementation to handle it.
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*/
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if (phb->eeh_ops && phb->eeh_ops->set_option)
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ret = phb->eeh_ops->set_option(pe, option);
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return ret;
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}
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/**
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* powernv_eeh_get_pe_addr - Retrieve PE address
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* @pe: EEH PE
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*
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* Retrieve the PE address according to the given tranditional
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* PCI BDF (Bus/Device/Function) address.
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*/
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static int powernv_eeh_get_pe_addr(struct eeh_pe *pe)
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{
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return pe->addr;
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}
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/**
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* powernv_eeh_get_state - Retrieve PE state
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* @pe: EEH PE
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* @delay: delay while PE state is temporarily unavailable
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*
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* Retrieve the state of the specified PE. For IODA-compitable
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* platform, it should be retrieved from IODA table. Therefore,
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* we prefer passing down to hardware implementation to handle
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* it.
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*/
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static int powernv_eeh_get_state(struct eeh_pe *pe, int *delay)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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int ret = EEH_STATE_NOT_SUPPORT;
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if (phb->eeh_ops && phb->eeh_ops->get_state) {
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ret = phb->eeh_ops->get_state(pe);
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/*
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* If the PE state is temporarily unavailable,
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* to inform the EEH core delay for default
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* period (1 second)
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*/
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if (delay) {
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*delay = 0;
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if (ret & EEH_STATE_UNAVAILABLE)
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*delay = 1000;
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}
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}
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return ret;
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}
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/**
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* powernv_eeh_reset - Reset the specified PE
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* @pe: EEH PE
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* @option: reset option
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*
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* Reset the specified PE
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*/
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static int powernv_eeh_reset(struct eeh_pe *pe, int option)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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int ret = -EEXIST;
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if (phb->eeh_ops && phb->eeh_ops->reset)
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ret = phb->eeh_ops->reset(pe, option);
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return ret;
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}
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/**
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* powernv_eeh_wait_state - Wait for PE state
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* @pe: EEH PE
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* @max_wait: maximal period in microsecond
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*
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* Wait for the state of associated PE. It might take some time
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* to retrieve the PE's state.
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*/
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static int powernv_eeh_wait_state(struct eeh_pe *pe, int max_wait)
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{
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int ret;
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int mwait;
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while (1) {
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ret = powernv_eeh_get_state(pe, &mwait);
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/*
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* If the PE's state is temporarily unavailable,
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* we have to wait for the specified time. Otherwise,
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* the PE's state will be returned immediately.
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*/
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if (ret != EEH_STATE_UNAVAILABLE)
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return ret;
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max_wait -= mwait;
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if (max_wait <= 0) {
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pr_warning("%s: Timeout getting PE#%x's state (%d)\n",
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__func__, pe->addr, max_wait);
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return EEH_STATE_NOT_SUPPORT;
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}
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msleep(mwait);
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}
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return EEH_STATE_NOT_SUPPORT;
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}
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/**
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* powernv_eeh_get_log - Retrieve error log
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* @pe: EEH PE
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* @severity: temporary or permanent error log
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* @drv_log: driver log to be combined with retrieved error log
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* @len: length of driver log
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*
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* Retrieve the temporary or permanent error from the PE.
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*/
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static int powernv_eeh_get_log(struct eeh_pe *pe, int severity,
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char *drv_log, unsigned long len)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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int ret = -EEXIST;
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if (phb->eeh_ops && phb->eeh_ops->get_log)
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ret = phb->eeh_ops->get_log(pe, severity, drv_log, len);
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return ret;
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}
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/**
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* powernv_eeh_configure_bridge - Configure PCI bridges in the indicated PE
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* @pe: EEH PE
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*
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* The function will be called to reconfigure the bridges included
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* in the specified PE so that the mulfunctional PE would be recovered
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* again.
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*/
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static int powernv_eeh_configure_bridge(struct eeh_pe *pe)
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{
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struct pci_controller *hose = pe->phb;
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struct pnv_phb *phb = hose->private_data;
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int ret = 0;
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if (phb->eeh_ops && phb->eeh_ops->configure_bridge)
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ret = phb->eeh_ops->configure_bridge(pe);
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return ret;
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}
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/**
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* powernv_eeh_next_error - Retrieve next EEH error to handle
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* @pe: Affected PE
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*
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* Using OPAL API, to retrieve next EEH error for EEH core to handle
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*/
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static int powernv_eeh_next_error(struct eeh_pe **pe)
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{
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struct pci_controller *hose;
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struct pnv_phb *phb = NULL;
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list_for_each_entry(hose, &hose_list, list_node) {
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phb = hose->private_data;
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break;
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}
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if (phb && phb->eeh_ops->next_error)
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return phb->eeh_ops->next_error(pe);
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return -EEXIST;
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}
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static struct eeh_ops powernv_eeh_ops = {
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.name = "powernv",
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.init = powernv_eeh_init,
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.post_init = powernv_eeh_post_init,
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.of_probe = NULL,
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.dev_probe = powernv_eeh_dev_probe,
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.set_option = powernv_eeh_set_option,
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.get_pe_addr = powernv_eeh_get_pe_addr,
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.get_state = powernv_eeh_get_state,
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.reset = powernv_eeh_reset,
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.wait_state = powernv_eeh_wait_state,
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.get_log = powernv_eeh_get_log,
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.configure_bridge = powernv_eeh_configure_bridge,
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.read_config = pnv_pci_cfg_read,
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.write_config = pnv_pci_cfg_write,
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.next_error = powernv_eeh_next_error
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};
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/**
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* eeh_powernv_init - Register platform dependent EEH operations
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*
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* EEH initialization on powernv platform. This function should be
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* called before any EEH related functions.
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*/
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static int __init eeh_powernv_init(void)
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{
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int ret = -EINVAL;
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if (!machine_is(powernv))
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return ret;
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ret = eeh_ops_register(&powernv_eeh_ops);
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if (!ret)
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pr_info("EEH: PowerNV platform initialized\n");
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else
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pr_info("EEH: Failed to initialize PowerNV platform (%d)\n", ret);
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return ret;
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}
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early_initcall(eeh_powernv_init);
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