mirror of https://gitee.com/openkylin/linux.git
597 lines
17 KiB
C
597 lines
17 KiB
C
/*
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* IIO driver for the ACCES 104-QUAD-8
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* Copyright (C) 2016 William Breathitt Gray
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* This driver supports the ACCES 104-QUAD-8 and ACCES 104-QUAD-4.
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*/
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/types.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/isa.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/types.h>
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#define QUAD8_EXTENT 32
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static unsigned int base[max_num_isa_dev(QUAD8_EXTENT)];
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static unsigned int num_quad8;
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module_param_array(base, uint, &num_quad8, 0);
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MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
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#define QUAD8_NUM_COUNTERS 8
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/**
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* struct quad8_iio - IIO device private data structure
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* @preset: array of preset values
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* @count_mode: array of count mode configurations
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* @quadrature_mode: array of quadrature mode configurations
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* @quadrature_scale: array of quadrature mode scale configurations
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* @ab_enable: array of A and B inputs enable configurations
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* @preset_enable: array of set_to_preset_on_index attribute configurations
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* @synchronous_mode: array of index function synchronous mode configurations
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* @index_polarity: array of index function polarity configurations
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* @base: base port address of the IIO device
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*/
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struct quad8_iio {
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unsigned int preset[QUAD8_NUM_COUNTERS];
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unsigned int count_mode[QUAD8_NUM_COUNTERS];
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unsigned int quadrature_mode[QUAD8_NUM_COUNTERS];
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unsigned int quadrature_scale[QUAD8_NUM_COUNTERS];
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unsigned int ab_enable[QUAD8_NUM_COUNTERS];
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unsigned int preset_enable[QUAD8_NUM_COUNTERS];
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unsigned int synchronous_mode[QUAD8_NUM_COUNTERS];
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unsigned int index_polarity[QUAD8_NUM_COUNTERS];
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unsigned int base;
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};
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static int quad8_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int *val, int *val2, long mask)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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const int base_offset = priv->base + 2 * chan->channel;
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unsigned int flags;
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unsigned int borrow;
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unsigned int carry;
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int i;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (chan->type == IIO_INDEX) {
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*val = !!(inb(priv->base + 0x16) & BIT(chan->channel));
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return IIO_VAL_INT;
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}
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flags = inb(base_offset + 1);
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borrow = flags & BIT(0);
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carry = !!(flags & BIT(1));
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/* Borrow XOR Carry effectively doubles count range */
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*val = (borrow ^ carry) << 24;
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/* Reset Byte Pointer; transfer Counter to Output Latch */
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outb(0x11, base_offset + 1);
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for (i = 0; i < 3; i++)
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*val |= (unsigned int)inb(base_offset) << (8 * i);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_ENABLE:
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*val = priv->ab_enable[chan->channel];
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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*val = 1;
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*val2 = priv->quadrature_scale[chan->channel];
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return IIO_VAL_FRACTIONAL_LOG2;
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}
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return -EINVAL;
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}
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static int quad8_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan, int val, int val2, long mask)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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const int base_offset = priv->base + 2 * chan->channel;
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int i;
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unsigned int ior_cfg;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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if (chan->type == IIO_INDEX)
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return -EINVAL;
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/* Only 24-bit values are supported */
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if ((unsigned int)val > 0xFFFFFF)
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return -EINVAL;
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/* Reset Byte Pointer */
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outb(0x01, base_offset + 1);
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/* Counter can only be set via Preset Register */
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for (i = 0; i < 3; i++)
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outb(val >> (8 * i), base_offset);
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/* Transfer Preset Register to Counter */
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outb(0x08, base_offset + 1);
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/* Reset Byte Pointer */
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outb(0x01, base_offset + 1);
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/* Set Preset Register back to original value */
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val = priv->preset[chan->channel];
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for (i = 0; i < 3; i++)
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outb(val >> (8 * i), base_offset);
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/* Reset Borrow, Carry, Compare, and Sign flags */
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outb(0x02, base_offset + 1);
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/* Reset Error flag */
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outb(0x06, base_offset + 1);
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return 0;
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case IIO_CHAN_INFO_ENABLE:
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/* only boolean values accepted */
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if (val < 0 || val > 1)
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return -EINVAL;
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priv->ab_enable[chan->channel] = val;
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ior_cfg = val | priv->preset_enable[chan->channel] << 1;
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/* Load I/O control configuration */
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outb(0x40 | ior_cfg, base_offset + 1);
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return 0;
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case IIO_CHAN_INFO_SCALE:
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/* Quadrature scaling only available in quadrature mode */
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if (!priv->quadrature_mode[chan->channel] && (val2 || val != 1))
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return -EINVAL;
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/* Only three gain states (1, 0.5, 0.25) */
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if (val == 1 && !val2)
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priv->quadrature_scale[chan->channel] = 0;
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else if (!val)
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switch (val2) {
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case 500000:
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priv->quadrature_scale[chan->channel] = 1;
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break;
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case 250000:
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priv->quadrature_scale[chan->channel] = 2;
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break;
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default:
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return -EINVAL;
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}
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else
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return -EINVAL;
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return 0;
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}
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return -EINVAL;
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}
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static const struct iio_info quad8_info = {
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.read_raw = quad8_read_raw,
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.write_raw = quad8_write_raw
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};
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static ssize_t quad8_read_preset(struct iio_dev *indio_dev, uintptr_t private,
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const struct iio_chan_spec *chan, char *buf)
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{
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const struct quad8_iio *const priv = iio_priv(indio_dev);
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return snprintf(buf, PAGE_SIZE, "%u\n", priv->preset[chan->channel]);
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}
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static ssize_t quad8_write_preset(struct iio_dev *indio_dev, uintptr_t private,
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const struct iio_chan_spec *chan, const char *buf, size_t len)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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const int base_offset = priv->base + 2 * chan->channel;
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unsigned int preset;
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int ret;
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int i;
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ret = kstrtouint(buf, 0, &preset);
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if (ret)
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return ret;
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/* Only 24-bit values are supported */
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if (preset > 0xFFFFFF)
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return -EINVAL;
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priv->preset[chan->channel] = preset;
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/* Reset Byte Pointer */
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outb(0x01, base_offset + 1);
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/* Set Preset Register */
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for (i = 0; i < 3; i++)
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outb(preset >> (8 * i), base_offset);
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return len;
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}
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static ssize_t quad8_read_set_to_preset_on_index(struct iio_dev *indio_dev,
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uintptr_t private, const struct iio_chan_spec *chan, char *buf)
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{
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const struct quad8_iio *const priv = iio_priv(indio_dev);
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return snprintf(buf, PAGE_SIZE, "%u\n",
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!priv->preset_enable[chan->channel]);
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}
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static ssize_t quad8_write_set_to_preset_on_index(struct iio_dev *indio_dev,
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uintptr_t private, const struct iio_chan_spec *chan, const char *buf,
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size_t len)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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const int base_offset = priv->base + 2 * chan->channel + 1;
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bool preset_enable;
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int ret;
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unsigned int ior_cfg;
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ret = kstrtobool(buf, &preset_enable);
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if (ret)
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return ret;
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/* Preset enable is active low in Input/Output Control register */
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preset_enable = !preset_enable;
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priv->preset_enable[chan->channel] = preset_enable;
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ior_cfg = priv->ab_enable[chan->channel] |
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(unsigned int)preset_enable << 1;
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/* Load I/O control configuration to Input / Output Control Register */
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outb(0x40 | ior_cfg, base_offset);
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return len;
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}
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static const char *const quad8_noise_error_states[] = {
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"No excessive noise is present at the count inputs",
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"Excessive noise is present at the count inputs"
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};
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static int quad8_get_noise_error(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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const int base_offset = priv->base + 2 * chan->channel + 1;
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return !!(inb(base_offset) & BIT(4));
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}
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static const struct iio_enum quad8_noise_error_enum = {
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.items = quad8_noise_error_states,
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.num_items = ARRAY_SIZE(quad8_noise_error_states),
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.get = quad8_get_noise_error
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};
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static const char *const quad8_count_direction_states[] = {
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"down",
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"up"
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};
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static int quad8_get_count_direction(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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const int base_offset = priv->base + 2 * chan->channel + 1;
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return !!(inb(base_offset) & BIT(5));
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}
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static const struct iio_enum quad8_count_direction_enum = {
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.items = quad8_count_direction_states,
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.num_items = ARRAY_SIZE(quad8_count_direction_states),
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.get = quad8_get_count_direction
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};
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static const char *const quad8_count_modes[] = {
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"normal",
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"range limit",
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"non-recycle",
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"modulo-n"
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};
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static int quad8_set_count_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, unsigned int count_mode)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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unsigned int mode_cfg = count_mode << 1;
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const int base_offset = priv->base + 2 * chan->channel + 1;
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priv->count_mode[chan->channel] = count_mode;
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/* Add quadrature mode configuration */
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if (priv->quadrature_mode[chan->channel])
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mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3;
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/* Load mode configuration to Counter Mode Register */
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outb(0x20 | mode_cfg, base_offset);
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return 0;
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}
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static int quad8_get_count_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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const struct quad8_iio *const priv = iio_priv(indio_dev);
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return priv->count_mode[chan->channel];
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}
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static const struct iio_enum quad8_count_mode_enum = {
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.items = quad8_count_modes,
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.num_items = ARRAY_SIZE(quad8_count_modes),
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.set = quad8_set_count_mode,
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.get = quad8_get_count_mode
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};
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static const char *const quad8_synchronous_modes[] = {
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"non-synchronous",
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"synchronous"
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};
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static int quad8_set_synchronous_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, unsigned int synchronous_mode)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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const unsigned int idr_cfg = synchronous_mode |
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priv->index_polarity[chan->channel] << 1;
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const int base_offset = priv->base + 2 * chan->channel + 1;
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/* Index function must be non-synchronous in non-quadrature mode */
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if (synchronous_mode && !priv->quadrature_mode[chan->channel])
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return -EINVAL;
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priv->synchronous_mode[chan->channel] = synchronous_mode;
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/* Load Index Control configuration to Index Control Register */
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outb(0x60 | idr_cfg, base_offset);
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return 0;
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}
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static int quad8_get_synchronous_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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const struct quad8_iio *const priv = iio_priv(indio_dev);
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return priv->synchronous_mode[chan->channel];
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}
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static const struct iio_enum quad8_synchronous_mode_enum = {
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.items = quad8_synchronous_modes,
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.num_items = ARRAY_SIZE(quad8_synchronous_modes),
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.set = quad8_set_synchronous_mode,
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.get = quad8_get_synchronous_mode
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};
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static const char *const quad8_quadrature_modes[] = {
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"non-quadrature",
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"quadrature"
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};
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static int quad8_set_quadrature_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, unsigned int quadrature_mode)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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unsigned int mode_cfg = priv->count_mode[chan->channel] << 1;
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const int base_offset = priv->base + 2 * chan->channel + 1;
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if (quadrature_mode)
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mode_cfg |= (priv->quadrature_scale[chan->channel] + 1) << 3;
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else {
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/* Quadrature scaling only available in quadrature mode */
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priv->quadrature_scale[chan->channel] = 0;
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/* Synchronous function not supported in non-quadrature mode */
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if (priv->synchronous_mode[chan->channel])
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quad8_set_synchronous_mode(indio_dev, chan, 0);
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}
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priv->quadrature_mode[chan->channel] = quadrature_mode;
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/* Load mode configuration to Counter Mode Register */
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outb(0x20 | mode_cfg, base_offset);
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return 0;
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}
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static int quad8_get_quadrature_mode(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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const struct quad8_iio *const priv = iio_priv(indio_dev);
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return priv->quadrature_mode[chan->channel];
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}
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static const struct iio_enum quad8_quadrature_mode_enum = {
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.items = quad8_quadrature_modes,
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.num_items = ARRAY_SIZE(quad8_quadrature_modes),
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.set = quad8_set_quadrature_mode,
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.get = quad8_get_quadrature_mode
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};
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static const char *const quad8_index_polarity_modes[] = {
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"negative",
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"positive"
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};
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static int quad8_set_index_polarity(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan, unsigned int index_polarity)
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{
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struct quad8_iio *const priv = iio_priv(indio_dev);
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const unsigned int idr_cfg = priv->synchronous_mode[chan->channel] |
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index_polarity << 1;
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const int base_offset = priv->base + 2 * chan->channel + 1;
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priv->index_polarity[chan->channel] = index_polarity;
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/* Load Index Control configuration to Index Control Register */
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outb(0x60 | idr_cfg, base_offset);
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return 0;
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}
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static int quad8_get_index_polarity(struct iio_dev *indio_dev,
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const struct iio_chan_spec *chan)
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{
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const struct quad8_iio *const priv = iio_priv(indio_dev);
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return priv->index_polarity[chan->channel];
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}
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static const struct iio_enum quad8_index_polarity_enum = {
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.items = quad8_index_polarity_modes,
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.num_items = ARRAY_SIZE(quad8_index_polarity_modes),
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.set = quad8_set_index_polarity,
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.get = quad8_get_index_polarity
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};
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static const struct iio_chan_spec_ext_info quad8_count_ext_info[] = {
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{
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.name = "preset",
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.shared = IIO_SEPARATE,
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.read = quad8_read_preset,
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.write = quad8_write_preset
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},
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{
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.name = "set_to_preset_on_index",
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.shared = IIO_SEPARATE,
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.read = quad8_read_set_to_preset_on_index,
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.write = quad8_write_set_to_preset_on_index
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},
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IIO_ENUM("noise_error", IIO_SEPARATE, &quad8_noise_error_enum),
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IIO_ENUM_AVAILABLE("noise_error", &quad8_noise_error_enum),
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IIO_ENUM("count_direction", IIO_SEPARATE, &quad8_count_direction_enum),
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IIO_ENUM_AVAILABLE("count_direction", &quad8_count_direction_enum),
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IIO_ENUM("count_mode", IIO_SEPARATE, &quad8_count_mode_enum),
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IIO_ENUM_AVAILABLE("count_mode", &quad8_count_mode_enum),
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IIO_ENUM("quadrature_mode", IIO_SEPARATE, &quad8_quadrature_mode_enum),
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IIO_ENUM_AVAILABLE("quadrature_mode", &quad8_quadrature_mode_enum),
|
|
{}
|
|
};
|
|
|
|
static const struct iio_chan_spec_ext_info quad8_index_ext_info[] = {
|
|
IIO_ENUM("synchronous_mode", IIO_SEPARATE,
|
|
&quad8_synchronous_mode_enum),
|
|
IIO_ENUM_AVAILABLE("synchronous_mode", &quad8_synchronous_mode_enum),
|
|
IIO_ENUM("index_polarity", IIO_SEPARATE, &quad8_index_polarity_enum),
|
|
IIO_ENUM_AVAILABLE("index_polarity", &quad8_index_polarity_enum),
|
|
{}
|
|
};
|
|
|
|
#define QUAD8_COUNT_CHAN(_chan) { \
|
|
.type = IIO_COUNT, \
|
|
.channel = (_chan), \
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
|
|
BIT(IIO_CHAN_INFO_ENABLE) | BIT(IIO_CHAN_INFO_SCALE), \
|
|
.ext_info = quad8_count_ext_info, \
|
|
.indexed = 1 \
|
|
}
|
|
|
|
#define QUAD8_INDEX_CHAN(_chan) { \
|
|
.type = IIO_INDEX, \
|
|
.channel = (_chan), \
|
|
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
|
|
.ext_info = quad8_index_ext_info, \
|
|
.indexed = 1 \
|
|
}
|
|
|
|
static const struct iio_chan_spec quad8_channels[] = {
|
|
QUAD8_COUNT_CHAN(0), QUAD8_INDEX_CHAN(0),
|
|
QUAD8_COUNT_CHAN(1), QUAD8_INDEX_CHAN(1),
|
|
QUAD8_COUNT_CHAN(2), QUAD8_INDEX_CHAN(2),
|
|
QUAD8_COUNT_CHAN(3), QUAD8_INDEX_CHAN(3),
|
|
QUAD8_COUNT_CHAN(4), QUAD8_INDEX_CHAN(4),
|
|
QUAD8_COUNT_CHAN(5), QUAD8_INDEX_CHAN(5),
|
|
QUAD8_COUNT_CHAN(6), QUAD8_INDEX_CHAN(6),
|
|
QUAD8_COUNT_CHAN(7), QUAD8_INDEX_CHAN(7)
|
|
};
|
|
|
|
static int quad8_probe(struct device *dev, unsigned int id)
|
|
{
|
|
struct iio_dev *indio_dev;
|
|
struct quad8_iio *priv;
|
|
int i, j;
|
|
unsigned int base_offset;
|
|
|
|
indio_dev = devm_iio_device_alloc(dev, sizeof(*priv));
|
|
if (!indio_dev)
|
|
return -ENOMEM;
|
|
|
|
if (!devm_request_region(dev, base[id], QUAD8_EXTENT,
|
|
dev_name(dev))) {
|
|
dev_err(dev, "Unable to lock port addresses (0x%X-0x%X)\n",
|
|
base[id], base[id] + QUAD8_EXTENT);
|
|
return -EBUSY;
|
|
}
|
|
|
|
indio_dev->info = &quad8_info;
|
|
indio_dev->modes = INDIO_DIRECT_MODE;
|
|
indio_dev->num_channels = ARRAY_SIZE(quad8_channels);
|
|
indio_dev->channels = quad8_channels;
|
|
indio_dev->name = dev_name(dev);
|
|
indio_dev->dev.parent = dev;
|
|
|
|
priv = iio_priv(indio_dev);
|
|
priv->base = base[id];
|
|
|
|
/* Reset all counters and disable interrupt function */
|
|
outb(0x01, base[id] + 0x11);
|
|
/* Set initial configuration for all counters */
|
|
for (i = 0; i < QUAD8_NUM_COUNTERS; i++) {
|
|
base_offset = base[id] + 2 * i;
|
|
/* Reset Byte Pointer */
|
|
outb(0x01, base_offset + 1);
|
|
/* Reset Preset Register */
|
|
for (j = 0; j < 3; j++)
|
|
outb(0x00, base_offset);
|
|
/* Reset Borrow, Carry, Compare, and Sign flags */
|
|
outb(0x04, base_offset + 1);
|
|
/* Reset Error flag */
|
|
outb(0x06, base_offset + 1);
|
|
/* Binary encoding; Normal count; non-quadrature mode */
|
|
outb(0x20, base_offset + 1);
|
|
/* Disable A and B inputs; preset on index; FLG1 as Carry */
|
|
outb(0x40, base_offset + 1);
|
|
/* Disable index function; negative index polarity */
|
|
outb(0x60, base_offset + 1);
|
|
}
|
|
/* Enable all counters */
|
|
outb(0x00, base[id] + 0x11);
|
|
|
|
return devm_iio_device_register(dev, indio_dev);
|
|
}
|
|
|
|
static struct isa_driver quad8_driver = {
|
|
.probe = quad8_probe,
|
|
.driver = {
|
|
.name = "104-quad-8"
|
|
}
|
|
};
|
|
|
|
module_isa_driver(quad8_driver, num_quad8);
|
|
|
|
MODULE_AUTHOR("William Breathitt Gray <vilhelm.gray@gmail.com>");
|
|
MODULE_DESCRIPTION("ACCES 104-QUAD-8 IIO driver");
|
|
MODULE_LICENSE("GPL v2");
|