mirror of https://gitee.com/openkylin/linux.git
153 lines
3.9 KiB
C
153 lines
3.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* ip30-xtalk.c - Very basic Crosstalk (XIO) detection support.
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* Copyright (C) 2004-2007 Stanislaw Skowronek <skylark@unaligned.org>
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* Copyright (C) 2009 Johannes Dickgreber <tanzy@gmx.de>
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* Copyright (C) 2007, 2014-2016 Joshua Kinard <kumba@gentoo.org>
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/sgi-w1.h>
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#include <linux/platform_data/xtalk-bridge.h>
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#include <asm/xtalk/xwidget.h>
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#include <asm/pci/bridge.h>
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#define IP30_SWIN_BASE(widget) \
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(0x0000000010000000 | (((unsigned long)(widget)) << 24))
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#define IP30_RAW_SWIN_BASE(widget) (IO_BASE + IP30_SWIN_BASE(widget))
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#define IP30_SWIN_SIZE (1 << 24)
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#define IP30_WIDGET_XBOW _AC(0x0, UL) /* XBow is always 0 */
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#define IP30_WIDGET_HEART _AC(0x8, UL) /* HEART is always 8 */
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#define IP30_WIDGET_PCI_BASE _AC(0xf, UL) /* BaseIO PCI is always 15 */
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#define XTALK_NODEV 0xffffffff
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#define XBOW_REG_LINK_STAT_0 0x114
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#define XBOW_REG_LINK_BLK_SIZE 0x40
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#define XBOW_REG_LINK_ALIVE 0x80000000
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#define HEART_INTR_ADDR 0x00000080
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#define xtalk_read __raw_readl
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static void bridge_platform_create(int widget, int masterwid)
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{
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struct xtalk_bridge_platform_data *bd;
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struct sgi_w1_platform_data *wd;
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struct platform_device *pdev;
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struct resource w1_res;
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wd = kzalloc(sizeof(*wd), GFP_KERNEL);
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if (!wd)
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goto no_mem;
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snprintf(wd->dev_id, sizeof(wd->dev_id), "bridge-%012lx",
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IP30_SWIN_BASE(widget));
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memset(&w1_res, 0, sizeof(w1_res));
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w1_res.start = IP30_SWIN_BASE(widget) +
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offsetof(struct bridge_regs, b_nic);
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w1_res.end = w1_res.start + 3;
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w1_res.flags = IORESOURCE_MEM;
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pdev = platform_device_alloc("sgi_w1", PLATFORM_DEVID_AUTO);
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if (!pdev) {
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kfree(wd);
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goto no_mem;
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}
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platform_device_add_resources(pdev, &w1_res, 1);
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platform_device_add_data(pdev, wd, sizeof(*wd));
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platform_device_add(pdev);
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bd = kzalloc(sizeof(*bd), GFP_KERNEL);
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if (!bd)
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goto no_mem;
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pdev = platform_device_alloc("xtalk-bridge", PLATFORM_DEVID_AUTO);
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if (!pdev) {
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kfree(bd);
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goto no_mem;
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}
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bd->bridge_addr = IP30_RAW_SWIN_BASE(widget);
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bd->intr_addr = HEART_INTR_ADDR;
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bd->nasid = 0;
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bd->masterwid = masterwid;
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bd->mem.name = "Bridge PCI MEM";
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bd->mem.start = IP30_SWIN_BASE(widget) + BRIDGE_DEVIO0;
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bd->mem.end = IP30_SWIN_BASE(widget) + IP30_SWIN_SIZE - 1;
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bd->mem.flags = IORESOURCE_MEM;
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bd->mem_offset = IP30_SWIN_BASE(widget);
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bd->io.name = "Bridge PCI IO";
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bd->io.start = IP30_SWIN_BASE(widget) + BRIDGE_DEVIO0;
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bd->io.end = IP30_SWIN_BASE(widget) + IP30_SWIN_SIZE - 1;
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bd->io.flags = IORESOURCE_IO;
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bd->io_offset = IP30_SWIN_BASE(widget);
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platform_device_add_data(pdev, bd, sizeof(*bd));
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platform_device_add(pdev);
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pr_info("xtalk:%x bridge widget\n", widget);
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return;
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no_mem:
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pr_warn("xtalk:%x bridge create out of memory\n", widget);
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}
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static unsigned int __init xbow_widget_active(s8 wid)
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{
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unsigned int link_stat;
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link_stat = xtalk_read((void *)(IP30_RAW_SWIN_BASE(IP30_WIDGET_XBOW) +
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XBOW_REG_LINK_STAT_0 +
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XBOW_REG_LINK_BLK_SIZE *
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(wid - 8)));
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return (link_stat & XBOW_REG_LINK_ALIVE) ? 1 : 0;
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}
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static void __init xtalk_init_widget(s8 wid, s8 masterwid)
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{
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xwidget_part_num_t partnum;
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widgetreg_t widget_id;
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if (!xbow_widget_active(wid))
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return;
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widget_id = xtalk_read((void *)(IP30_RAW_SWIN_BASE(wid) + WIDGET_ID));
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partnum = XWIDGET_PART_NUM(widget_id);
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switch (partnum) {
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case BRIDGE_WIDGET_PART_NUM:
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case XBRIDGE_WIDGET_PART_NUM:
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bridge_platform_create(wid, masterwid);
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break;
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default:
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pr_info("xtalk:%x unknown widget (0x%x)\n", wid, partnum);
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break;
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}
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}
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static int __init ip30_xtalk_init(void)
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{
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int i;
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/*
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* Walk widget IDs backwards so that BaseIO is probed first. This
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* ensures that the BaseIO IOC3 is always detected as eth0.
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*/
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for (i = IP30_WIDGET_PCI_BASE; i > IP30_WIDGET_HEART; i--)
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xtalk_init_widget(i, IP30_WIDGET_HEART);
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return 0;
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}
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arch_initcall(ip30_xtalk_init);
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