mirror of https://gitee.com/openkylin/linux.git
1007 lines
24 KiB
C
1007 lines
24 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* st-asc.c: ST Asynchronous serial controller (ASC) driver
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*
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* Copyright (C) 2003-2013 STMicroelectronics (R&D) Limited
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*/
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#include <linux/module.h>
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#include <linux/serial.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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#include <linux/pm_runtime.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/serial_core.h>
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#include <linux/clk.h>
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#include <linux/gpio/consumer.h>
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#define DRIVER_NAME "st-asc"
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#define ASC_SERIAL_NAME "ttyAS"
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#define ASC_FIFO_SIZE 16
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#define ASC_MAX_PORTS 8
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/* Pinctrl states */
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#define DEFAULT 0
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#define NO_HW_FLOWCTRL 1
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struct asc_port {
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struct uart_port port;
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struct gpio_desc *rts;
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struct clk *clk;
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struct pinctrl *pinctrl;
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struct pinctrl_state *states[2];
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unsigned int hw_flow_control:1;
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unsigned int force_m1:1;
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};
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static struct asc_port asc_ports[ASC_MAX_PORTS];
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static struct uart_driver asc_uart_driver;
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/*---- UART Register definitions ------------------------------*/
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/* Register offsets */
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#define ASC_BAUDRATE 0x00
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#define ASC_TXBUF 0x04
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#define ASC_RXBUF 0x08
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#define ASC_CTL 0x0C
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#define ASC_INTEN 0x10
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#define ASC_STA 0x14
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#define ASC_GUARDTIME 0x18
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#define ASC_TIMEOUT 0x1C
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#define ASC_TXRESET 0x20
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#define ASC_RXRESET 0x24
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#define ASC_RETRIES 0x28
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/* ASC_RXBUF */
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#define ASC_RXBUF_PE 0x100
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#define ASC_RXBUF_FE 0x200
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/**
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* Some of status comes from higher bits of the character and some come from
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* the status register. Combining both of them in to single status using dummy
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* bits.
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*/
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#define ASC_RXBUF_DUMMY_RX 0x10000
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#define ASC_RXBUF_DUMMY_BE 0x20000
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#define ASC_RXBUF_DUMMY_OE 0x40000
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/* ASC_CTL */
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#define ASC_CTL_MODE_MSK 0x0007
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#define ASC_CTL_MODE_8BIT 0x0001
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#define ASC_CTL_MODE_7BIT_PAR 0x0003
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#define ASC_CTL_MODE_9BIT 0x0004
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#define ASC_CTL_MODE_8BIT_WKUP 0x0005
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#define ASC_CTL_MODE_8BIT_PAR 0x0007
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#define ASC_CTL_STOP_MSK 0x0018
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#define ASC_CTL_STOP_HALFBIT 0x0000
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#define ASC_CTL_STOP_1BIT 0x0008
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#define ASC_CTL_STOP_1_HALFBIT 0x0010
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#define ASC_CTL_STOP_2BIT 0x0018
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#define ASC_CTL_PARITYODD 0x0020
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#define ASC_CTL_LOOPBACK 0x0040
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#define ASC_CTL_RUN 0x0080
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#define ASC_CTL_RXENABLE 0x0100
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#define ASC_CTL_SCENABLE 0x0200
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#define ASC_CTL_FIFOENABLE 0x0400
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#define ASC_CTL_CTSENABLE 0x0800
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#define ASC_CTL_BAUDMODE 0x1000
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/* ASC_GUARDTIME */
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#define ASC_GUARDTIME_MSK 0x00FF
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/* ASC_INTEN */
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#define ASC_INTEN_RBE 0x0001
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#define ASC_INTEN_TE 0x0002
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#define ASC_INTEN_THE 0x0004
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#define ASC_INTEN_PE 0x0008
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#define ASC_INTEN_FE 0x0010
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#define ASC_INTEN_OE 0x0020
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#define ASC_INTEN_TNE 0x0040
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#define ASC_INTEN_TOI 0x0080
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#define ASC_INTEN_RHF 0x0100
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/* ASC_RETRIES */
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#define ASC_RETRIES_MSK 0x00FF
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/* ASC_RXBUF */
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#define ASC_RXBUF_MSK 0x03FF
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/* ASC_STA */
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#define ASC_STA_RBF 0x0001
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#define ASC_STA_TE 0x0002
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#define ASC_STA_THE 0x0004
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#define ASC_STA_PE 0x0008
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#define ASC_STA_FE 0x0010
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#define ASC_STA_OE 0x0020
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#define ASC_STA_TNE 0x0040
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#define ASC_STA_TOI 0x0080
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#define ASC_STA_RHF 0x0100
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#define ASC_STA_TF 0x0200
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#define ASC_STA_NKD 0x0400
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/* ASC_TIMEOUT */
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#define ASC_TIMEOUT_MSK 0x00FF
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/* ASC_TXBUF */
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#define ASC_TXBUF_MSK 0x01FF
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/*---- Inline function definitions ---------------------------*/
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static inline struct asc_port *to_asc_port(struct uart_port *port)
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{
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return container_of(port, struct asc_port, port);
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}
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static inline u32 asc_in(struct uart_port *port, u32 offset)
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{
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#ifdef readl_relaxed
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return readl_relaxed(port->membase + offset);
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#else
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return readl(port->membase + offset);
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#endif
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}
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static inline void asc_out(struct uart_port *port, u32 offset, u32 value)
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{
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#ifdef writel_relaxed
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writel_relaxed(value, port->membase + offset);
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#else
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writel(value, port->membase + offset);
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#endif
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}
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/*
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* Some simple utility functions to enable and disable interrupts.
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* Note that these need to be called with interrupts disabled.
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*/
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static inline void asc_disable_tx_interrupts(struct uart_port *port)
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{
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u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_THE;
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asc_out(port, ASC_INTEN, intenable);
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(void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */
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}
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static inline void asc_enable_tx_interrupts(struct uart_port *port)
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{
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u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_THE;
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asc_out(port, ASC_INTEN, intenable);
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}
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static inline void asc_disable_rx_interrupts(struct uart_port *port)
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{
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u32 intenable = asc_in(port, ASC_INTEN) & ~ASC_INTEN_RBE;
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asc_out(port, ASC_INTEN, intenable);
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(void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */
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}
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static inline void asc_enable_rx_interrupts(struct uart_port *port)
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{
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u32 intenable = asc_in(port, ASC_INTEN) | ASC_INTEN_RBE;
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asc_out(port, ASC_INTEN, intenable);
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}
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static inline u32 asc_txfifo_is_empty(struct uart_port *port)
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{
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return asc_in(port, ASC_STA) & ASC_STA_TE;
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}
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static inline u32 asc_txfifo_is_half_empty(struct uart_port *port)
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{
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return asc_in(port, ASC_STA) & ASC_STA_THE;
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}
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static inline const char *asc_port_name(struct uart_port *port)
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{
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return to_platform_device(port->dev)->name;
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}
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/*----------------------------------------------------------------------*/
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/*
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* This section contains code to support the use of the ASC as a
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* generic serial port.
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*/
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static inline unsigned asc_hw_txroom(struct uart_port *port)
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{
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u32 status = asc_in(port, ASC_STA);
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if (status & ASC_STA_THE)
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return port->fifosize / 2;
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else if (!(status & ASC_STA_TF))
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return 1;
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return 0;
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}
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/*
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* Start transmitting chars.
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* This is called from both interrupt and task level.
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* Either way interrupts are disabled.
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*/
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static void asc_transmit_chars(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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int txroom;
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unsigned char c;
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txroom = asc_hw_txroom(port);
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if ((txroom != 0) && port->x_char) {
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c = port->x_char;
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port->x_char = 0;
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asc_out(port, ASC_TXBUF, c);
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port->icount.tx++;
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txroom = asc_hw_txroom(port);
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}
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if (uart_tx_stopped(port)) {
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/*
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* We should try and stop the hardware here, but I
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* don't think the ASC has any way to do that.
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*/
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asc_disable_tx_interrupts(port);
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return;
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}
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if (uart_circ_empty(xmit)) {
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asc_disable_tx_interrupts(port);
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return;
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}
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if (txroom == 0)
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return;
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do {
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c = xmit->buf[xmit->tail];
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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asc_out(port, ASC_TXBUF, c);
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port->icount.tx++;
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txroom--;
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} while ((txroom > 0) && (!uart_circ_empty(xmit)));
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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if (uart_circ_empty(xmit))
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asc_disable_tx_interrupts(port);
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}
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static void asc_receive_chars(struct uart_port *port)
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{
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struct tty_port *tport = &port->state->port;
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unsigned long status, mode;
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unsigned long c = 0;
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char flag;
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bool ignore_pe = false;
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/*
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* Datasheet states: If the MODE field selects an 8-bit frame then
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* this [parity error] bit is undefined. Software should ignore this
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* bit when reading 8-bit frames.
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*/
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mode = asc_in(port, ASC_CTL) & ASC_CTL_MODE_MSK;
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if (mode == ASC_CTL_MODE_8BIT || mode == ASC_CTL_MODE_8BIT_PAR)
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ignore_pe = true;
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if (irqd_is_wakeup_set(irq_get_irq_data(port->irq)))
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pm_wakeup_event(tport->tty->dev, 0);
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while ((status = asc_in(port, ASC_STA)) & ASC_STA_RBF) {
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c = asc_in(port, ASC_RXBUF) | ASC_RXBUF_DUMMY_RX;
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flag = TTY_NORMAL;
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port->icount.rx++;
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if (status & ASC_STA_OE || c & ASC_RXBUF_FE ||
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(c & ASC_RXBUF_PE && !ignore_pe)) {
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if (c & ASC_RXBUF_FE) {
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if (c == (ASC_RXBUF_FE | ASC_RXBUF_DUMMY_RX)) {
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port->icount.brk++;
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if (uart_handle_break(port))
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continue;
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c |= ASC_RXBUF_DUMMY_BE;
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} else {
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port->icount.frame++;
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}
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} else if (c & ASC_RXBUF_PE) {
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port->icount.parity++;
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}
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/*
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* Reading any data from the RX FIFO clears the
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* overflow error condition.
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*/
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if (status & ASC_STA_OE) {
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port->icount.overrun++;
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c |= ASC_RXBUF_DUMMY_OE;
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}
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c &= port->read_status_mask;
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if (c & ASC_RXBUF_DUMMY_BE)
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flag = TTY_BREAK;
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else if (c & ASC_RXBUF_PE)
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flag = TTY_PARITY;
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else if (c & ASC_RXBUF_FE)
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flag = TTY_FRAME;
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}
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if (uart_handle_sysrq_char(port, c & 0xff))
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continue;
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uart_insert_char(port, c, ASC_RXBUF_DUMMY_OE, c & 0xff, flag);
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}
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/* Tell the rest of the system the news. New characters! */
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tty_flip_buffer_push(tport);
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}
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static irqreturn_t asc_interrupt(int irq, void *ptr)
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{
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struct uart_port *port = ptr;
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u32 status;
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spin_lock(&port->lock);
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status = asc_in(port, ASC_STA);
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if (status & ASC_STA_RBF) {
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/* Receive FIFO not empty */
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asc_receive_chars(port);
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}
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if ((status & ASC_STA_THE) &&
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(asc_in(port, ASC_INTEN) & ASC_INTEN_THE)) {
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/* Transmitter FIFO at least half empty */
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asc_transmit_chars(port);
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}
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spin_unlock(&port->lock);
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return IRQ_HANDLED;
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}
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/*----------------------------------------------------------------------*/
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/*
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* UART Functions
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*/
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static unsigned int asc_tx_empty(struct uart_port *port)
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{
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return asc_txfifo_is_empty(port) ? TIOCSER_TEMT : 0;
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}
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static void asc_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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struct asc_port *ascport = to_asc_port(port);
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/*
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* This routine is used for seting signals of: DTR, DCD, CTS and RTS.
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* We use ASC's hardware for CTS/RTS when hardware flow-control is
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* enabled, however if the RTS line is required for another purpose,
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* commonly controlled using HUP from userspace, then we need to toggle
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* it manually, using GPIO.
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*
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* Some boards also have DTR and DCD implemented using PIO pins, code to
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* do this should be hooked in here.
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*/
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if (!ascport->rts)
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return;
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/* If HW flow-control is enabled, we can't fiddle with the RTS line */
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if (asc_in(port, ASC_CTL) & ASC_CTL_CTSENABLE)
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return;
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gpiod_set_value(ascport->rts, mctrl & TIOCM_RTS);
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}
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static unsigned int asc_get_mctrl(struct uart_port *port)
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{
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/*
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* This routine is used for geting signals of: DTR, DCD, DSR, RI,
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* and CTS/RTS
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*/
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return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
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}
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/* There are probably characters waiting to be transmitted. */
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static void asc_start_tx(struct uart_port *port)
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{
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struct circ_buf *xmit = &port->state->xmit;
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if (!uart_circ_empty(xmit))
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asc_enable_tx_interrupts(port);
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}
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/* Transmit stop */
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static void asc_stop_tx(struct uart_port *port)
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{
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asc_disable_tx_interrupts(port);
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}
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/* Receive stop */
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static void asc_stop_rx(struct uart_port *port)
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{
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asc_disable_rx_interrupts(port);
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}
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/* Handle breaks - ignored by us */
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static void asc_break_ctl(struct uart_port *port, int break_state)
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{
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/* Nothing here yet .. */
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}
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/*
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* Enable port for reception.
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*/
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static int asc_startup(struct uart_port *port)
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{
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if (request_irq(port->irq, asc_interrupt, 0,
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asc_port_name(port), port)) {
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dev_err(port->dev, "cannot allocate irq.\n");
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return -ENODEV;
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}
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asc_transmit_chars(port);
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asc_enable_rx_interrupts(port);
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return 0;
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}
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static void asc_shutdown(struct uart_port *port)
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{
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asc_disable_tx_interrupts(port);
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asc_disable_rx_interrupts(port);
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free_irq(port->irq, port);
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}
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static void asc_pm(struct uart_port *port, unsigned int state,
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unsigned int oldstate)
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{
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struct asc_port *ascport = to_asc_port(port);
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unsigned long flags = 0;
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u32 ctl;
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switch (state) {
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case UART_PM_STATE_ON:
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clk_prepare_enable(ascport->clk);
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break;
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case UART_PM_STATE_OFF:
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/*
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* Disable the ASC baud rate generator, which is as close as
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* we can come to turning it off. Note this is not called with
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* the port spinlock held.
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*/
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spin_lock_irqsave(&port->lock, flags);
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ctl = asc_in(port, ASC_CTL) & ~ASC_CTL_RUN;
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asc_out(port, ASC_CTL, ctl);
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spin_unlock_irqrestore(&port->lock, flags);
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clk_disable_unprepare(ascport->clk);
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break;
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}
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}
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static void asc_set_termios(struct uart_port *port, struct ktermios *termios,
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struct ktermios *old)
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{
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struct asc_port *ascport = to_asc_port(port);
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struct gpio_desc *gpiod;
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unsigned int baud;
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u32 ctrl_val;
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tcflag_t cflag;
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unsigned long flags;
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/* Update termios to reflect hardware capabilities */
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termios->c_cflag &= ~(CMSPAR |
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(ascport->hw_flow_control ? 0 : CRTSCTS));
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port->uartclk = clk_get_rate(ascport->clk);
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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cflag = termios->c_cflag;
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spin_lock_irqsave(&port->lock, flags);
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/* read control register */
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ctrl_val = asc_in(port, ASC_CTL);
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/* stop serial port and reset value */
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asc_out(port, ASC_CTL, (ctrl_val & ~ASC_CTL_RUN));
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ctrl_val = ASC_CTL_RXENABLE | ASC_CTL_FIFOENABLE;
|
|
|
|
/* reset fifo rx & tx */
|
|
asc_out(port, ASC_TXRESET, 1);
|
|
asc_out(port, ASC_RXRESET, 1);
|
|
|
|
/* set character length */
|
|
if ((cflag & CSIZE) == CS7) {
|
|
ctrl_val |= ASC_CTL_MODE_7BIT_PAR;
|
|
} else {
|
|
ctrl_val |= (cflag & PARENB) ? ASC_CTL_MODE_8BIT_PAR :
|
|
ASC_CTL_MODE_8BIT;
|
|
}
|
|
|
|
/* set stop bit */
|
|
ctrl_val |= (cflag & CSTOPB) ? ASC_CTL_STOP_2BIT : ASC_CTL_STOP_1BIT;
|
|
|
|
/* odd parity */
|
|
if (cflag & PARODD)
|
|
ctrl_val |= ASC_CTL_PARITYODD;
|
|
|
|
/* hardware flow control */
|
|
if ((cflag & CRTSCTS)) {
|
|
ctrl_val |= ASC_CTL_CTSENABLE;
|
|
|
|
/* If flow-control selected, stop handling RTS manually */
|
|
if (ascport->rts) {
|
|
devm_gpiod_put(port->dev, ascport->rts);
|
|
ascport->rts = NULL;
|
|
|
|
pinctrl_select_state(ascport->pinctrl,
|
|
ascport->states[DEFAULT]);
|
|
}
|
|
} else {
|
|
/* If flow-control disabled, it's safe to handle RTS manually */
|
|
if (!ascport->rts && ascport->states[NO_HW_FLOWCTRL]) {
|
|
pinctrl_select_state(ascport->pinctrl,
|
|
ascport->states[NO_HW_FLOWCTRL]);
|
|
|
|
gpiod = devm_gpiod_get(port->dev, "rts", GPIOD_OUT_LOW);
|
|
if (!IS_ERR(gpiod)) {
|
|
gpiod_set_consumer_name(gpiod,
|
|
port->dev->of_node->name);
|
|
ascport->rts = gpiod;
|
|
}
|
|
}
|
|
}
|
|
|
|
if ((baud < 19200) && !ascport->force_m1) {
|
|
asc_out(port, ASC_BAUDRATE, (port->uartclk / (16 * baud)));
|
|
} else {
|
|
/*
|
|
* MODE 1: recommended for high bit rates (above 19.2K)
|
|
*
|
|
* baudrate * 16 * 2^16
|
|
* ASCBaudRate = ------------------------
|
|
* inputclock
|
|
*
|
|
* To keep maths inside 64bits, we divide inputclock by 16.
|
|
*/
|
|
u64 dividend = (u64)baud * (1 << 16);
|
|
|
|
do_div(dividend, port->uartclk / 16);
|
|
asc_out(port, ASC_BAUDRATE, dividend);
|
|
ctrl_val |= ASC_CTL_BAUDMODE;
|
|
}
|
|
|
|
uart_update_timeout(port, cflag, baud);
|
|
|
|
ascport->port.read_status_mask = ASC_RXBUF_DUMMY_OE;
|
|
if (termios->c_iflag & INPCK)
|
|
ascport->port.read_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE;
|
|
if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
|
|
ascport->port.read_status_mask |= ASC_RXBUF_DUMMY_BE;
|
|
|
|
/*
|
|
* Characters to ignore
|
|
*/
|
|
ascport->port.ignore_status_mask = 0;
|
|
if (termios->c_iflag & IGNPAR)
|
|
ascport->port.ignore_status_mask |= ASC_RXBUF_FE | ASC_RXBUF_PE;
|
|
if (termios->c_iflag & IGNBRK) {
|
|
ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_BE;
|
|
/*
|
|
* If we're ignoring parity and break indicators,
|
|
* ignore overruns too (for real raw support).
|
|
*/
|
|
if (termios->c_iflag & IGNPAR)
|
|
ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_OE;
|
|
}
|
|
|
|
/*
|
|
* Ignore all characters if CREAD is not set.
|
|
*/
|
|
if (!(termios->c_cflag & CREAD))
|
|
ascport->port.ignore_status_mask |= ASC_RXBUF_DUMMY_RX;
|
|
|
|
/* Set the timeout */
|
|
asc_out(port, ASC_TIMEOUT, 20);
|
|
|
|
/* write final value and enable port */
|
|
asc_out(port, ASC_CTL, (ctrl_val | ASC_CTL_RUN));
|
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
}
|
|
|
|
static const char *asc_type(struct uart_port *port)
|
|
{
|
|
return (port->type == PORT_ASC) ? DRIVER_NAME : NULL;
|
|
}
|
|
|
|
static void asc_release_port(struct uart_port *port)
|
|
{
|
|
}
|
|
|
|
static int asc_request_port(struct uart_port *port)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Called when the port is opened, and UPF_BOOT_AUTOCONF flag is set
|
|
* Set type field if successful
|
|
*/
|
|
static void asc_config_port(struct uart_port *port, int flags)
|
|
{
|
|
if ((flags & UART_CONFIG_TYPE))
|
|
port->type = PORT_ASC;
|
|
}
|
|
|
|
static int
|
|
asc_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
/* No user changeable parameters */
|
|
return -EINVAL;
|
|
}
|
|
|
|
#ifdef CONFIG_CONSOLE_POLL
|
|
/*
|
|
* Console polling routines for writing and reading from the uart while
|
|
* in an interrupt or debug context (i.e. kgdb).
|
|
*/
|
|
|
|
static int asc_get_poll_char(struct uart_port *port)
|
|
{
|
|
if (!(asc_in(port, ASC_STA) & ASC_STA_RBF))
|
|
return NO_POLL_CHAR;
|
|
|
|
return asc_in(port, ASC_RXBUF);
|
|
}
|
|
|
|
static void asc_put_poll_char(struct uart_port *port, unsigned char c)
|
|
{
|
|
while (!asc_txfifo_is_half_empty(port))
|
|
cpu_relax();
|
|
asc_out(port, ASC_TXBUF, c);
|
|
}
|
|
|
|
#endif /* CONFIG_CONSOLE_POLL */
|
|
|
|
/*---------------------------------------------------------------------*/
|
|
|
|
static const struct uart_ops asc_uart_ops = {
|
|
.tx_empty = asc_tx_empty,
|
|
.set_mctrl = asc_set_mctrl,
|
|
.get_mctrl = asc_get_mctrl,
|
|
.start_tx = asc_start_tx,
|
|
.stop_tx = asc_stop_tx,
|
|
.stop_rx = asc_stop_rx,
|
|
.break_ctl = asc_break_ctl,
|
|
.startup = asc_startup,
|
|
.shutdown = asc_shutdown,
|
|
.set_termios = asc_set_termios,
|
|
.type = asc_type,
|
|
.release_port = asc_release_port,
|
|
.request_port = asc_request_port,
|
|
.config_port = asc_config_port,
|
|
.verify_port = asc_verify_port,
|
|
.pm = asc_pm,
|
|
#ifdef CONFIG_CONSOLE_POLL
|
|
.poll_get_char = asc_get_poll_char,
|
|
.poll_put_char = asc_put_poll_char,
|
|
#endif /* CONFIG_CONSOLE_POLL */
|
|
};
|
|
|
|
static int asc_init_port(struct asc_port *ascport,
|
|
struct platform_device *pdev)
|
|
{
|
|
struct uart_port *port = &ascport->port;
|
|
struct resource *res;
|
|
int ret;
|
|
|
|
port->iotype = UPIO_MEM;
|
|
port->flags = UPF_BOOT_AUTOCONF;
|
|
port->ops = &asc_uart_ops;
|
|
port->fifosize = ASC_FIFO_SIZE;
|
|
port->dev = &pdev->dev;
|
|
port->irq = platform_get_irq(pdev, 0);
|
|
port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_ST_ASC_CONSOLE);
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
port->membase = devm_ioremap_resource(&pdev->dev, res);
|
|
if (IS_ERR(port->membase))
|
|
return PTR_ERR(port->membase);
|
|
port->mapbase = res->start;
|
|
|
|
spin_lock_init(&port->lock);
|
|
|
|
ascport->clk = devm_clk_get(&pdev->dev, NULL);
|
|
|
|
if (WARN_ON(IS_ERR(ascport->clk)))
|
|
return -EINVAL;
|
|
/* ensure that clk rate is correct by enabling the clk */
|
|
clk_prepare_enable(ascport->clk);
|
|
ascport->port.uartclk = clk_get_rate(ascport->clk);
|
|
WARN_ON(ascport->port.uartclk == 0);
|
|
clk_disable_unprepare(ascport->clk);
|
|
|
|
ascport->pinctrl = devm_pinctrl_get(&pdev->dev);
|
|
if (IS_ERR(ascport->pinctrl)) {
|
|
ret = PTR_ERR(ascport->pinctrl);
|
|
dev_err(&pdev->dev, "Failed to get Pinctrl: %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
ascport->states[DEFAULT] =
|
|
pinctrl_lookup_state(ascport->pinctrl, "default");
|
|
if (IS_ERR(ascport->states[DEFAULT])) {
|
|
ret = PTR_ERR(ascport->states[DEFAULT]);
|
|
dev_err(&pdev->dev,
|
|
"Failed to look up Pinctrl state 'default': %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
/* "no-hw-flowctrl" state is optional */
|
|
ascport->states[NO_HW_FLOWCTRL] =
|
|
pinctrl_lookup_state(ascport->pinctrl, "no-hw-flowctrl");
|
|
if (IS_ERR(ascport->states[NO_HW_FLOWCTRL]))
|
|
ascport->states[NO_HW_FLOWCTRL] = NULL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct asc_port *asc_of_get_asc_port(struct platform_device *pdev)
|
|
{
|
|
struct device_node *np = pdev->dev.of_node;
|
|
int id;
|
|
|
|
if (!np)
|
|
return NULL;
|
|
|
|
id = of_alias_get_id(np, "serial");
|
|
if (id < 0)
|
|
id = of_alias_get_id(np, ASC_SERIAL_NAME);
|
|
|
|
if (id < 0)
|
|
id = 0;
|
|
|
|
if (WARN_ON(id >= ASC_MAX_PORTS))
|
|
return NULL;
|
|
|
|
asc_ports[id].hw_flow_control = of_property_read_bool(np,
|
|
"uart-has-rtscts");
|
|
asc_ports[id].force_m1 = of_property_read_bool(np, "st,force_m1");
|
|
asc_ports[id].port.line = id;
|
|
asc_ports[id].rts = NULL;
|
|
|
|
return &asc_ports[id];
|
|
}
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id asc_match[] = {
|
|
{ .compatible = "st,asc", },
|
|
{},
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, asc_match);
|
|
#endif
|
|
|
|
static int asc_serial_probe(struct platform_device *pdev)
|
|
{
|
|
int ret;
|
|
struct asc_port *ascport;
|
|
|
|
ascport = asc_of_get_asc_port(pdev);
|
|
if (!ascport)
|
|
return -ENODEV;
|
|
|
|
ret = asc_init_port(ascport, pdev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = uart_add_one_port(&asc_uart_driver, &ascport->port);
|
|
if (ret)
|
|
return ret;
|
|
|
|
platform_set_drvdata(pdev, &ascport->port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int asc_serial_remove(struct platform_device *pdev)
|
|
{
|
|
struct uart_port *port = platform_get_drvdata(pdev);
|
|
|
|
return uart_remove_one_port(&asc_uart_driver, port);
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int asc_serial_suspend(struct device *dev)
|
|
{
|
|
struct uart_port *port = dev_get_drvdata(dev);
|
|
|
|
return uart_suspend_port(&asc_uart_driver, port);
|
|
}
|
|
|
|
static int asc_serial_resume(struct device *dev)
|
|
{
|
|
struct uart_port *port = dev_get_drvdata(dev);
|
|
|
|
return uart_resume_port(&asc_uart_driver, port);
|
|
}
|
|
|
|
#endif /* CONFIG_PM_SLEEP */
|
|
|
|
/*----------------------------------------------------------------------*/
|
|
|
|
#ifdef CONFIG_SERIAL_ST_ASC_CONSOLE
|
|
static void asc_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
unsigned int timeout = 1000000;
|
|
|
|
/* Wait for upto 1 second in case flow control is stopping us. */
|
|
while (--timeout && !asc_txfifo_is_half_empty(port))
|
|
udelay(1);
|
|
|
|
asc_out(port, ASC_TXBUF, ch);
|
|
}
|
|
|
|
/*
|
|
* Print a string to the serial port trying not to disturb
|
|
* any possible real use of the port...
|
|
*/
|
|
|
|
static void asc_console_write(struct console *co, const char *s, unsigned count)
|
|
{
|
|
struct uart_port *port = &asc_ports[co->index].port;
|
|
unsigned long flags;
|
|
unsigned long timeout = 1000000;
|
|
int locked = 1;
|
|
u32 intenable;
|
|
|
|
if (port->sysrq)
|
|
locked = 0; /* asc_interrupt has already claimed the lock */
|
|
else if (oops_in_progress)
|
|
locked = spin_trylock_irqsave(&port->lock, flags);
|
|
else
|
|
spin_lock_irqsave(&port->lock, flags);
|
|
|
|
/*
|
|
* Disable interrupts so we don't get the IRQ line bouncing
|
|
* up and down while interrupts are disabled.
|
|
*/
|
|
intenable = asc_in(port, ASC_INTEN);
|
|
asc_out(port, ASC_INTEN, 0);
|
|
(void)asc_in(port, ASC_INTEN); /* Defeat bus write posting */
|
|
|
|
uart_console_write(port, s, count, asc_console_putchar);
|
|
|
|
while (--timeout && !asc_txfifo_is_empty(port))
|
|
udelay(1);
|
|
|
|
asc_out(port, ASC_INTEN, intenable);
|
|
|
|
if (locked)
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
}
|
|
|
|
static int asc_console_setup(struct console *co, char *options)
|
|
{
|
|
struct asc_port *ascport;
|
|
int baud = 115200;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
if (co->index >= ASC_MAX_PORTS)
|
|
return -ENODEV;
|
|
|
|
ascport = &asc_ports[co->index];
|
|
|
|
/*
|
|
* This driver does not support early console initialization
|
|
* (use ARM early printk support instead), so we only expect
|
|
* this to be called during the uart port registration when the
|
|
* driver gets probed and the port should be mapped at that point.
|
|
*/
|
|
if (ascport->port.mapbase == 0 || ascport->port.membase == NULL)
|
|
return -ENXIO;
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
|
|
return uart_set_options(&ascport->port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct console asc_console = {
|
|
.name = ASC_SERIAL_NAME,
|
|
.device = uart_console_device,
|
|
.write = asc_console_write,
|
|
.setup = asc_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &asc_uart_driver,
|
|
};
|
|
|
|
#define ASC_SERIAL_CONSOLE (&asc_console)
|
|
|
|
#else
|
|
#define ASC_SERIAL_CONSOLE NULL
|
|
#endif /* CONFIG_SERIAL_ST_ASC_CONSOLE */
|
|
|
|
static struct uart_driver asc_uart_driver = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = DRIVER_NAME,
|
|
.dev_name = ASC_SERIAL_NAME,
|
|
.major = 0,
|
|
.minor = 0,
|
|
.nr = ASC_MAX_PORTS,
|
|
.cons = ASC_SERIAL_CONSOLE,
|
|
};
|
|
|
|
static const struct dev_pm_ops asc_serial_pm_ops = {
|
|
SET_SYSTEM_SLEEP_PM_OPS(asc_serial_suspend, asc_serial_resume)
|
|
};
|
|
|
|
static struct platform_driver asc_serial_driver = {
|
|
.probe = asc_serial_probe,
|
|
.remove = asc_serial_remove,
|
|
.driver = {
|
|
.name = DRIVER_NAME,
|
|
.pm = &asc_serial_pm_ops,
|
|
.of_match_table = of_match_ptr(asc_match),
|
|
},
|
|
};
|
|
|
|
static int __init asc_init(void)
|
|
{
|
|
int ret;
|
|
static const char banner[] __initconst =
|
|
KERN_INFO "STMicroelectronics ASC driver initialized\n";
|
|
|
|
printk(banner);
|
|
|
|
ret = uart_register_driver(&asc_uart_driver);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = platform_driver_register(&asc_serial_driver);
|
|
if (ret)
|
|
uart_unregister_driver(&asc_uart_driver);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __exit asc_exit(void)
|
|
{
|
|
platform_driver_unregister(&asc_serial_driver);
|
|
uart_unregister_driver(&asc_uart_driver);
|
|
}
|
|
|
|
module_init(asc_init);
|
|
module_exit(asc_exit);
|
|
|
|
MODULE_ALIAS("platform:" DRIVER_NAME);
|
|
MODULE_AUTHOR("STMicroelectronics (R&D) Limited");
|
|
MODULE_DESCRIPTION("STMicroelectronics ASC serial port driver");
|
|
MODULE_LICENSE("GPL");
|