mirror of https://gitee.com/openkylin/linux.git
489 lines
16 KiB
C
489 lines
16 KiB
C
/**
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* \file radeon_drv.c
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* ATI Radeon driver
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*
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* \author Gareth Hughes <gareth@valinux.com>
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*/
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/*
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <drm/drmP.h>
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#include <drm/radeon_drm.h>
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#include "radeon_drv.h"
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#include <drm/drm_pciids.h>
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#include <linux/console.h>
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#include <linux/module.h>
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/*
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* KMS wrapper.
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* - 2.0.0 - initial interface
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* - 2.1.0 - add square tiling interface
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* - 2.2.0 - add r6xx/r7xx const buffer support
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* - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
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* - 2.4.0 - add crtc id query
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* - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
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* - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
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* 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
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* 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
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* 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
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* 2.10.0 - fusion 2D tiling
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* 2.11.0 - backend map, initial compute support for the CS checker
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* 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
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* 2.13.0 - virtual memory support, streamout
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* 2.14.0 - add evergreen tiling informations
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* 2.15.0 - add max_pipes query
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* 2.16.0 - fix evergreen 2D tiled surface calculation
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* 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
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* 2.18.0 - r600-eg: allow "invalid" DB formats
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* 2.19.0 - r600-eg: MSAA textures
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* 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
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* 2.21.0 - r600-r700: FMASK and CMASK
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* 2.22.0 - r600 only: RESOLVE_BOX allowed
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* 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
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* 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
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* 2.25.0 - eg+: new info request for num SE and num SH
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* 2.26.0 - r600-eg: fix htile size computation
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* 2.27.0 - r600-SI: Add CS ioctl support for async DMA
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* 2.28.0 - r600-eg: Add MEM_WRITE packet support
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* 2.29.0 - R500 FP16 color clear registers
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* 2.30.0 - fix for FMASK texturing
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*/
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#define KMS_DRIVER_MAJOR 2
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#define KMS_DRIVER_MINOR 30
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#define KMS_DRIVER_PATCHLEVEL 0
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int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
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int radeon_driver_unload_kms(struct drm_device *dev);
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int radeon_driver_firstopen_kms(struct drm_device *dev);
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void radeon_driver_lastclose_kms(struct drm_device *dev);
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int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
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void radeon_driver_postclose_kms(struct drm_device *dev,
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struct drm_file *file_priv);
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void radeon_driver_preclose_kms(struct drm_device *dev,
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struct drm_file *file_priv);
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int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
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int radeon_resume_kms(struct drm_device *dev);
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u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
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int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
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void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
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int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
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int *max_error,
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struct timeval *vblank_time,
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unsigned flags);
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void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
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int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
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void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
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irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
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int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
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struct drm_file *file_priv);
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int radeon_gem_object_init(struct drm_gem_object *obj);
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void radeon_gem_object_free(struct drm_gem_object *obj);
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int radeon_gem_object_open(struct drm_gem_object *obj,
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struct drm_file *file_priv);
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void radeon_gem_object_close(struct drm_gem_object *obj,
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struct drm_file *file_priv);
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extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
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int *vpos, int *hpos);
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extern struct drm_ioctl_desc radeon_ioctls_kms[];
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extern int radeon_max_kms_ioctl;
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int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
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int radeon_mode_dumb_mmap(struct drm_file *filp,
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struct drm_device *dev,
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uint32_t handle, uint64_t *offset_p);
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int radeon_mode_dumb_create(struct drm_file *file_priv,
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struct drm_device *dev,
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struct drm_mode_create_dumb *args);
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int radeon_mode_dumb_destroy(struct drm_file *file_priv,
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struct drm_device *dev,
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uint32_t handle);
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struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
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struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
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size_t size,
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struct sg_table *sg);
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int radeon_gem_prime_pin(struct drm_gem_object *obj);
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void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
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void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
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extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
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unsigned long arg);
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#if defined(CONFIG_DEBUG_FS)
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int radeon_debugfs_init(struct drm_minor *minor);
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void radeon_debugfs_cleanup(struct drm_minor *minor);
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#endif
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/* atpx handler */
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#if defined(CONFIG_VGA_SWITCHEROO)
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void radeon_register_atpx_handler(void);
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void radeon_unregister_atpx_handler(void);
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#else
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static inline void radeon_register_atpx_handler(void) {}
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static inline void radeon_unregister_atpx_handler(void) {}
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#endif
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int radeon_no_wb;
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int radeon_modeset = 1;
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int radeon_dynclks = -1;
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int radeon_r4xx_atom = 0;
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int radeon_agpmode = 0;
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int radeon_vram_limit = 0;
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int radeon_gart_size = 512; /* default gart size */
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int radeon_benchmarking = 0;
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int radeon_testing = 0;
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int radeon_connector_table = 0;
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int radeon_tv = 1;
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int radeon_audio = 0;
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int radeon_disp_priority = 0;
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int radeon_hw_i2c = 0;
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int radeon_pcie_gen2 = -1;
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int radeon_msi = -1;
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int radeon_lockup_timeout = 10000;
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MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
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module_param_named(no_wb, radeon_no_wb, int, 0444);
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MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
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module_param_named(modeset, radeon_modeset, int, 0400);
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MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
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module_param_named(dynclks, radeon_dynclks, int, 0444);
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MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
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module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
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MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
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module_param_named(vramlimit, radeon_vram_limit, int, 0600);
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MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
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module_param_named(agpmode, radeon_agpmode, int, 0444);
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MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
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module_param_named(gartsize, radeon_gart_size, int, 0600);
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MODULE_PARM_DESC(benchmark, "Run benchmark");
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module_param_named(benchmark, radeon_benchmarking, int, 0444);
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MODULE_PARM_DESC(test, "Run tests");
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module_param_named(test, radeon_testing, int, 0444);
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MODULE_PARM_DESC(connector_table, "Force connector table");
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module_param_named(connector_table, radeon_connector_table, int, 0444);
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MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
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module_param_named(tv, radeon_tv, int, 0444);
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MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
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module_param_named(audio, radeon_audio, int, 0444);
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MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
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module_param_named(disp_priority, radeon_disp_priority, int, 0444);
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MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
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module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
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MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
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module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
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MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
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module_param_named(msi, radeon_msi, int, 0444);
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MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
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module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
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static struct pci_device_id pciidlist[] = {
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radeon_PCI_IDS
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};
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MODULE_DEVICE_TABLE(pci, pciidlist);
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#ifdef CONFIG_DRM_RADEON_UMS
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static int radeon_suspend(struct drm_device *dev, pm_message_t state)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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return 0;
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/* Disable *all* interrupts */
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
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RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
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RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
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return 0;
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}
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static int radeon_resume(struct drm_device *dev)
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{
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drm_radeon_private_t *dev_priv = dev->dev_private;
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
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return 0;
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/* Restore interrupt registers */
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
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RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
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RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
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return 0;
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}
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static const struct file_operations radeon_driver_old_fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release,
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.unlocked_ioctl = drm_ioctl,
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.mmap = drm_mmap,
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.poll = drm_poll,
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.fasync = drm_fasync,
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.read = drm_read,
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#ifdef CONFIG_COMPAT
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.compat_ioctl = radeon_compat_ioctl,
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#endif
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.llseek = noop_llseek,
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};
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static struct drm_driver driver_old = {
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.driver_features =
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DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
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DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
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.dev_priv_size = sizeof(drm_radeon_buf_priv_t),
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.load = radeon_driver_load,
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.firstopen = radeon_driver_firstopen,
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.open = radeon_driver_open,
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.preclose = radeon_driver_preclose,
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.postclose = radeon_driver_postclose,
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.lastclose = radeon_driver_lastclose,
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.unload = radeon_driver_unload,
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.suspend = radeon_suspend,
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.resume = radeon_resume,
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.get_vblank_counter = radeon_get_vblank_counter,
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.enable_vblank = radeon_enable_vblank,
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.disable_vblank = radeon_disable_vblank,
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.master_create = radeon_master_create,
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.master_destroy = radeon_master_destroy,
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.irq_preinstall = radeon_driver_irq_preinstall,
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.irq_postinstall = radeon_driver_irq_postinstall,
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.irq_uninstall = radeon_driver_irq_uninstall,
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.irq_handler = radeon_driver_irq_handler,
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.ioctls = radeon_ioctls,
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.dma_ioctl = radeon_cp_buffers,
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.fops = &radeon_driver_old_fops,
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.name = DRIVER_NAME,
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.desc = DRIVER_DESC,
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.date = DRIVER_DATE,
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.major = DRIVER_MAJOR,
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.minor = DRIVER_MINOR,
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.patchlevel = DRIVER_PATCHLEVEL,
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};
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#endif
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static struct drm_driver kms_driver;
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static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
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{
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struct apertures_struct *ap;
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bool primary = false;
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ap = alloc_apertures(1);
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if (!ap)
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return -ENOMEM;
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ap->ranges[0].base = pci_resource_start(pdev, 0);
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ap->ranges[0].size = pci_resource_len(pdev, 0);
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#ifdef CONFIG_X86
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primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
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#endif
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remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
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kfree(ap);
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return 0;
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}
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static int radeon_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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{
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int ret;
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/* Get rid of things like offb */
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ret = radeon_kick_out_firmware_fb(pdev);
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if (ret)
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return ret;
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return drm_get_pci_dev(pdev, ent, &kms_driver);
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}
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static void
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radeon_pci_remove(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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drm_put_dev(dev);
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}
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static int
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radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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return radeon_suspend_kms(dev, state);
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}
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static int
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radeon_pci_resume(struct pci_dev *pdev)
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{
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struct drm_device *dev = pci_get_drvdata(pdev);
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return radeon_resume_kms(dev);
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}
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static const struct file_operations radeon_driver_kms_fops = {
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.owner = THIS_MODULE,
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.open = drm_open,
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.release = drm_release,
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.unlocked_ioctl = drm_ioctl,
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.mmap = radeon_mmap,
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.poll = drm_poll,
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.fasync = drm_fasync,
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.read = drm_read,
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#ifdef CONFIG_COMPAT
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.compat_ioctl = radeon_kms_compat_ioctl,
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#endif
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};
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static struct drm_driver kms_driver = {
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.driver_features =
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DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
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DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
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DRIVER_PRIME,
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.dev_priv_size = 0,
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.load = radeon_driver_load_kms,
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.firstopen = radeon_driver_firstopen_kms,
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.open = radeon_driver_open_kms,
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.preclose = radeon_driver_preclose_kms,
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.postclose = radeon_driver_postclose_kms,
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.lastclose = radeon_driver_lastclose_kms,
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.unload = radeon_driver_unload_kms,
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.suspend = radeon_suspend_kms,
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.resume = radeon_resume_kms,
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.get_vblank_counter = radeon_get_vblank_counter_kms,
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.enable_vblank = radeon_enable_vblank_kms,
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.disable_vblank = radeon_disable_vblank_kms,
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.get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
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.get_scanout_position = radeon_get_crtc_scanoutpos,
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#if defined(CONFIG_DEBUG_FS)
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.debugfs_init = radeon_debugfs_init,
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.debugfs_cleanup = radeon_debugfs_cleanup,
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#endif
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.irq_preinstall = radeon_driver_irq_preinstall_kms,
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.irq_postinstall = radeon_driver_irq_postinstall_kms,
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.irq_uninstall = radeon_driver_irq_uninstall_kms,
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.irq_handler = radeon_driver_irq_handler_kms,
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.ioctls = radeon_ioctls_kms,
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.gem_init_object = radeon_gem_object_init,
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.gem_free_object = radeon_gem_object_free,
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.gem_open_object = radeon_gem_object_open,
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.gem_close_object = radeon_gem_object_close,
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.dma_ioctl = radeon_dma_ioctl_kms,
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.dumb_create = radeon_mode_dumb_create,
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.dumb_map_offset = radeon_mode_dumb_mmap,
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.dumb_destroy = radeon_mode_dumb_destroy,
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.fops = &radeon_driver_kms_fops,
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
|
|
.gem_prime_export = drm_gem_prime_export,
|
|
.gem_prime_import = drm_gem_prime_import,
|
|
.gem_prime_pin = radeon_gem_prime_pin,
|
|
.gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
|
|
.gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
|
|
.gem_prime_vmap = radeon_gem_prime_vmap,
|
|
.gem_prime_vunmap = radeon_gem_prime_vunmap,
|
|
|
|
.name = DRIVER_NAME,
|
|
.desc = DRIVER_DESC,
|
|
.date = DRIVER_DATE,
|
|
.major = KMS_DRIVER_MAJOR,
|
|
.minor = KMS_DRIVER_MINOR,
|
|
.patchlevel = KMS_DRIVER_PATCHLEVEL,
|
|
};
|
|
|
|
static struct drm_driver *driver;
|
|
static struct pci_driver *pdriver;
|
|
|
|
#ifdef CONFIG_DRM_RADEON_UMS
|
|
static struct pci_driver radeon_pci_driver = {
|
|
.name = DRIVER_NAME,
|
|
.id_table = pciidlist,
|
|
};
|
|
#endif
|
|
|
|
static struct pci_driver radeon_kms_pci_driver = {
|
|
.name = DRIVER_NAME,
|
|
.id_table = pciidlist,
|
|
.probe = radeon_pci_probe,
|
|
.remove = radeon_pci_remove,
|
|
.suspend = radeon_pci_suspend,
|
|
.resume = radeon_pci_resume,
|
|
};
|
|
|
|
static int __init radeon_init(void)
|
|
{
|
|
if (radeon_modeset == 1) {
|
|
DRM_INFO("radeon kernel modesetting enabled.\n");
|
|
driver = &kms_driver;
|
|
pdriver = &radeon_kms_pci_driver;
|
|
driver->driver_features |= DRIVER_MODESET;
|
|
driver->num_ioctls = radeon_max_kms_ioctl;
|
|
radeon_register_atpx_handler();
|
|
|
|
} else {
|
|
#ifdef CONFIG_DRM_RADEON_UMS
|
|
DRM_INFO("radeon userspace modesetting enabled.\n");
|
|
driver = &driver_old;
|
|
pdriver = &radeon_pci_driver;
|
|
driver->driver_features &= ~DRIVER_MODESET;
|
|
driver->num_ioctls = radeon_max_ioctl;
|
|
#else
|
|
DRM_ERROR("No UMS support in radeon module!\n");
|
|
return -EINVAL;
|
|
#endif
|
|
}
|
|
|
|
/* let modprobe override vga console setting */
|
|
return drm_pci_init(driver, pdriver);
|
|
}
|
|
|
|
static void __exit radeon_exit(void)
|
|
{
|
|
drm_pci_exit(driver, pdriver);
|
|
radeon_unregister_atpx_handler();
|
|
}
|
|
|
|
module_init(radeon_init);
|
|
module_exit(radeon_exit);
|
|
|
|
MODULE_AUTHOR(DRIVER_AUTHOR);
|
|
MODULE_DESCRIPTION(DRIVER_DESC);
|
|
MODULE_LICENSE("GPL and additional rights");
|