linux/arch/arm/mach-tegra
Joseph Lo 7e8b15dbc3 ARM: tegra114: Reprogram GIC CPU interface to bypass IRQ on CPU PM entry
There is a difference between GICv1 and v2 when CPU in power management
mode (aka CPU power down on Tegra). For GICv1, IRQ/FIQ interrupt lines
going to CPU are same lines which are also used for wake-interrupt.
Therefore, we cannot disable the GIC CPU interface if we need to use same
interrupts for CPU wake purpose. This creates a race condition for CPU
power off entry. Also, in GICv1, disabling GICv1 CPU interface puts GICv1
into bypass mode such that incoming legacy IRQ/FIQ are sent to CPU, which
means disabling GIC CPU interface doesn't really disable IRQ/FIQ to CPU.

GICv2 provides a wake IRQ/FIQ (for wake-event purpose), which are not
disabled by GIC CPU interface. This is done by adding a bypass override
capability when the interrupts are disabled at the CPU interface. To
support this, there are four bits about IRQ/FIQ BypassDisable in CPU
interface Control Register. When the IRQ/FIQ not being driver by the
CPU interface, each interrupt output signal can be deasserted rather
than being driven by the legacy interrupt input.

So the wake-event can be used as wakeup signals to SoC (system power
controller).

To prevent race conditions and ensure proper interrupt routing on
Cortex-A15 CPUs when they are power-gated, add a CPU PM notifier
call-back to reprogram the GIC CPU interface on PM entry. The
GIC CPU interface will be reset back to its normal state by
the common GIC CPU PM exit callback when the CPU wakes up.

Based on the work by: Scott Williams <scwilliams@nvidia.com>

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-07-19 10:07:14 -06:00
..
Kconfig ARM: tegra: enable Cortex-A15 erratum 798181 2013-07-15 12:21:01 -06:00
Makefile ARM: tegra114: add CPU hotplug support 2013-05-22 15:19:22 -06:00
apbio.c ARM: tegra: Make variables static 2013-01-28 10:21:28 -07:00
apbio.h ARM: tegra: apbio access using dma for tegra20 only 2012-07-06 11:48:56 -06:00
board-harmony-pcie.c Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm 2013-05-03 09:13:19 -07:00
board-paz00.c Merge branch 'multiplatform/platform-data' into next/multiplatform 2012-09-22 01:07:21 -07:00
board-paz00.h ARM: tegra: remove board (but not DT) support for Paz00 2012-09-14 11:31:36 -06:00
board.h reboot: arm: change reboot_mode to use enum reboot_mode 2013-07-09 10:33:29 -07:00
common.c reboot: arm: change reboot_mode to use enum reboot_mode 2013-07-09 10:33:29 -07:00
common.h Revert "ARM: tegra: add cpu_disable for hotplug" 2013-07-19 10:00:37 -06:00
cpuidle-tegra20.c ARM: tegra: don't pass CPU ID to tegra_{set,clear}_cpu_in_lp2 2013-06-05 11:44:58 -06:00
cpuidle-tegra30.c ARM: tegra: don't pass CPU ID to tegra_{set,clear}_cpu_in_lp2 2013-06-05 11:44:58 -06:00
cpuidle-tegra114.c ARM: tegra: cpuidle: use init/exit common routine 2013-04-23 13:45:22 +02:00
cpuidle.c ARM: tegra: cpuidle: using IS_ENABLED for multi SoCs management in init func 2013-06-05 11:44:54 -06:00
cpuidle.h ARM: tegra: cpuidle: using IS_ENABLED for multi SoCs management in init func 2013-06-05 11:44:54 -06:00
flowctrl.c ARM: tegra20: flowctrl: add support for cpu_suspend_enter/exit 2013-01-28 11:20:38 -07:00
flowctrl.h ARM: tegra114: add power up sequence for warm boot CPU 2013-05-22 15:19:22 -06:00
fuse.c ARM: tegra: add speedo-based process id for Tegra114 2013-03-19 11:52:06 -06:00
fuse.h ARM: tegra: add an assembly marco to check Tegra SoC ID 2013-05-22 15:19:21 -06:00
gpio-names.h [ARM] tegra: add GPIO support 2010-08-05 14:57:02 -07:00
headsmp.S ARM: tegra: don't unlock MMIO access to DBGLAR 2013-03-11 14:29:22 -06:00
hotplug.c Revert "ARM: tegra: add cpu_disable for hotplug" 2013-07-19 10:00:37 -06:00
io.c ARM: tegra: don't include iomap.h from debug-macro.S 2012-11-16 12:22:17 -07:00
iomap.h ARM: tegra: remove USB address related macros from iomap.h 2013-01-28 11:20:04 -07:00
irammap.h ARM: tegra: decouple uncompress.h and debug-macro.S 2012-11-16 12:22:17 -07:00
irq.c ARM: tegra114: Reprogram GIC CPU interface to bypass IRQ on CPU PM entry 2013-07-19 10:07:14 -06:00
irq.h ARM: tegra: irq: add wake up handling 2013-04-03 14:31:32 -06:00
pcie.c ARM: tegra: move <mach/powergate.h> to <linux/tegra-powergate.h> 2013-03-29 18:10:22 -06:00
platsmp.c Revert "ARM: tegra: add cpu_disable for hotplug" 2013-07-19 10:00:37 -06:00
pm.c ARM: tegra: don't pass CPU ID to tegra_{set,clear}_cpu_in_lp2 2013-06-05 11:44:58 -06:00
pm.h ARM: tegra: don't pass CPU ID to tegra_{set,clear}_cpu_in_lp2 2013-06-05 11:44:58 -06:00
pmc.c ARM: tegra: fix section mismatch in tegra_pmc_parse_dt 2013-06-25 11:16:15 -07:00
pmc.h ARM: tegra: pm: add platform suspend support 2013-04-03 14:31:41 -06:00
powergate.c ARM: arm-soc multiplatform updates for 3.10 2013-05-02 09:38:16 -07:00
reset-handler.S ARM: tegra: remove ifdef in the tegra_resume 2013-06-05 11:37:08 -06:00
reset.c ARM: tegra: make device can run on UP 2013-01-28 11:14:06 -07:00
reset.h ARM: tegra30: cpuidle: add powered-down state for secondary CPUs 2012-11-15 15:09:21 -07:00
sleep-tegra20.S ARM: tegra: call cpu_do_idle from C code 2013-04-29 16:51:59 +02:00
sleep-tegra30.S ARM: tegra114: add CPU hotplug support 2013-05-22 15:19:22 -06:00
sleep.S ARM: tegra: skip SCU and PL310 code when CPU is not Cortex-A9 2013-05-22 15:19:22 -06:00
sleep.h ARM: tegra114: add CPU hotplug support 2013-05-22 15:19:22 -06:00
tegra.c ARM: arm-soc driver changes for 3.10 2013-05-04 12:31:18 -07:00
tegra2_emc.c ARM: tegra: core SoC support enhancements 2013-06-14 18:11:31 -07:00
tegra2_emc.h ARM: tegra: emc: convert tegra2_emc to a platform driver 2012-02-06 18:24:59 -08:00
tegra20_speedo.c ARM: tegra: Add speedo-based process identification 2012-11-15 14:34:20 -07:00
tegra30_speedo.c ARM: tegra: Tegra30 speedo-based process identification 2012-11-15 14:36:59 -07:00
tegra114_speedo.c ARM: tegra: add speedo-based process id for Tegra114 2013-03-19 11:52:06 -06:00