mirror of https://gitee.com/openkylin/linux.git
735 lines
17 KiB
C
735 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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Montage Technology TS2020 - Silicon Tuner driver
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Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
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Copyright (C) 2009-2012 TurboSight.com
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*/
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#include <media/dvb_frontend.h>
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#include "ts2020.h"
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#include <linux/regmap.h>
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#include <linux/math64.h>
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#define TS2020_XTAL_FREQ 27000 /* in kHz */
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#define FREQ_OFFSET_LOW_SYM_RATE 3000
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struct ts2020_priv {
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struct i2c_client *client;
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struct mutex regmap_mutex;
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struct regmap_config regmap_config;
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struct regmap *regmap;
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struct dvb_frontend *fe;
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struct delayed_work stat_work;
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int (*get_agc_pwm)(struct dvb_frontend *fe, u8 *_agc_pwm);
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/* i2c details */
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struct i2c_adapter *i2c;
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int i2c_address;
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bool loop_through:1;
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u8 clk_out:2;
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u8 clk_out_div:5;
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bool dont_poll:1;
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u32 frequency_div; /* LO output divider switch frequency */
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u32 frequency_khz; /* actual used LO frequency */
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#define TS2020_M88TS2020 0
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#define TS2020_M88TS2022 1
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u8 tuner;
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};
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struct ts2020_reg_val {
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u8 reg;
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u8 val;
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};
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static void ts2020_stat_work(struct work_struct *work);
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static void ts2020_release(struct dvb_frontend *fe)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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struct i2c_client *client = priv->client;
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dev_dbg(&client->dev, "\n");
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i2c_unregister_device(client);
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}
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static int ts2020_sleep(struct dvb_frontend *fe)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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int ret;
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u8 u8tmp;
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if (priv->tuner == TS2020_M88TS2020)
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u8tmp = 0x0a; /* XXX: probably wrong */
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else
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u8tmp = 0x00;
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ret = regmap_write(priv->regmap, u8tmp, 0x00);
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if (ret < 0)
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return ret;
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/* stop statistics polling */
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if (!priv->dont_poll)
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cancel_delayed_work_sync(&priv->stat_work);
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return 0;
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}
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static int ts2020_init(struct dvb_frontend *fe)
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{
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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struct ts2020_priv *priv = fe->tuner_priv;
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int i;
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u8 u8tmp;
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if (priv->tuner == TS2020_M88TS2020) {
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regmap_write(priv->regmap, 0x42, 0x73);
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regmap_write(priv->regmap, 0x05, priv->clk_out_div);
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regmap_write(priv->regmap, 0x20, 0x27);
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regmap_write(priv->regmap, 0x07, 0x02);
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regmap_write(priv->regmap, 0x11, 0xff);
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regmap_write(priv->regmap, 0x60, 0xf9);
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regmap_write(priv->regmap, 0x08, 0x01);
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regmap_write(priv->regmap, 0x00, 0x41);
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} else {
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static const struct ts2020_reg_val reg_vals[] = {
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{0x7d, 0x9d},
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{0x7c, 0x9a},
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{0x7a, 0x76},
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{0x3b, 0x01},
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{0x63, 0x88},
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{0x61, 0x85},
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{0x22, 0x30},
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{0x30, 0x40},
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{0x20, 0x23},
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{0x24, 0x02},
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{0x12, 0xa0},
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};
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regmap_write(priv->regmap, 0x00, 0x01);
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regmap_write(priv->regmap, 0x00, 0x03);
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switch (priv->clk_out) {
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case TS2020_CLK_OUT_DISABLED:
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u8tmp = 0x60;
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break;
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case TS2020_CLK_OUT_ENABLED:
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u8tmp = 0x70;
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regmap_write(priv->regmap, 0x05, priv->clk_out_div);
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break;
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case TS2020_CLK_OUT_ENABLED_XTALOUT:
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u8tmp = 0x6c;
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break;
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default:
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u8tmp = 0x60;
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break;
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}
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regmap_write(priv->regmap, 0x42, u8tmp);
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if (priv->loop_through)
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u8tmp = 0xec;
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else
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u8tmp = 0x6c;
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regmap_write(priv->regmap, 0x62, u8tmp);
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for (i = 0; i < ARRAY_SIZE(reg_vals); i++)
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regmap_write(priv->regmap, reg_vals[i].reg,
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reg_vals[i].val);
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}
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/* Initialise v5 stats here */
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c->strength.len = 1;
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c->strength.stat[0].scale = FE_SCALE_DECIBEL;
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c->strength.stat[0].uvalue = 0;
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/* Start statistics polling by invoking the work function */
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ts2020_stat_work(&priv->stat_work.work);
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return 0;
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}
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static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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int ret;
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ret = regmap_write(priv->regmap, 0x51, 0x1f - offset);
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ret |= regmap_write(priv->regmap, 0x51, 0x1f);
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ret |= regmap_write(priv->regmap, 0x50, offset);
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ret |= regmap_write(priv->regmap, 0x50, 0x00);
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msleep(20);
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return ret;
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}
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static int ts2020_set_tuner_rf(struct dvb_frontend *fe)
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{
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struct ts2020_priv *dev = fe->tuner_priv;
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int ret;
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unsigned int utmp;
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ret = regmap_read(dev->regmap, 0x3d, &utmp);
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if (ret)
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return ret;
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utmp &= 0x7f;
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if (utmp < 0x16)
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utmp = 0xa1;
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else if (utmp == 0x16)
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utmp = 0x99;
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else
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utmp = 0xf9;
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regmap_write(dev->regmap, 0x60, utmp);
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ret = ts2020_tuner_gate_ctrl(fe, 0x08);
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return ret;
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}
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static int ts2020_set_params(struct dvb_frontend *fe)
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{
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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struct ts2020_priv *priv = fe->tuner_priv;
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int ret;
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unsigned int utmp;
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u32 f3db, gdiv28;
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u16 u16tmp, value, lpf_coeff;
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u8 buf[3], reg10, lpf_mxdiv, mlpf_max, mlpf_min, nlpf;
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unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n;
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unsigned int frequency_khz = c->frequency;
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/*
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* Integer-N PLL synthesizer
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* kHz is used for all calculations to keep calculations within 32-bit
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*/
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f_ref_khz = TS2020_XTAL_FREQ;
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div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);
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/* select LO output divider */
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if (frequency_khz < priv->frequency_div) {
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div_out = 4;
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reg10 = 0x10;
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} else {
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div_out = 2;
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reg10 = 0x00;
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}
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f_vco_khz = frequency_khz * div_out;
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pll_n = f_vco_khz * div_ref / f_ref_khz;
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pll_n += pll_n % 2;
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priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;
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pr_debug("frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",
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priv->frequency_khz, priv->frequency_khz - c->frequency,
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f_vco_khz, pll_n, div_ref, div_out);
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if (priv->tuner == TS2020_M88TS2020) {
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lpf_coeff = 2766;
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reg10 |= 0x01;
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ret = regmap_write(priv->regmap, 0x10, reg10);
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} else {
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lpf_coeff = 3200;
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reg10 |= 0x0b;
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ret = regmap_write(priv->regmap, 0x10, reg10);
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ret |= regmap_write(priv->regmap, 0x11, 0x40);
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}
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u16tmp = pll_n - 1024;
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buf[0] = (u16tmp >> 8) & 0xff;
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buf[1] = (u16tmp >> 0) & 0xff;
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buf[2] = div_ref - 8;
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ret |= regmap_write(priv->regmap, 0x01, buf[0]);
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ret |= regmap_write(priv->regmap, 0x02, buf[1]);
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ret |= regmap_write(priv->regmap, 0x03, buf[2]);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x10);
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if (ret < 0)
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return -ENODEV;
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ret |= ts2020_tuner_gate_ctrl(fe, 0x08);
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/* Tuner RF */
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if (priv->tuner == TS2020_M88TS2020)
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ret |= ts2020_set_tuner_rf(fe);
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gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000;
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ret |= regmap_write(priv->regmap, 0x04, gdiv28 & 0xff);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
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if (ret < 0)
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return -ENODEV;
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if (priv->tuner == TS2020_M88TS2022) {
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ret = regmap_write(priv->regmap, 0x25, 0x00);
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ret |= regmap_write(priv->regmap, 0x27, 0x70);
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ret |= regmap_write(priv->regmap, 0x41, 0x09);
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ret |= regmap_write(priv->regmap, 0x08, 0x0b);
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if (ret < 0)
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return -ENODEV;
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}
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regmap_read(priv->regmap, 0x26, &utmp);
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value = utmp;
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f3db = (c->bandwidth_hz / 1000 / 2) + 2000;
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f3db += FREQ_OFFSET_LOW_SYM_RATE; /* FIXME: ~always too wide filter */
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f3db = clamp(f3db, 7000U, 40000U);
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gdiv28 = gdiv28 * 207 / (value * 2 + 151);
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mlpf_max = gdiv28 * 135 / 100;
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mlpf_min = gdiv28 * 78 / 100;
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if (mlpf_max > 63)
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mlpf_max = 63;
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nlpf = (f3db * gdiv28 * 2 / lpf_coeff /
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(TS2020_XTAL_FREQ / 1000) + 1) / 2;
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if (nlpf > 23)
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nlpf = 23;
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if (nlpf < 1)
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nlpf = 1;
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lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
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* lpf_coeff * 2 / f3db + 1) / 2;
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if (lpf_mxdiv < mlpf_min) {
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nlpf++;
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lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
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* lpf_coeff * 2 / f3db + 1) / 2;
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}
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if (lpf_mxdiv > mlpf_max)
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lpf_mxdiv = mlpf_max;
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ret = regmap_write(priv->regmap, 0x04, lpf_mxdiv);
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ret |= regmap_write(priv->regmap, 0x06, nlpf);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
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ret |= ts2020_tuner_gate_ctrl(fe, 0x01);
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msleep(80);
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return (ret < 0) ? -EINVAL : 0;
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}
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static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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*frequency = priv->frequency_khz;
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return 0;
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}
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static int ts2020_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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*frequency = 0; /* Zero-IF */
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return 0;
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}
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/*
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* Get the tuner gain.
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* @fe: The front end for which we're determining the gain
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* @v_agc: The voltage of the AGC from the demodulator (0-2600mV)
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* @_gain: Where to store the gain (in 0.001dB units)
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*
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* Returns 0 or a negative error code.
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*/
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static int ts2020_read_tuner_gain(struct dvb_frontend *fe, unsigned v_agc,
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__s64 *_gain)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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unsigned long gain1, gain2, gain3;
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unsigned utmp;
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int ret;
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/* Read the RF gain */
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ret = regmap_read(priv->regmap, 0x3d, &utmp);
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if (ret < 0)
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return ret;
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gain1 = utmp & 0x1f;
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/* Read the baseband gain */
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ret = regmap_read(priv->regmap, 0x21, &utmp);
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if (ret < 0)
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return ret;
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gain2 = utmp & 0x1f;
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switch (priv->tuner) {
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case TS2020_M88TS2020:
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gain1 = clamp_t(long, gain1, 0, 15);
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gain2 = clamp_t(long, gain2, 0, 13);
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v_agc = clamp_t(long, v_agc, 400, 1100);
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*_gain = -((__s64)gain1 * 2330 +
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gain2 * 3500 +
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v_agc * 24 / 10 * 10 +
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10000);
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/* gain in range -19600 to -116850 in units of 0.001dB */
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break;
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case TS2020_M88TS2022:
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ret = regmap_read(priv->regmap, 0x66, &utmp);
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if (ret < 0)
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return ret;
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gain3 = (utmp >> 3) & 0x07;
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gain1 = clamp_t(long, gain1, 0, 15);
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gain2 = clamp_t(long, gain2, 2, 16);
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gain3 = clamp_t(long, gain3, 0, 6);
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v_agc = clamp_t(long, v_agc, 600, 1600);
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*_gain = -((__s64)gain1 * 2650 +
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gain2 * 3380 +
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gain3 * 2850 +
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v_agc * 176 / 100 * 10 -
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30000);
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/* gain in range -47320 to -158950 in units of 0.001dB */
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break;
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}
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return 0;
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}
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/*
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* Get the AGC information from the demodulator and use that to calculate the
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* tuner gain.
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*/
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static int ts2020_get_tuner_gain(struct dvb_frontend *fe, __s64 *_gain)
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{
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struct ts2020_priv *priv = fe->tuner_priv;
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int v_agc = 0, ret;
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u8 agc_pwm;
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/* Read the AGC PWM rate from the demodulator */
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if (priv->get_agc_pwm) {
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ret = priv->get_agc_pwm(fe, &agc_pwm);
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if (ret < 0)
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return ret;
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switch (priv->tuner) {
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case TS2020_M88TS2020:
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v_agc = (int)agc_pwm * 20 - 1166;
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break;
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case TS2020_M88TS2022:
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v_agc = (int)agc_pwm * 16 - 670;
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break;
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}
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if (v_agc < 0)
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v_agc = 0;
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}
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return ts2020_read_tuner_gain(fe, v_agc, _gain);
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}
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/*
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* Gather statistics on a regular basis
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*/
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static void ts2020_stat_work(struct work_struct *work)
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{
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struct ts2020_priv *priv = container_of(work, struct ts2020_priv,
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stat_work.work);
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struct i2c_client *client = priv->client;
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struct dtv_frontend_properties *c = &priv->fe->dtv_property_cache;
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int ret;
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dev_dbg(&client->dev, "\n");
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ret = ts2020_get_tuner_gain(priv->fe, &c->strength.stat[0].svalue);
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if (ret < 0)
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goto err;
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c->strength.stat[0].scale = FE_SCALE_DECIBEL;
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if (!priv->dont_poll)
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schedule_delayed_work(&priv->stat_work, msecs_to_jiffies(2000));
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return;
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err:
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dev_dbg(&client->dev, "failed=%d\n", ret);
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}
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/*
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* Read TS2020 signal strength in v3 format.
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*/
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static int ts2020_read_signal_strength(struct dvb_frontend *fe,
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u16 *_signal_strength)
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{
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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struct ts2020_priv *priv = fe->tuner_priv;
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unsigned strength;
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__s64 gain;
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if (priv->dont_poll)
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ts2020_stat_work(&priv->stat_work.work);
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if (c->strength.stat[0].scale == FE_SCALE_NOT_AVAILABLE) {
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*_signal_strength = 0;
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return 0;
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}
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gain = c->strength.stat[0].svalue;
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/* Calculate the signal strength based on the total gain of the tuner */
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if (gain < -85000)
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/* 0%: no signal or weak signal */
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strength = 0;
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else if (gain < -65000)
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/* 0% - 60%: weak signal */
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strength = 0 + div64_s64((85000 + gain) * 3, 1000);
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else if (gain < -45000)
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/* 60% - 90%: normal signal */
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strength = 60 + div64_s64((65000 + gain) * 3, 2000);
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else
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/* 90% - 99%: strong signal */
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strength = 90 + div64_s64((45000 + gain), 5000);
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*_signal_strength = strength * 65535 / 100;
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return 0;
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}
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static const struct dvb_tuner_ops ts2020_tuner_ops = {
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.info = {
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.name = "TS2020",
|
|
.frequency_min_hz = 950 * MHz,
|
|
.frequency_max_hz = 2150 * MHz
|
|
},
|
|
.init = ts2020_init,
|
|
.release = ts2020_release,
|
|
.sleep = ts2020_sleep,
|
|
.set_params = ts2020_set_params,
|
|
.get_frequency = ts2020_get_frequency,
|
|
.get_if_frequency = ts2020_get_if_frequency,
|
|
.get_rf_strength = ts2020_read_signal_strength,
|
|
};
|
|
|
|
struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe,
|
|
const struct ts2020_config *config,
|
|
struct i2c_adapter *i2c)
|
|
{
|
|
struct i2c_client *client;
|
|
struct i2c_board_info board_info;
|
|
|
|
/* This is only used by ts2020_probe() so can be on the stack */
|
|
struct ts2020_config pdata;
|
|
|
|
memcpy(&pdata, config, sizeof(pdata));
|
|
pdata.fe = fe;
|
|
pdata.attach_in_use = true;
|
|
|
|
memset(&board_info, 0, sizeof(board_info));
|
|
strscpy(board_info.type, "ts2020", I2C_NAME_SIZE);
|
|
board_info.addr = config->tuner_address;
|
|
board_info.platform_data = &pdata;
|
|
client = i2c_new_client_device(i2c, &board_info);
|
|
if (!i2c_client_has_driver(client))
|
|
return NULL;
|
|
|
|
return fe;
|
|
}
|
|
EXPORT_SYMBOL(ts2020_attach);
|
|
|
|
/*
|
|
* We implement own regmap locking due to legacy DVB attach which uses frontend
|
|
* gate control callback to control I2C bus access. We can open / close gate and
|
|
* serialize whole open / I2C-operation / close sequence at the same.
|
|
*/
|
|
static void ts2020_regmap_lock(void *__dev)
|
|
{
|
|
struct ts2020_priv *dev = __dev;
|
|
|
|
mutex_lock(&dev->regmap_mutex);
|
|
if (dev->fe->ops.i2c_gate_ctrl)
|
|
dev->fe->ops.i2c_gate_ctrl(dev->fe, 1);
|
|
}
|
|
|
|
static void ts2020_regmap_unlock(void *__dev)
|
|
{
|
|
struct ts2020_priv *dev = __dev;
|
|
|
|
if (dev->fe->ops.i2c_gate_ctrl)
|
|
dev->fe->ops.i2c_gate_ctrl(dev->fe, 0);
|
|
mutex_unlock(&dev->regmap_mutex);
|
|
}
|
|
|
|
static int ts2020_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct ts2020_config *pdata = client->dev.platform_data;
|
|
struct dvb_frontend *fe = pdata->fe;
|
|
struct ts2020_priv *dev;
|
|
int ret;
|
|
u8 u8tmp;
|
|
unsigned int utmp;
|
|
char *chip_str;
|
|
|
|
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
|
|
if (!dev) {
|
|
ret = -ENOMEM;
|
|
goto err;
|
|
}
|
|
|
|
/* create regmap */
|
|
mutex_init(&dev->regmap_mutex);
|
|
dev->regmap_config.reg_bits = 8,
|
|
dev->regmap_config.val_bits = 8,
|
|
dev->regmap_config.lock = ts2020_regmap_lock,
|
|
dev->regmap_config.unlock = ts2020_regmap_unlock,
|
|
dev->regmap_config.lock_arg = dev,
|
|
dev->regmap = regmap_init_i2c(client, &dev->regmap_config);
|
|
if (IS_ERR(dev->regmap)) {
|
|
ret = PTR_ERR(dev->regmap);
|
|
goto err_kfree;
|
|
}
|
|
|
|
dev->i2c = client->adapter;
|
|
dev->i2c_address = client->addr;
|
|
dev->loop_through = pdata->loop_through;
|
|
dev->clk_out = pdata->clk_out;
|
|
dev->clk_out_div = pdata->clk_out_div;
|
|
dev->dont_poll = pdata->dont_poll;
|
|
dev->frequency_div = pdata->frequency_div;
|
|
dev->fe = fe;
|
|
dev->get_agc_pwm = pdata->get_agc_pwm;
|
|
fe->tuner_priv = dev;
|
|
dev->client = client;
|
|
INIT_DELAYED_WORK(&dev->stat_work, ts2020_stat_work);
|
|
|
|
/* check if the tuner is there */
|
|
ret = regmap_read(dev->regmap, 0x00, &utmp);
|
|
if (ret)
|
|
goto err_regmap_exit;
|
|
|
|
if ((utmp & 0x03) == 0x00) {
|
|
ret = regmap_write(dev->regmap, 0x00, 0x01);
|
|
if (ret)
|
|
goto err_regmap_exit;
|
|
|
|
usleep_range(2000, 50000);
|
|
}
|
|
|
|
ret = regmap_write(dev->regmap, 0x00, 0x03);
|
|
if (ret)
|
|
goto err_regmap_exit;
|
|
|
|
usleep_range(2000, 50000);
|
|
|
|
ret = regmap_read(dev->regmap, 0x00, &utmp);
|
|
if (ret)
|
|
goto err_regmap_exit;
|
|
|
|
dev_dbg(&client->dev, "chip_id=%02x\n", utmp);
|
|
|
|
switch (utmp) {
|
|
case 0x01:
|
|
case 0x41:
|
|
case 0x81:
|
|
dev->tuner = TS2020_M88TS2020;
|
|
chip_str = "TS2020";
|
|
if (!dev->frequency_div)
|
|
dev->frequency_div = 1060000;
|
|
break;
|
|
case 0xc3:
|
|
case 0x83:
|
|
dev->tuner = TS2020_M88TS2022;
|
|
chip_str = "TS2022";
|
|
if (!dev->frequency_div)
|
|
dev->frequency_div = 1103000;
|
|
break;
|
|
default:
|
|
ret = -ENODEV;
|
|
goto err_regmap_exit;
|
|
}
|
|
|
|
if (dev->tuner == TS2020_M88TS2022) {
|
|
switch (dev->clk_out) {
|
|
case TS2020_CLK_OUT_DISABLED:
|
|
u8tmp = 0x60;
|
|
break;
|
|
case TS2020_CLK_OUT_ENABLED:
|
|
u8tmp = 0x70;
|
|
ret = regmap_write(dev->regmap, 0x05, dev->clk_out_div);
|
|
if (ret)
|
|
goto err_regmap_exit;
|
|
break;
|
|
case TS2020_CLK_OUT_ENABLED_XTALOUT:
|
|
u8tmp = 0x6c;
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
goto err_regmap_exit;
|
|
}
|
|
|
|
ret = regmap_write(dev->regmap, 0x42, u8tmp);
|
|
if (ret)
|
|
goto err_regmap_exit;
|
|
|
|
if (dev->loop_through)
|
|
u8tmp = 0xec;
|
|
else
|
|
u8tmp = 0x6c;
|
|
|
|
ret = regmap_write(dev->regmap, 0x62, u8tmp);
|
|
if (ret)
|
|
goto err_regmap_exit;
|
|
}
|
|
|
|
/* sleep */
|
|
ret = regmap_write(dev->regmap, 0x00, 0x00);
|
|
if (ret)
|
|
goto err_regmap_exit;
|
|
|
|
dev_info(&client->dev,
|
|
"Montage Technology %s successfully identified\n", chip_str);
|
|
|
|
memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops,
|
|
sizeof(struct dvb_tuner_ops));
|
|
if (!pdata->attach_in_use)
|
|
fe->ops.tuner_ops.release = NULL;
|
|
|
|
i2c_set_clientdata(client, dev);
|
|
return 0;
|
|
err_regmap_exit:
|
|
regmap_exit(dev->regmap);
|
|
err_kfree:
|
|
kfree(dev);
|
|
err:
|
|
dev_dbg(&client->dev, "failed=%d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
static int ts2020_remove(struct i2c_client *client)
|
|
{
|
|
struct ts2020_priv *dev = i2c_get_clientdata(client);
|
|
|
|
dev_dbg(&client->dev, "\n");
|
|
|
|
/* stop statistics polling */
|
|
if (!dev->dont_poll)
|
|
cancel_delayed_work_sync(&dev->stat_work);
|
|
|
|
regmap_exit(dev->regmap);
|
|
kfree(dev);
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id ts2020_id_table[] = {
|
|
{"ts2020", 0},
|
|
{"ts2022", 0},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, ts2020_id_table);
|
|
|
|
static struct i2c_driver ts2020_driver = {
|
|
.driver = {
|
|
.name = "ts2020",
|
|
},
|
|
.probe = ts2020_probe,
|
|
.remove = ts2020_remove,
|
|
.id_table = ts2020_id_table,
|
|
};
|
|
|
|
module_i2c_driver(ts2020_driver);
|
|
|
|
MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>");
|
|
MODULE_DESCRIPTION("Montage Technology TS2020 - Silicon tuner driver module");
|
|
MODULE_LICENSE("GPL");
|