mirror of https://gitee.com/openkylin/linux.git
770 lines
18 KiB
C
770 lines
18 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* w1_ds28e17.c - w1 family 19 (DS28E17) driver
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*
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* Copyright (c) 2016 Jan Kandziora <jjj@gmx.de>
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*/
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#include <linux/crc16.h>
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#include <linux/delay.h>
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#include <linux/device.h>
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#include <linux/i2c.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/uaccess.h>
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#define CRC16_INIT 0
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#include <linux/w1.h>
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#define W1_FAMILY_DS28E17 0x19
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/* Module setup. */
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Jan Kandziora <jjj@gmx.de>");
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MODULE_DESCRIPTION("w1 family 19 driver for DS28E17, 1-wire to I2C master bridge");
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MODULE_ALIAS("w1-family-" __stringify(W1_FAMILY_DS28E17));
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/* Default I2C speed to be set when a DS28E17 is detected. */
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static int i2c_speed = 100;
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module_param_named(speed, i2c_speed, int, (S_IRUSR | S_IWUSR));
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MODULE_PARM_DESC(speed, "Default I2C speed to be set when a DS28E17 is detected");
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/* Default I2C stretch value to be set when a DS28E17 is detected. */
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static char i2c_stretch = 1;
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module_param_named(stretch, i2c_stretch, byte, (S_IRUSR | S_IWUSR));
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MODULE_PARM_DESC(stretch, "Default I2C stretch value to be set when a DS28E17 is detected");
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/* DS28E17 device command codes. */
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#define W1_F19_WRITE_DATA_WITH_STOP 0x4B
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#define W1_F19_WRITE_DATA_NO_STOP 0x5A
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#define W1_F19_WRITE_DATA_ONLY 0x69
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#define W1_F19_WRITE_DATA_ONLY_WITH_STOP 0x78
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#define W1_F19_READ_DATA_WITH_STOP 0x87
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#define W1_F19_WRITE_READ_DATA_WITH_STOP 0x2D
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#define W1_F19_WRITE_CONFIGURATION 0xD2
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#define W1_F19_READ_CONFIGURATION 0xE1
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#define W1_F19_ENABLE_SLEEP_MODE 0x1E
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#define W1_F19_READ_DEVICE_REVISION 0xC4
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/* DS28E17 status bits */
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#define W1_F19_STATUS_CRC 0x01
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#define W1_F19_STATUS_ADDRESS 0x02
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#define W1_F19_STATUS_START 0x08
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/*
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* Maximum number of I2C bytes to transfer within one CRC16 protected onewire
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* command.
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* */
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#define W1_F19_WRITE_DATA_LIMIT 255
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/* Maximum number of I2C bytes to read with one onewire command. */
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#define W1_F19_READ_DATA_LIMIT 255
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/* Constants for calculating the busy sleep. */
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#define W1_F19_BUSY_TIMEBASES { 90, 23, 10 }
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#define W1_F19_BUSY_GRATUITY 1000
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/* Number of checks for the busy flag before timeout. */
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#define W1_F19_BUSY_CHECKS 1000
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/* Slave specific data. */
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struct w1_f19_data {
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u8 speed;
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u8 stretch;
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struct i2c_adapter adapter;
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};
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/* Wait a while until the busy flag clears. */
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static int w1_f19_i2c_busy_wait(struct w1_slave *sl, size_t count)
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{
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const unsigned long timebases[3] = W1_F19_BUSY_TIMEBASES;
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struct w1_f19_data *data = sl->family_data;
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unsigned int checks;
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/* Check the busy flag first in any case.*/
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if (w1_touch_bit(sl->master, 1) == 0)
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return 0;
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/*
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* Do a generously long sleep in the beginning,
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* as we have to wait at least this time for all
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* the I2C bytes at the given speed to be transferred.
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*/
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usleep_range(timebases[data->speed] * (data->stretch) * count,
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timebases[data->speed] * (data->stretch) * count
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+ W1_F19_BUSY_GRATUITY);
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/* Now continusly check the busy flag sent by the DS28E17. */
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checks = W1_F19_BUSY_CHECKS;
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while ((checks--) > 0) {
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/* Return success if the busy flag is cleared. */
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if (w1_touch_bit(sl->master, 1) == 0)
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return 0;
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/* Wait one non-streched byte timeslot. */
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udelay(timebases[data->speed]);
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}
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/* Timeout. */
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dev_warn(&sl->dev, "busy timeout\n");
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return -ETIMEDOUT;
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}
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/* Utility function: result. */
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static size_t w1_f19_error(struct w1_slave *sl, u8 w1_buf[])
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{
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/* Warnings. */
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if (w1_buf[0] & W1_F19_STATUS_CRC)
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dev_warn(&sl->dev, "crc16 mismatch\n");
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if (w1_buf[0] & W1_F19_STATUS_ADDRESS)
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dev_warn(&sl->dev, "i2c device not responding\n");
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if ((w1_buf[0] & (W1_F19_STATUS_CRC | W1_F19_STATUS_ADDRESS)) == 0
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&& w1_buf[1] != 0) {
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dev_warn(&sl->dev, "i2c short write, %d bytes not acknowledged\n",
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w1_buf[1]);
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}
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/* Check error conditions. */
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if (w1_buf[0] & W1_F19_STATUS_ADDRESS)
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return -ENXIO;
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if (w1_buf[0] & W1_F19_STATUS_START)
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return -EAGAIN;
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if (w1_buf[0] != 0 || w1_buf[1] != 0)
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return -EIO;
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/* All ok. */
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return 0;
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}
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/* Utility function: write data to I2C slave, single chunk. */
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static int __w1_f19_i2c_write(struct w1_slave *sl,
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const u8 *command, size_t command_count,
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const u8 *buffer, size_t count)
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{
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u16 crc;
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int error;
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u8 w1_buf[2];
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/* Send command and I2C data to DS28E17. */
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crc = crc16(CRC16_INIT, command, command_count);
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w1_write_block(sl->master, command, command_count);
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w1_buf[0] = count;
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crc = crc16(crc, w1_buf, 1);
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w1_write_8(sl->master, w1_buf[0]);
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crc = crc16(crc, buffer, count);
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w1_write_block(sl->master, buffer, count);
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w1_buf[0] = ~(crc & 0xFF);
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w1_buf[1] = ~((crc >> 8) & 0xFF);
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w1_write_block(sl->master, w1_buf, 2);
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/* Wait until busy flag clears (or timeout). */
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if (w1_f19_i2c_busy_wait(sl, count + 1) < 0)
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return -ETIMEDOUT;
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/* Read status from DS28E17. */
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w1_read_block(sl->master, w1_buf, 2);
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/* Check error conditions. */
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error = w1_f19_error(sl, w1_buf);
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if (error < 0)
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return error;
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/* Return number of bytes written. */
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return count;
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}
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/* Write data to I2C slave. */
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static int w1_f19_i2c_write(struct w1_slave *sl, u16 i2c_address,
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const u8 *buffer, size_t count, bool stop)
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{
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int result;
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int remaining = count;
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const u8 *p;
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u8 command[2];
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/* Check input. */
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if (count == 0)
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return -EOPNOTSUPP;
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/* Check whether we need multiple commands. */
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if (count <= W1_F19_WRITE_DATA_LIMIT) {
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/*
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* Small data amount. Data can be sent with
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* a single onewire command.
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*/
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/* Send all data to DS28E17. */
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command[0] = (stop ? W1_F19_WRITE_DATA_WITH_STOP
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: W1_F19_WRITE_DATA_NO_STOP);
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command[1] = i2c_address << 1;
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result = __w1_f19_i2c_write(sl, command, 2, buffer, count);
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} else {
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/* Large data amount. Data has to be sent in multiple chunks. */
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/* Send first chunk to DS28E17. */
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p = buffer;
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command[0] = W1_F19_WRITE_DATA_NO_STOP;
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command[1] = i2c_address << 1;
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result = __w1_f19_i2c_write(sl, command, 2, p,
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W1_F19_WRITE_DATA_LIMIT);
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if (result < 0)
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return result;
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/* Resume to same DS28E17. */
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if (w1_reset_resume_command(sl->master))
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return -EIO;
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/* Next data chunk. */
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p += W1_F19_WRITE_DATA_LIMIT;
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remaining -= W1_F19_WRITE_DATA_LIMIT;
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while (remaining > W1_F19_WRITE_DATA_LIMIT) {
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/* Send intermediate chunk to DS28E17. */
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command[0] = W1_F19_WRITE_DATA_ONLY;
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result = __w1_f19_i2c_write(sl, command, 1, p,
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W1_F19_WRITE_DATA_LIMIT);
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if (result < 0)
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return result;
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/* Resume to same DS28E17. */
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if (w1_reset_resume_command(sl->master))
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return -EIO;
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/* Next data chunk. */
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p += W1_F19_WRITE_DATA_LIMIT;
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remaining -= W1_F19_WRITE_DATA_LIMIT;
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}
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/* Send final chunk to DS28E17. */
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command[0] = (stop ? W1_F19_WRITE_DATA_ONLY_WITH_STOP
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: W1_F19_WRITE_DATA_ONLY);
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result = __w1_f19_i2c_write(sl, command, 1, p, remaining);
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}
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return result;
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}
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/* Read data from I2C slave. */
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static int w1_f19_i2c_read(struct w1_slave *sl, u16 i2c_address,
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u8 *buffer, size_t count)
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{
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u16 crc;
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int error;
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u8 w1_buf[5];
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/* Check input. */
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if (count == 0)
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return -EOPNOTSUPP;
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/* Send command to DS28E17. */
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w1_buf[0] = W1_F19_READ_DATA_WITH_STOP;
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w1_buf[1] = i2c_address << 1 | 0x01;
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w1_buf[2] = count;
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crc = crc16(CRC16_INIT, w1_buf, 3);
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w1_buf[3] = ~(crc & 0xFF);
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w1_buf[4] = ~((crc >> 8) & 0xFF);
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w1_write_block(sl->master, w1_buf, 5);
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/* Wait until busy flag clears (or timeout). */
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if (w1_f19_i2c_busy_wait(sl, count + 1) < 0)
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return -ETIMEDOUT;
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/* Read status from DS28E17. */
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w1_buf[0] = w1_read_8(sl->master);
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w1_buf[1] = 0;
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/* Check error conditions. */
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error = w1_f19_error(sl, w1_buf);
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if (error < 0)
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return error;
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/* Read received I2C data from DS28E17. */
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return w1_read_block(sl->master, buffer, count);
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}
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/* Write to, then read data from I2C slave. */
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static int w1_f19_i2c_write_read(struct w1_slave *sl, u16 i2c_address,
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const u8 *wbuffer, size_t wcount, u8 *rbuffer, size_t rcount)
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{
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u16 crc;
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int error;
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u8 w1_buf[3];
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/* Check input. */
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if (wcount == 0 || rcount == 0)
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return -EOPNOTSUPP;
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/* Send command and I2C data to DS28E17. */
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w1_buf[0] = W1_F19_WRITE_READ_DATA_WITH_STOP;
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w1_buf[1] = i2c_address << 1;
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w1_buf[2] = wcount;
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crc = crc16(CRC16_INIT, w1_buf, 3);
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w1_write_block(sl->master, w1_buf, 3);
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crc = crc16(crc, wbuffer, wcount);
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w1_write_block(sl->master, wbuffer, wcount);
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w1_buf[0] = rcount;
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crc = crc16(crc, w1_buf, 1);
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w1_buf[1] = ~(crc & 0xFF);
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w1_buf[2] = ~((crc >> 8) & 0xFF);
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w1_write_block(sl->master, w1_buf, 3);
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/* Wait until busy flag clears (or timeout). */
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if (w1_f19_i2c_busy_wait(sl, wcount + rcount + 2) < 0)
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return -ETIMEDOUT;
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/* Read status from DS28E17. */
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w1_read_block(sl->master, w1_buf, 2);
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/* Check error conditions. */
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error = w1_f19_error(sl, w1_buf);
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if (error < 0)
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return error;
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/* Read received I2C data from DS28E17. */
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return w1_read_block(sl->master, rbuffer, rcount);
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}
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/* Do an I2C master transfer. */
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static int w1_f19_i2c_master_transfer(struct i2c_adapter *adapter,
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struct i2c_msg *msgs, int num)
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{
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struct w1_slave *sl = (struct w1_slave *) adapter->algo_data;
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int i = 0;
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int result = 0;
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/* Start onewire transaction. */
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mutex_lock(&sl->master->bus_mutex);
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/* Select DS28E17. */
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if (w1_reset_select_slave(sl)) {
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i = -EIO;
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goto error;
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}
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/* Loop while there are still messages to transfer. */
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while (i < num) {
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/*
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* Check for special case: Small write followed
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* by read to same I2C device.
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*/
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if (i < (num-1)
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&& msgs[i].addr == msgs[i+1].addr
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&& !(msgs[i].flags & I2C_M_RD)
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&& (msgs[i+1].flags & I2C_M_RD)
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&& (msgs[i].len <= W1_F19_WRITE_DATA_LIMIT)) {
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/*
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* The DS28E17 has a combined transfer
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* for small write+read.
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*/
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result = w1_f19_i2c_write_read(sl, msgs[i].addr,
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msgs[i].buf, msgs[i].len,
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msgs[i+1].buf, msgs[i+1].len);
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if (result < 0) {
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i = result;
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goto error;
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}
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/*
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* Check if we should interpret the read data
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* as a length byte. The DS28E17 unfortunately
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* has no read without stop, so we can just do
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* another simple read in that case.
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*/
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if (msgs[i+1].flags & I2C_M_RECV_LEN) {
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result = w1_f19_i2c_read(sl, msgs[i+1].addr,
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&(msgs[i+1].buf[1]), msgs[i+1].buf[0]);
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if (result < 0) {
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i = result;
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goto error;
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}
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}
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/* Eat up read message, too. */
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i++;
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} else if (msgs[i].flags & I2C_M_RD) {
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/* Read transfer. */
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result = w1_f19_i2c_read(sl, msgs[i].addr,
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msgs[i].buf, msgs[i].len);
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if (result < 0) {
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i = result;
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goto error;
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}
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/*
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* Check if we should interpret the read data
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* as a length byte. The DS28E17 unfortunately
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* has no read without stop, so we can just do
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* another simple read in that case.
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*/
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if (msgs[i].flags & I2C_M_RECV_LEN) {
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result = w1_f19_i2c_read(sl,
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msgs[i].addr,
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&(msgs[i].buf[1]),
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msgs[i].buf[0]);
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if (result < 0) {
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i = result;
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goto error;
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}
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}
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} else {
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/*
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* Write transfer.
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* Stop condition only for last
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* transfer.
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*/
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result = w1_f19_i2c_write(sl,
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msgs[i].addr,
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msgs[i].buf,
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msgs[i].len,
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i == (num-1));
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if (result < 0) {
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i = result;
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goto error;
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}
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}
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/* Next message. */
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i++;
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/* Are there still messages to send/receive? */
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if (i < num) {
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/* Yes. Resume to same DS28E17. */
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if (w1_reset_resume_command(sl->master)) {
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i = -EIO;
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goto error;
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}
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}
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}
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error:
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/* End onewire transaction. */
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mutex_unlock(&sl->master->bus_mutex);
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/* Return number of messages processed or error. */
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return i;
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}
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/* Get I2C adapter functionality. */
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static u32 w1_f19_i2c_functionality(struct i2c_adapter *adapter)
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{
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/*
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* Plain I2C functions only.
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* SMBus is emulated by the kernel's I2C layer.
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* No "I2C_FUNC_SMBUS_QUICK"
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* No "I2C_FUNC_SMBUS_READ_BLOCK_DATA"
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* No "I2C_FUNC_SMBUS_BLOCK_PROC_CALL"
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*/
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return I2C_FUNC_I2C |
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I2C_FUNC_SMBUS_BYTE |
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I2C_FUNC_SMBUS_BYTE_DATA |
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I2C_FUNC_SMBUS_WORD_DATA |
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I2C_FUNC_SMBUS_PROC_CALL |
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I2C_FUNC_SMBUS_WRITE_BLOCK_DATA |
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I2C_FUNC_SMBUS_I2C_BLOCK |
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I2C_FUNC_SMBUS_PEC;
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}
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|
|
|
|
|
/* I2C adapter quirks. */
|
|
static const struct i2c_adapter_quirks w1_f19_i2c_adapter_quirks = {
|
|
.max_read_len = W1_F19_READ_DATA_LIMIT,
|
|
};
|
|
|
|
/* I2C algorithm. */
|
|
static const struct i2c_algorithm w1_f19_i2c_algorithm = {
|
|
.master_xfer = w1_f19_i2c_master_transfer,
|
|
.functionality = w1_f19_i2c_functionality,
|
|
};
|
|
|
|
|
|
/* Read I2C speed from DS28E17. */
|
|
static int w1_f19_get_i2c_speed(struct w1_slave *sl)
|
|
{
|
|
struct w1_f19_data *data = sl->family_data;
|
|
int result = -EIO;
|
|
|
|
/* Start onewire transaction. */
|
|
mutex_lock(&sl->master->bus_mutex);
|
|
|
|
/* Select slave. */
|
|
if (w1_reset_select_slave(sl))
|
|
goto error;
|
|
|
|
/* Read slave configuration byte. */
|
|
w1_write_8(sl->master, W1_F19_READ_CONFIGURATION);
|
|
result = w1_read_8(sl->master);
|
|
if (result < 0 || result > 2) {
|
|
result = -EIO;
|
|
goto error;
|
|
}
|
|
|
|
/* Update speed in slave specific data. */
|
|
data->speed = result;
|
|
|
|
error:
|
|
/* End onewire transaction. */
|
|
mutex_unlock(&sl->master->bus_mutex);
|
|
|
|
return result;
|
|
}
|
|
|
|
|
|
/* Set I2C speed on DS28E17. */
|
|
static int __w1_f19_set_i2c_speed(struct w1_slave *sl, u8 speed)
|
|
{
|
|
struct w1_f19_data *data = sl->family_data;
|
|
const int i2c_speeds[3] = { 100, 400, 900 };
|
|
u8 w1_buf[2];
|
|
|
|
/* Select slave. */
|
|
if (w1_reset_select_slave(sl))
|
|
return -EIO;
|
|
|
|
w1_buf[0] = W1_F19_WRITE_CONFIGURATION;
|
|
w1_buf[1] = speed;
|
|
w1_write_block(sl->master, w1_buf, 2);
|
|
|
|
/* Update speed in slave specific data. */
|
|
data->speed = speed;
|
|
|
|
dev_info(&sl->dev, "i2c speed set to %d kBaud\n", i2c_speeds[speed]);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int w1_f19_set_i2c_speed(struct w1_slave *sl, u8 speed)
|
|
{
|
|
int result;
|
|
|
|
/* Start onewire transaction. */
|
|
mutex_lock(&sl->master->bus_mutex);
|
|
|
|
/* Set I2C speed on DS28E17. */
|
|
result = __w1_f19_set_i2c_speed(sl, speed);
|
|
|
|
/* End onewire transaction. */
|
|
mutex_unlock(&sl->master->bus_mutex);
|
|
|
|
return result;
|
|
}
|
|
|
|
|
|
/* Sysfs attributes. */
|
|
|
|
/* I2C speed attribute for a single chip. */
|
|
static ssize_t speed_show(struct device *dev, struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct w1_slave *sl = dev_to_w1_slave(dev);
|
|
int result;
|
|
|
|
/* Read current speed from slave. Updates data->speed. */
|
|
result = w1_f19_get_i2c_speed(sl);
|
|
if (result < 0)
|
|
return result;
|
|
|
|
/* Return current speed value. */
|
|
return sprintf(buf, "%d\n", result);
|
|
}
|
|
|
|
static ssize_t speed_store(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct w1_slave *sl = dev_to_w1_slave(dev);
|
|
int error;
|
|
|
|
/* Valid values are: "100", "400", "900" */
|
|
if (count < 3 || count > 4 || !buf)
|
|
return -EINVAL;
|
|
if (count == 4 && buf[3] != '\n')
|
|
return -EINVAL;
|
|
if (buf[1] != '0' || buf[2] != '0')
|
|
return -EINVAL;
|
|
|
|
/* Set speed on slave. */
|
|
switch (buf[0]) {
|
|
case '1':
|
|
error = w1_f19_set_i2c_speed(sl, 0);
|
|
break;
|
|
case '4':
|
|
error = w1_f19_set_i2c_speed(sl, 1);
|
|
break;
|
|
case '9':
|
|
error = w1_f19_set_i2c_speed(sl, 2);
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (error < 0)
|
|
return error;
|
|
|
|
/* Return bytes written. */
|
|
return count;
|
|
}
|
|
|
|
static DEVICE_ATTR_RW(speed);
|
|
|
|
|
|
/* Busy stretch attribute for a single chip. */
|
|
static ssize_t stretch_show(struct device *dev, struct device_attribute *attr,
|
|
char *buf)
|
|
{
|
|
struct w1_slave *sl = dev_to_w1_slave(dev);
|
|
struct w1_f19_data *data = sl->family_data;
|
|
|
|
/* Return current stretch value. */
|
|
return sprintf(buf, "%d\n", data->stretch);
|
|
}
|
|
|
|
static ssize_t stretch_store(struct device *dev, struct device_attribute *attr,
|
|
const char *buf, size_t count)
|
|
{
|
|
struct w1_slave *sl = dev_to_w1_slave(dev);
|
|
struct w1_f19_data *data = sl->family_data;
|
|
|
|
/* Valid values are '1' to '9' */
|
|
if (count < 1 || count > 2 || !buf)
|
|
return -EINVAL;
|
|
if (count == 2 && buf[1] != '\n')
|
|
return -EINVAL;
|
|
if (buf[0] < '1' || buf[0] > '9')
|
|
return -EINVAL;
|
|
|
|
/* Set busy stretch value. */
|
|
data->stretch = buf[0] & 0x0F;
|
|
|
|
/* Return bytes written. */
|
|
return count;
|
|
}
|
|
|
|
static DEVICE_ATTR_RW(stretch);
|
|
|
|
|
|
/* All attributes. */
|
|
static struct attribute *w1_f19_attrs[] = {
|
|
&dev_attr_speed.attr,
|
|
&dev_attr_stretch.attr,
|
|
NULL,
|
|
};
|
|
|
|
static const struct attribute_group w1_f19_group = {
|
|
.attrs = w1_f19_attrs,
|
|
};
|
|
|
|
static const struct attribute_group *w1_f19_groups[] = {
|
|
&w1_f19_group,
|
|
NULL,
|
|
};
|
|
|
|
|
|
/* Slave add and remove functions. */
|
|
static int w1_f19_add_slave(struct w1_slave *sl)
|
|
{
|
|
struct w1_f19_data *data = NULL;
|
|
|
|
/* Allocate memory for slave specific data. */
|
|
data = devm_kzalloc(&sl->dev, sizeof(*data), GFP_KERNEL);
|
|
if (!data)
|
|
return -ENOMEM;
|
|
sl->family_data = data;
|
|
|
|
/* Setup default I2C speed on slave. */
|
|
switch (i2c_speed) {
|
|
case 100:
|
|
__w1_f19_set_i2c_speed(sl, 0);
|
|
break;
|
|
case 400:
|
|
__w1_f19_set_i2c_speed(sl, 1);
|
|
break;
|
|
case 900:
|
|
__w1_f19_set_i2c_speed(sl, 2);
|
|
break;
|
|
default:
|
|
/*
|
|
* A i2c_speed module parameter of anything else
|
|
* than 100, 400, 900 means not to touch the
|
|
* speed of the DS28E17.
|
|
* We assume 400kBaud, the power-on value.
|
|
*/
|
|
data->speed = 1;
|
|
}
|
|
|
|
/*
|
|
* Setup default busy stretch
|
|
* configuration for the DS28E17.
|
|
*/
|
|
data->stretch = i2c_stretch;
|
|
|
|
/* Setup I2C adapter. */
|
|
data->adapter.owner = THIS_MODULE;
|
|
data->adapter.algo = &w1_f19_i2c_algorithm;
|
|
data->adapter.algo_data = sl;
|
|
strcpy(data->adapter.name, "w1-");
|
|
strcat(data->adapter.name, sl->name);
|
|
data->adapter.dev.parent = &sl->dev;
|
|
data->adapter.quirks = &w1_f19_i2c_adapter_quirks;
|
|
|
|
return i2c_add_adapter(&data->adapter);
|
|
}
|
|
|
|
static void w1_f19_remove_slave(struct w1_slave *sl)
|
|
{
|
|
struct w1_f19_data *family_data = sl->family_data;
|
|
|
|
/* Delete I2C adapter. */
|
|
i2c_del_adapter(&family_data->adapter);
|
|
|
|
/* Free slave specific data. */
|
|
devm_kfree(&sl->dev, family_data);
|
|
sl->family_data = NULL;
|
|
}
|
|
|
|
|
|
/* Declarations within the w1 subsystem. */
|
|
static struct w1_family_ops w1_f19_fops = {
|
|
.add_slave = w1_f19_add_slave,
|
|
.remove_slave = w1_f19_remove_slave,
|
|
.groups = w1_f19_groups,
|
|
};
|
|
|
|
static struct w1_family w1_family_19 = {
|
|
.fid = W1_FAMILY_DS28E17,
|
|
.fops = &w1_f19_fops,
|
|
};
|
|
|
|
|
|
/* Module init and remove functions. */
|
|
static int __init w1_f19_init(void)
|
|
{
|
|
return w1_register_family(&w1_family_19);
|
|
}
|
|
|
|
static void __exit w1_f19_fini(void)
|
|
{
|
|
w1_unregister_family(&w1_family_19);
|
|
}
|
|
|
|
module_init(w1_f19_init);
|
|
module_exit(w1_f19_fini);
|
|
|