Nicholas Piggin 85bcfaf69c powerpc/64s/radix: optimise pte_update ... Implementing pte_update with pte_xchg (which uses cmpxchg) is inefficient. A single larx/stcx. works fine, no need for the less efficient cmpxchg sequence. Then remove the memory barriers from the operation. There is a requirement for TLB flushing to load mm_cpumask after the store that reduces pte permissions, which is moved into the TLB flush code. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>		2018-06-03 20:40:36 +10:00
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asm	powerpc/64s/radix: optimise pte_update	2018-06-03 20:40:36 +10:00
uapi/asm	KVM changes for 4.16	2018-02-10 13:16:35 -08:00