mirror of https://gitee.com/openkylin/linux.git
496 lines
12 KiB
C
496 lines
12 KiB
C
/* ZD1211 USB-WLAN driver for Linux
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*
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* Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
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* Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include "zd_rf.h"
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#include "zd_usb.h"
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#include "zd_chip.h"
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static const u32 chan_rv[][2] = {
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RF_CHANNEL( 1) = { 0x09ec00, 0x8cccc8 },
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RF_CHANNEL( 2) = { 0x09ec00, 0x8cccd8 },
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RF_CHANNEL( 3) = { 0x09ec00, 0x8cccc0 },
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RF_CHANNEL( 4) = { 0x09ec00, 0x8cccd0 },
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RF_CHANNEL( 5) = { 0x05ec00, 0x8cccc8 },
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RF_CHANNEL( 6) = { 0x05ec00, 0x8cccd8 },
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RF_CHANNEL( 7) = { 0x05ec00, 0x8cccc0 },
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RF_CHANNEL( 8) = { 0x05ec00, 0x8cccd0 },
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RF_CHANNEL( 9) = { 0x0dec00, 0x8cccc8 },
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RF_CHANNEL(10) = { 0x0dec00, 0x8cccd8 },
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RF_CHANNEL(11) = { 0x0dec00, 0x8cccc0 },
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RF_CHANNEL(12) = { 0x0dec00, 0x8cccd0 },
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RF_CHANNEL(13) = { 0x03ec00, 0x8cccc8 },
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RF_CHANNEL(14) = { 0x03ec00, 0x866660 },
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};
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static const u32 std_rv[] = {
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0x4ff821,
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0xc5fbfc,
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0x21ebfe,
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0xafd401, /* freq shift 0xaad401 */
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0x6cf56a,
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0xe04073,
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0x193d76,
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0x9dd844,
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0x500007,
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0xd8c010,
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};
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static const u32 rv_init1[] = {
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0x3c9000,
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0xbfffff,
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0x700000,
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0xf15d58,
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};
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static const u32 rv_init2[] = {
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0xf15d59,
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0xf15d5c,
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0xf15d58,
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};
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static const struct zd_ioreq16 ioreqs_sw[] = {
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{ CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
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{ CR38, 0x38 }, { CR136, 0xdf },
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};
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static int zd1211b_al7230b_finalize(struct zd_chip *chip)
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{
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int r;
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static const struct zd_ioreq16 ioreqs[] = {
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{ CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 },
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{ CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 },
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{ CR203, 0x04 },
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{ },
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{ CR240, 0x80 },
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};
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r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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if (r)
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return r;
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if (chip->new_phy_layout) {
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/* antenna selection? */
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r = zd_iowrite16_locked(chip, 0xe5, CR9);
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if (r)
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return r;
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}
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return zd_iowrite16_locked(chip, 0x04, CR203);
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}
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static int zd1211_al7230b_init_hw(struct zd_rf *rf)
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{
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int r;
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struct zd_chip *chip = zd_rf_to_chip(rf);
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/* All of these writes are identical to AL2230 unless otherwise
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* specified */
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static const struct zd_ioreq16 ioreqs_1[] = {
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/* This one is 7230-specific, and happens before the rest */
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{ CR240, 0x57 },
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{ },
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{ CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 },
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{ CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 },
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{ CR44, 0x33 },
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/* This value is different for 7230 (was: 0x2a) */
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{ CR106, 0x22 },
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{ CR107, 0x1a }, { CR109, 0x09 }, { CR110, 0x27 },
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{ CR111, 0x2b }, { CR112, 0x2b }, { CR119, 0x0a },
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/* This happened further down in AL2230,
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* and the value changed (was: 0xe0) */
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{ CR122, 0xfc },
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{ CR10, 0x89 },
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/* for newest (3rd cut) AL2300 */
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{ CR17, 0x28 },
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{ CR26, 0x93 }, { CR34, 0x30 },
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/* for newest (3rd cut) AL2300 */
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{ CR35, 0x3e },
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{ CR41, 0x24 }, { CR44, 0x32 },
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/* for newest (3rd cut) AL2300 */
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{ CR46, 0x96 },
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{ CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 },
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{ CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 },
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{ CR92, 0x0a }, { CR99, 0x28 },
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/* This value is different for 7230 (was: 0x00) */
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{ CR100, 0x02 },
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{ CR101, 0x13 }, { CR102, 0x27 },
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/* This value is different for 7230 (was: 0x24) */
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{ CR106, 0x22 },
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/* This value is different for 7230 (was: 0x2a) */
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{ CR107, 0x3f },
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{ CR109, 0x09 },
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/* This value is different for 7230 (was: 0x13) */
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{ CR110, 0x1f },
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{ CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
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{ CR114, 0x27 },
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/* for newest (3rd cut) AL2300 */
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{ CR115, 0x24 },
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/* This value is different for 7230 (was: 0x24) */
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{ CR116, 0x3f },
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/* This value is different for 7230 (was: 0xf4) */
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{ CR117, 0xfa },
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{ CR118, 0xfc }, { CR119, 0x10 }, { CR120, 0x4f },
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{ CR121, 0x77 }, { CR137, 0x88 },
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/* This one is 7230-specific */
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{ CR138, 0xa8 },
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/* This value is different for 7230 (was: 0xff) */
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{ CR252, 0x34 },
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/* This value is different for 7230 (was: 0xff) */
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{ CR253, 0x34 },
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/* PLL_OFF */
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{ CR251, 0x2f },
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};
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static const struct zd_ioreq16 ioreqs_2[] = {
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{ CR251, 0x3f }, /* PLL_ON */
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{ CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
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{ CR38, 0x38 }, { CR136, 0xdf },
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};
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r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
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if (r)
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return r;
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r = zd_iowrite16_locked(chip, 0x06, CR203);
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if (r)
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return r;
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r = zd_iowrite16_locked(chip, 0x80, CR240);
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if (r)
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return r;
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return 0;
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}
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static int zd1211b_al7230b_init_hw(struct zd_rf *rf)
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{
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int r;
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struct zd_chip *chip = zd_rf_to_chip(rf);
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static const struct zd_ioreq16 ioreqs_1[] = {
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{ CR240, 0x57 }, { CR9, 0x9 },
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{ },
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{ CR10, 0x8b }, { CR15, 0x20 },
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{ CR17, 0x2B }, /* for newest (3rd cut) AL2230 */
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{ CR20, 0x10 }, /* 4N25->Stone Request */
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{ CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 },
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{ CR28, 0x3e }, { CR29, 0x00 },
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{ CR33, 0x28 }, /* 5613 */
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{ CR34, 0x30 },
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{ CR35, 0x3e }, /* for newest (3rd cut) AL2230 */
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{ CR41, 0x24 }, { CR44, 0x32 },
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{ CR46, 0x99 }, /* for newest (3rd cut) AL2230 */
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{ CR47, 0x1e },
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/* ZD1215 5610 */
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{ CR48, 0x00 }, { CR49, 0x00 }, { CR51, 0x01 },
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{ CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 },
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{ CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
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{ CR69, 0x28 },
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{ CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
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{ CR87, 0x0A }, { CR89, 0x04 },
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{ CR90, 0x58 }, /* 5112 */
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{ CR91, 0x00 }, /* 5613 */
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{ CR92, 0x0a },
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{ CR98, 0x8d }, /* 4804, for 1212 new algorithm */
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{ CR99, 0x00 }, { CR100, 0x02 }, { CR101, 0x13 },
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{ CR102, 0x27 },
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{ CR106, 0x20 }, /* change to 0x24 for AL7230B */
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{ CR109, 0x13 }, /* 4804, for 1212 new algorithm */
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{ CR112, 0x1f },
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};
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static const struct zd_ioreq16 ioreqs_new_phy[] = {
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{ CR107, 0x28 },
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{ CR110, 0x1f }, /* 5127, 0x13->0x1f */
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{ CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */
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{ CR116, 0x2a }, { CR118, 0xfa }, { CR119, 0x12 },
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{ CR121, 0x6c }, /* 5613 */
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};
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static const struct zd_ioreq16 ioreqs_old_phy[] = {
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{ CR107, 0x24 },
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{ CR110, 0x13 }, /* 5127, 0x13->0x1f */
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{ CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */
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{ CR116, 0x24 }, { CR118, 0xfc }, { CR119, 0x11 },
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{ CR121, 0x6a }, /* 5613 */
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};
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static const struct zd_ioreq16 ioreqs_2[] = {
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{ CR113, 0x27 }, { CR114, 0x27 }, { CR115, 0x24 },
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{ CR117, 0xfa }, { CR120, 0x4f },
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{ CR122, 0xfc }, /* E0->FCh at 4901 */
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{ CR123, 0x57 }, /* 5613 */
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{ CR125, 0xad }, /* 4804, for 1212 new algorithm */
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{ CR126, 0x6c }, /* 5613 */
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{ CR127, 0x03 }, /* 4804, for 1212 new algorithm */
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{ CR130, 0x10 },
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{ CR131, 0x00 }, /* 5112 */
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{ CR137, 0x50 }, /* 5613 */
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{ CR138, 0xa8 }, /* 5112 */
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{ CR144, 0xac }, /* 5613 */
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{ CR148, 0x40 }, /* 5112 */
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{ CR149, 0x40 }, /* 4O07, 50->40 */
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{ CR150, 0x1a }, /* 5112, 0C->1A */
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{ CR252, 0x34 }, { CR253, 0x34 },
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{ CR251, 0x2f }, /* PLL_OFF */
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};
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static const struct zd_ioreq16 ioreqs_3[] = {
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{ CR251, 0x7f }, /* PLL_ON */
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{ CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
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{ CR38, 0x38 }, { CR136, 0xdf },
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};
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r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
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if (r)
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return r;
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if (chip->new_phy_layout)
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r = zd_iowrite16a_locked(chip, ioreqs_new_phy,
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ARRAY_SIZE(ioreqs_new_phy));
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else
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r = zd_iowrite16a_locked(chip, ioreqs_old_phy,
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ARRAY_SIZE(ioreqs_old_phy));
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_2, ARRAY_SIZE(ioreqs_2));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, chan_rv[0], ARRAY_SIZE(chan_rv[0]));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv_init1, ARRAY_SIZE(rv_init1));
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_3, ARRAY_SIZE(ioreqs_3));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv_init2, ARRAY_SIZE(rv_init2));
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if (r)
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return r;
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return zd1211b_al7230b_finalize(chip);
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}
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static int zd1211_al7230b_set_channel(struct zd_rf *rf, u8 channel)
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{
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int r;
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const u32 *rv = chan_rv[channel-1];
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struct zd_chip *chip = zd_rf_to_chip(rf);
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static const struct zd_ioreq16 ioreqs[] = {
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/* PLL_ON */
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{ CR251, 0x3f },
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{ CR203, 0x06 }, { CR240, 0x08 },
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};
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r = zd_iowrite16_locked(chip, 0x57, CR240);
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if (r)
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return r;
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/* PLL_OFF */
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r = zd_iowrite16_locked(chip, 0x2f, CR251);
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0x3c9000);
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0xf15d58);
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv, 2);
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0x3c9000);
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if (r)
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return r;
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return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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}
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static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
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{
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int r;
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const u32 *rv = chan_rv[channel-1];
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struct zd_chip *chip = zd_rf_to_chip(rf);
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r = zd_iowrite16_locked(chip, 0x57, CR240);
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if (r)
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return r;
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r = zd_iowrite16_locked(chip, 0xe4, CR9);
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if (r)
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return r;
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/* PLL_OFF */
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r = zd_iowrite16_locked(chip, 0x2f, CR251);
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0x3c9000);
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0xf15d58);
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if (r)
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return r;
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r = zd_iowrite16a_locked(chip, ioreqs_sw, ARRAY_SIZE(ioreqs_sw));
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if (r)
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return r;
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r = zd_rfwritev_cr_locked(chip, rv, 2);
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if (r)
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return r;
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r = zd_rfwrite_cr_locked(chip, 0x3c9000);
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if (r)
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return r;
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r = zd_iowrite16_locked(chip, 0x7f, CR251);
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if (r)
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return r;
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return zd1211b_al7230b_finalize(chip);
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}
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static int zd1211_al7230b_switch_radio_on(struct zd_rf *rf)
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{
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struct zd_chip *chip = zd_rf_to_chip(rf);
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static const struct zd_ioreq16 ioreqs[] = {
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{ CR11, 0x00 },
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{ CR251, 0x3f },
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};
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return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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}
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static int zd1211b_al7230b_switch_radio_on(struct zd_rf *rf)
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{
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struct zd_chip *chip = zd_rf_to_chip(rf);
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static const struct zd_ioreq16 ioreqs[] = {
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{ CR11, 0x00 },
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{ CR251, 0x7f },
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};
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return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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}
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static int al7230b_switch_radio_off(struct zd_rf *rf)
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{
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struct zd_chip *chip = zd_rf_to_chip(rf);
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static const struct zd_ioreq16 ioreqs[] = {
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{ CR11, 0x04 },
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{ CR251, 0x2f },
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};
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return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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}
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/* ZD1211B+AL7230B 6m band edge patching differs slightly from other
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* configurations */
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static int zd1211b_al7230b_patch_6m(struct zd_rf *rf, u8 channel)
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{
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struct zd_chip *chip = zd_rf_to_chip(rf);
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struct zd_ioreq16 ioreqs[] = {
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{ CR128, 0x14 }, { CR129, 0x12 },
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};
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/* FIXME: Channel 11 is not the edge for all regulatory domains. */
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if (channel == 1) {
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ioreqs[0].value = 0x0e;
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ioreqs[1].value = 0x10;
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} else if (channel == 11) {
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ioreqs[0].value = 0x10;
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ioreqs[1].value = 0x10;
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}
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dev_dbg_f(zd_chip_dev(chip), "patching for channel %d\n", channel);
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return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
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}
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int zd_rf_init_al7230b(struct zd_rf *rf)
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{
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struct zd_chip *chip = zd_rf_to_chip(rf);
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if (zd_chip_is_zd1211b(chip)) {
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rf->init_hw = zd1211b_al7230b_init_hw;
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rf->switch_radio_on = zd1211b_al7230b_switch_radio_on;
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rf->set_channel = zd1211b_al7230b_set_channel;
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rf->patch_6m_band_edge = zd1211b_al7230b_patch_6m;
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} else {
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rf->init_hw = zd1211_al7230b_init_hw;
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rf->switch_radio_on = zd1211_al7230b_switch_radio_on;
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rf->set_channel = zd1211_al7230b_set_channel;
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rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
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rf->patch_cck_gain = 1;
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}
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rf->switch_radio_off = al7230b_switch_radio_off;
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return 0;
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}
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