mirror of https://gitee.com/openkylin/linux.git
231 lines
5.2 KiB
C
231 lines
5.2 KiB
C
/*
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* Probe for F81216A LPC to 4 UART
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*
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* Copyright (C) 2014-2016 Ricardo Ribalda, Qtechnology A/S
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pnp.h>
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#include <linux/kernel.h>
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#include <linux/serial_core.h>
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#include <linux/irq.h>
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#include "8250.h"
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#define ADDR_PORT 0
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#define DATA_PORT 1
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#define EXIT_KEY 0xAA
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#define CHIP_ID1 0x20
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#define CHIP_ID2 0x21
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#define CHIP_ID_0 0x1602
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#define CHIP_ID_1 0x0501
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#define VENDOR_ID1 0x23
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#define VENDOR_ID1_VAL 0x19
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#define VENDOR_ID2 0x24
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#define VENDOR_ID2_VAL 0x34
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#define IO_ADDR1 0x61
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#define IO_ADDR2 0x60
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#define LDN 0x7
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#define IRQ_MODE 0x70
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#define IRQ_SHARE BIT(4)
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#define IRQ_MODE_MASK (BIT(6) | BIT(5))
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#define IRQ_LEVEL_LOW 0
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#define IRQ_EDGE_HIGH BIT(5)
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#define RS485 0xF0
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#define RTS_INVERT BIT(5)
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#define RS485_URA BIT(4)
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#define RXW4C_IRA BIT(3)
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#define TXW4C_IRA BIT(2)
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struct fintek_8250 {
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u16 base_port;
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u8 index;
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u8 key;
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};
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static int fintek_8250_enter_key(u16 base_port, u8 key)
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{
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if (!request_muxed_region(base_port, 2, "8250_fintek"))
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return -EBUSY;
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outb(key, base_port + ADDR_PORT);
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outb(key, base_port + ADDR_PORT);
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return 0;
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}
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static void fintek_8250_exit_key(u16 base_port)
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{
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outb(EXIT_KEY, base_port + ADDR_PORT);
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release_region(base_port + ADDR_PORT, 2);
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}
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static int fintek_8250_check_id(u16 base_port)
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{
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u16 chip;
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outb(VENDOR_ID1, base_port + ADDR_PORT);
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if (inb(base_port + DATA_PORT) != VENDOR_ID1_VAL)
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return -ENODEV;
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outb(VENDOR_ID2, base_port + ADDR_PORT);
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if (inb(base_port + DATA_PORT) != VENDOR_ID2_VAL)
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return -ENODEV;
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outb(CHIP_ID1, base_port + ADDR_PORT);
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chip = inb(base_port + DATA_PORT);
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outb(CHIP_ID2, base_port + ADDR_PORT);
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chip |= inb(base_port + DATA_PORT) << 8;
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if (chip != CHIP_ID_0 && chip != CHIP_ID_1)
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return -ENODEV;
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return 0;
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}
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static int fintek_8250_rs485_config(struct uart_port *port,
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struct serial_rs485 *rs485)
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{
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uint8_t config = 0;
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struct fintek_8250 *pdata = port->private_data;
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if (!pdata)
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return -EINVAL;
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if (rs485->flags & SER_RS485_ENABLED)
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memset(rs485->padding, 0, sizeof(rs485->padding));
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else
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memset(rs485, 0, sizeof(*rs485));
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rs485->flags &= SER_RS485_ENABLED | SER_RS485_RTS_ON_SEND |
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SER_RS485_RTS_AFTER_SEND;
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if (rs485->delay_rts_before_send) {
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rs485->delay_rts_before_send = 1;
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config |= TXW4C_IRA;
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}
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if (rs485->delay_rts_after_send) {
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rs485->delay_rts_after_send = 1;
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config |= RXW4C_IRA;
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}
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if ((!!(rs485->flags & SER_RS485_RTS_ON_SEND)) ==
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(!!(rs485->flags & SER_RS485_RTS_AFTER_SEND)))
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rs485->flags &= SER_RS485_ENABLED;
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else
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config |= RS485_URA;
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if (rs485->flags & SER_RS485_RTS_ON_SEND)
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config |= RTS_INVERT;
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if (fintek_8250_enter_key(pdata->base_port, pdata->key))
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return -EBUSY;
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outb(LDN, pdata->base_port + ADDR_PORT);
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outb(pdata->index, pdata->base_port + DATA_PORT);
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outb(RS485, pdata->base_port + ADDR_PORT);
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outb(config, pdata->base_port + DATA_PORT);
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fintek_8250_exit_key(pdata->base_port);
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port->rs485 = *rs485;
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return 0;
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}
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static int find_base_port(struct fintek_8250 *pdata, u16 io_address)
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{
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static const u16 addr[] = {0x4e, 0x2e};
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static const u8 keys[] = {0x77, 0xa0, 0x87, 0x67};
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int i, j, k;
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for (i = 0; i < ARRAY_SIZE(addr); i++) {
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for (j = 0; j < ARRAY_SIZE(keys); j++) {
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if (fintek_8250_enter_key(addr[i], keys[j]))
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continue;
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if (fintek_8250_check_id(addr[i])) {
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fintek_8250_exit_key(addr[i]);
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continue;
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}
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for (k = 0; k < 4; k++) {
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u16 aux;
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outb(LDN, addr[i] + ADDR_PORT);
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outb(k, addr[i] + DATA_PORT);
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outb(IO_ADDR1, addr[i] + ADDR_PORT);
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aux = inb(addr[i] + DATA_PORT);
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outb(IO_ADDR2, addr[i] + ADDR_PORT);
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aux |= inb(addr[i] + DATA_PORT) << 8;
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if (aux != io_address)
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continue;
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fintek_8250_exit_key(addr[i]);
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pdata->key = keys[j];
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pdata->base_port = addr[i];
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pdata->index = k;
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return 0;
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}
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fintek_8250_exit_key(addr[i]);
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}
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}
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return -ENODEV;
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}
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static int fintek_8250_set_irq_mode(struct fintek_8250 *pdata, bool level_mode)
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{
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int status;
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u8 tmp;
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status = fintek_8250_enter_key(pdata->base_port, pdata->key);
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if (status)
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return status;
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outb(LDN, pdata->base_port + ADDR_PORT);
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outb(pdata->index, pdata->base_port + DATA_PORT);
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outb(IRQ_MODE, pdata->base_port + ADDR_PORT);
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tmp = inb(pdata->base_port + DATA_PORT);
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tmp &= ~IRQ_MODE_MASK;
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tmp |= IRQ_SHARE;
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if (!level_mode)
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tmp |= IRQ_EDGE_HIGH;
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outb(tmp, pdata->base_port + DATA_PORT);
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fintek_8250_exit_key(pdata->base_port);
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return 0;
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}
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int fintek_8250_probe(struct uart_8250_port *uart)
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{
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struct fintek_8250 *pdata;
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struct fintek_8250 probe_data;
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struct irq_data *irq_data = irq_get_irq_data(uart->port.irq);
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bool level_mode = irqd_is_level_type(irq_data);
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if (find_base_port(&probe_data, uart->port.iobase))
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return -ENODEV;
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pdata = devm_kzalloc(uart->port.dev, sizeof(*pdata), GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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memcpy(pdata, &probe_data, sizeof(probe_data));
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uart->port.rs485_config = fintek_8250_rs485_config;
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uart->port.private_data = pdata;
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return fintek_8250_set_irq_mode(pdata, level_mode);
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}
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