mirror of https://gitee.com/openkylin/linux.git
113 lines
3.1 KiB
C
113 lines
3.1 KiB
C
/*
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* SH-Mobile Timer
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*
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* Copyright (C) 2010 Magnus Damm
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* Copyright (C) 2002 - 2009 Paul Mundt
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/platform_device.h>
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#include <linux/clocksource.h>
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#include <linux/delay.h>
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#include <linux/of_address.h>
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static void __init shmobile_setup_delay_hz(unsigned int max_cpu_core_hz,
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unsigned int mult, unsigned int div)
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{
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/* calculate a worst-case loops-per-jiffy value
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* based on maximum cpu core hz setting and the
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* __delay() implementation in arch/arm/lib/delay.S
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*
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* this will result in a longer delay than expected
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* when the cpu core runs on lower frequencies.
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*/
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unsigned int value = HZ * div / mult;
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if (!preset_lpj)
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preset_lpj = max_cpu_core_hz / value;
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}
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void __init shmobile_init_delay(void)
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{
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struct device_node *np, *cpus;
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bool is_a7_a8_a9 = false;
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bool is_a15 = false;
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bool has_arch_timer = false;
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u32 max_freq = 0;
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cpus = of_find_node_by_path("/cpus");
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if (!cpus)
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return;
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for_each_child_of_node(cpus, np) {
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u32 freq;
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if (!of_property_read_u32(np, "clock-frequency", &freq))
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max_freq = max(max_freq, freq);
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if (of_device_is_compatible(np, "arm,cortex-a8") ||
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of_device_is_compatible(np, "arm,cortex-a9")) {
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is_a7_a8_a9 = true;
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} else if (of_device_is_compatible(np, "arm,cortex-a7")) {
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is_a7_a8_a9 = true;
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has_arch_timer = true;
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} else if (of_device_is_compatible(np, "arm,cortex-a15")) {
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is_a15 = true;
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has_arch_timer = true;
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}
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}
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of_node_put(cpus);
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if (!max_freq)
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return;
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#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
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/* Non-multiplatform r8a73a4 SoC cannot use arch timer due
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* to GIC being initialized from C and arch timer via DT */
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if (of_machine_is_compatible("renesas,r8a73a4"))
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has_arch_timer = false;
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/* Non-multiplatform r8a7790 SoC cannot use arch timer due
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* to GIC being initialized from C and arch timer via DT */
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if (of_machine_is_compatible("renesas,r8a7790"))
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has_arch_timer = false;
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#endif
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if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) {
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if (is_a7_a8_a9)
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shmobile_setup_delay_hz(max_freq, 1, 3);
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else if (is_a15)
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shmobile_setup_delay_hz(max_freq, 2, 4);
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}
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}
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static void __init shmobile_late_time_init(void)
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{
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/*
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* Make sure all compiled-in early timers register themselves.
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*
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* Run probe() for two "earlytimer" devices, these will be the
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* clockevents and clocksource devices respectively. In the event
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* that only a clockevents device is available, we -ENODEV on the
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* clocksource and the jiffies clocksource is used transparently
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* instead. No error handling is necessary here.
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*/
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early_platform_driver_register_all("earlytimer");
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early_platform_driver_probe("earlytimer", 2, 0);
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}
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void __init shmobile_earlytimer_init(void)
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{
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late_time_init = shmobile_late_time_init;
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}
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