mirror of https://gitee.com/openkylin/linux.git
507 lines
16 KiB
C
507 lines
16 KiB
C
/* MN10300 Page table manipulators and constants
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*
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*
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* The Linux memory management assumes a three-level page table setup. On
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* the i386, we use that, but "fold" the mid level into the top-level page
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* table, so that we physically have the same two-level page table as the
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* i386 mmu expects.
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*
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* This file contains the functions and defines necessary to modify and use
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* the i386 page table tree for the purposes of the MN10300 TLB handler
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* functions.
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*/
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#ifndef _ASM_PGTABLE_H
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#define _ASM_PGTABLE_H
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#include <asm/cpu-regs.h>
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#ifndef __ASSEMBLY__
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#include <asm/processor.h>
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#include <asm/cache.h>
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#include <linux/threads.h>
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#include <asm/bitops.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/spinlock.h>
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/*
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* ZERO_PAGE is a global shared page that is always zero: used
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* for zero-mapped memory areas etc..
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*/
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#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
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extern unsigned long empty_zero_page[1024];
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extern spinlock_t pgd_lock;
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extern struct page *pgd_list;
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extern void pmd_ctor(void *, struct kmem_cache *, unsigned long);
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extern void pgtable_cache_init(void);
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extern void paging_init(void);
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#endif /* !__ASSEMBLY__ */
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/*
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* The Linux mn10300 paging architecture only implements both the traditional
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* 2-level page tables
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*/
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#define PGDIR_SHIFT 22
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#define PTRS_PER_PGD 1024
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#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */
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#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */
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#define PTRS_PER_PTE 1024
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#define PGD_SIZE PAGE_SIZE
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE - 1))
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#define USER_PTRS_PER_PGD (TASK_SIZE / PGDIR_SIZE)
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#define FIRST_USER_ADDRESS 0
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#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
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#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
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#define TWOLEVEL_PGDIR_SHIFT 22
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#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
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#define BOOT_KERNEL_PGD_PTRS (1024 - BOOT_USER_PGD_PTRS)
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#ifndef __ASSEMBLY__
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extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
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#endif
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/*
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* Unfortunately, due to the way the MMU works on the MN10300, the vmalloc VM
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* area has to be in the lower half of the virtual address range (the upper
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* half is not translated through the TLB).
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*
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* So in this case, the vmalloc area goes at the bottom of the address map
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* (leaving a hole at the very bottom to catch addressing errors), and
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* userspace starts immediately above.
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*
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* The vmalloc() routines also leaves a hole of 4kB between each vmalloced
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* area to catch addressing errors.
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*/
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#ifndef __ASSEMBLY__
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#define VMALLOC_OFFSET (8UL * 1024 * 1024)
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#define VMALLOC_START (0x70000000UL)
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#define VMALLOC_END (0x7C000000UL)
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#else
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#define VMALLOC_OFFSET (8 * 1024 * 1024)
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#define VMALLOC_START (0x70000000)
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#define VMALLOC_END (0x7C000000)
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#endif
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#ifndef __ASSEMBLY__
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extern pte_t kernel_vmalloc_ptes[(VMALLOC_END - VMALLOC_START) / PAGE_SIZE];
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#endif
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/* IPTEL2/DPTEL2 bit assignments */
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#define _PAGE_BIT_VALID xPTEL2_V_BIT
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#define _PAGE_BIT_CACHE xPTEL2_C_BIT
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#define _PAGE_BIT_PRESENT xPTEL2_PV_BIT
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#define _PAGE_BIT_DIRTY xPTEL2_D_BIT
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#define _PAGE_BIT_GLOBAL xPTEL2_G_BIT
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#define _PAGE_BIT_ACCESSED xPTEL2_UNUSED1_BIT /* mustn't be loaded into IPTEL2/DPTEL2 */
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#define _PAGE_VALID xPTEL2_V
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#define _PAGE_CACHE xPTEL2_C
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#define _PAGE_PRESENT xPTEL2_PV
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#define _PAGE_DIRTY xPTEL2_D
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#define _PAGE_PROT xPTEL2_PR
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#define _PAGE_PROT_RKNU xPTEL2_PR_ROK
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#define _PAGE_PROT_WKNU xPTEL2_PR_RWK
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#define _PAGE_PROT_RKRU xPTEL2_PR_ROK_ROU
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#define _PAGE_PROT_WKRU xPTEL2_PR_RWK_ROU
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#define _PAGE_PROT_WKWU xPTEL2_PR_RWK_RWU
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#define _PAGE_GLOBAL xPTEL2_G
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#define _PAGE_PS_MASK xPTEL2_PS
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#define _PAGE_PS_4Kb xPTEL2_PS_4Kb
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#define _PAGE_PS_128Kb xPTEL2_PS_128Kb
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#define _PAGE_PS_1Kb xPTEL2_PS_1Kb
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#define _PAGE_PS_4Mb xPTEL2_PS_4Mb
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#define _PAGE_PSE xPTEL2_PS_4Mb /* 4MB page */
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#define _PAGE_CACHE_WT xPTEL2_CWT
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#define _PAGE_ACCESSED xPTEL2_UNUSED1
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#define _PAGE_NX 0 /* no-execute bit */
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/* If _PAGE_VALID is clear, we use these: */
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#define _PAGE_FILE xPTEL2_C /* set:pagecache unset:swap */
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#define _PAGE_PROTNONE 0x000 /* If not present */
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#define __PAGE_PROT_UWAUX 0x010
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#define __PAGE_PROT_USER 0x020
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#define __PAGE_PROT_WRITE 0x040
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#define _PAGE_PRESENTV (_PAGE_PRESENT|_PAGE_VALID)
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#ifndef __ASSEMBLY__
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#define VMALLOC_VMADDR(x) ((unsigned long)(x))
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#define _PAGE_TABLE (_PAGE_PRESENTV | _PAGE_PROT_WKNU | _PAGE_ACCESSED | _PAGE_DIRTY)
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#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
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#define __PAGE_NONE (_PAGE_PRESENTV | _PAGE_PROT_RKNU | _PAGE_ACCESSED | _PAGE_CACHE)
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#define __PAGE_SHARED (_PAGE_PRESENTV | _PAGE_PROT_WKWU | _PAGE_ACCESSED | _PAGE_CACHE)
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#define __PAGE_COPY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
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#define __PAGE_READONLY (_PAGE_PRESENTV | _PAGE_PROT_RKRU | _PAGE_ACCESSED | _PAGE_CACHE)
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#define PAGE_NONE __pgprot(__PAGE_NONE | _PAGE_NX)
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#define PAGE_SHARED_NOEXEC __pgprot(__PAGE_SHARED | _PAGE_NX)
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#define PAGE_COPY_NOEXEC __pgprot(__PAGE_COPY | _PAGE_NX)
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#define PAGE_READONLY_NOEXEC __pgprot(__PAGE_READONLY | _PAGE_NX)
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#define PAGE_SHARED_EXEC __pgprot(__PAGE_SHARED)
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#define PAGE_COPY_EXEC __pgprot(__PAGE_COPY)
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#define PAGE_READONLY_EXEC __pgprot(__PAGE_READONLY)
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#define PAGE_COPY PAGE_COPY_NOEXEC
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#define PAGE_READONLY PAGE_READONLY_NOEXEC
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#define PAGE_SHARED PAGE_SHARED_EXEC
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#define __PAGE_KERNEL_BASE (_PAGE_PRESENTV | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_GLOBAL)
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#define __PAGE_KERNEL (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_CACHE | _PAGE_NX)
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#define __PAGE_KERNEL_NOCACHE (__PAGE_KERNEL_BASE | _PAGE_PROT_WKNU | _PAGE_NX)
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#define __PAGE_KERNEL_EXEC (__PAGE_KERNEL & ~_PAGE_NX)
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#define __PAGE_KERNEL_RO (__PAGE_KERNEL_BASE | _PAGE_PROT_RKNU | _PAGE_CACHE | _PAGE_NX)
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#define __PAGE_KERNEL_LARGE (__PAGE_KERNEL | _PAGE_PSE)
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#define __PAGE_KERNEL_LARGE_EXEC (__PAGE_KERNEL_EXEC | _PAGE_PSE)
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#define PAGE_KERNEL __pgprot(__PAGE_KERNEL)
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#define PAGE_KERNEL_RO __pgprot(__PAGE_KERNEL_RO)
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#define PAGE_KERNEL_EXEC __pgprot(__PAGE_KERNEL_EXEC)
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#define PAGE_KERNEL_NOCACHE __pgprot(__PAGE_KERNEL_NOCACHE)
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#define PAGE_KERNEL_LARGE __pgprot(__PAGE_KERNEL_LARGE)
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#define PAGE_KERNEL_LARGE_EXEC __pgprot(__PAGE_KERNEL_LARGE_EXEC)
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#define __PAGE_USERIO (__PAGE_KERNEL_BASE | _PAGE_PROT_WKWU | _PAGE_NX)
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#define PAGE_USERIO __pgprot(__PAGE_USERIO)
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/*
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* Whilst the MN10300 can do page protection for execute (given separate data
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* and insn TLBs), we are not supporting it at the moment. Write permission,
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* however, always implies read permission (but not execute permission).
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*/
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY_NOEXEC
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#define __P010 PAGE_COPY_NOEXEC
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#define __P011 PAGE_COPY_NOEXEC
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#define __P100 PAGE_READONLY_EXEC
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#define __P101 PAGE_READONLY_EXEC
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#define __P110 PAGE_COPY_EXEC
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#define __P111 PAGE_COPY_EXEC
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY_NOEXEC
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#define __S010 PAGE_SHARED_NOEXEC
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#define __S011 PAGE_SHARED_NOEXEC
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#define __S100 PAGE_READONLY_EXEC
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#define __S101 PAGE_READONLY_EXEC
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#define __S110 PAGE_SHARED_EXEC
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#define __S111 PAGE_SHARED_EXEC
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/*
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* Define this to warn about kernel memory accesses that are
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* done without a 'verify_area(VERIFY_WRITE,..)'
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*/
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#undef TEST_VERIFY_AREA
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#define pte_present(x) (pte_val(x) & _PAGE_VALID)
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#define pte_clear(mm, addr, xp) \
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do { \
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set_pte_at((mm), (addr), (xp), __pte(0)); \
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} while (0)
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#define pmd_none(x) (!pmd_val(x))
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#define pmd_present(x) (!pmd_none(x))
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#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
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#define pmd_bad(x) 0
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#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
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#ifndef __ASSEMBLY__
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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static inline int pte_user(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
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static inline int pte_read(pte_t pte) { return pte_val(pte) & __PAGE_PROT_USER; }
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static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
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static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
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static inline int pte_write(pte_t pte) { return pte_val(pte) & __PAGE_PROT_WRITE; }
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static inline int pte_special(pte_t pte){ return 0; }
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/*
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* The following only works if pte_present() is not true.
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*/
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static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
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static inline pte_t pte_rdprotect(pte_t pte)
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{
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pte_val(pte) &= ~(__PAGE_PROT_USER|__PAGE_PROT_UWAUX); return pte;
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}
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static inline pte_t pte_exprotect(pte_t pte)
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{
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pte_val(pte) |= _PAGE_NX; return pte;
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}
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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pte_val(pte) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX); return pte;
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}
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static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
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static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
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static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
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static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
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static inline pte_t pte_mkexec(pte_t pte) { pte_val(pte) &= ~_PAGE_NX; return pte; }
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static inline pte_t pte_mkread(pte_t pte)
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{
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pte_val(pte) |= __PAGE_PROT_USER;
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if (pte_write(pte))
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pte_val(pte) |= __PAGE_PROT_UWAUX;
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return pte;
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}
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static inline pte_t pte_mkwrite(pte_t pte)
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{
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pte_val(pte) |= __PAGE_PROT_WRITE;
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if (pte_val(pte) & __PAGE_PROT_USER)
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pte_val(pte) |= __PAGE_PROT_UWAUX;
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return pte;
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}
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static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
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#define pte_ERROR(e) \
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printk(KERN_ERR "%s:%d: bad pte %08lx.\n", \
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__FILE__, __LINE__, pte_val(e))
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#define pgd_ERROR(e) \
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printk(KERN_ERR "%s:%d: bad pgd %08lx.\n", \
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__FILE__, __LINE__, pgd_val(e))
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/*
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* The "pgd_xxx()" functions here are trivial for a folded two-level
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* setup: the pgd is never bad, and a pmd always exists (as it's folded
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* into the pgd entry)
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*/
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#define pgd_clear(xp) do { } while (0)
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/*
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* Certain architectures need to do special things when PTEs
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* within a page table are directly modified. Thus, the following
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* hook is made available.
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*/
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#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
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#define set_pte_at(mm, addr, ptep, pteval) set_pte((ptep), (pteval))
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#define set_pte_atomic(pteptr, pteval) set_pte((pteptr), (pteval))
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/*
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* (pmds are folded into pgds so this doesn't get actually called,
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* but the define is needed for a generic inline function.)
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*/
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#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
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#define ptep_get_and_clear(mm, addr, ptep) \
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__pte(xchg(&(ptep)->pte, 0))
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#define pte_same(a, b) (pte_val(a) == pte_val(b))
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#define pte_none(x) (!pte_val(x))
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#define pte_pfn(x) ((unsigned long) (pte_val(x) >> PAGE_SHIFT))
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#define __pfn_addr(pfn) ((pfn) << PAGE_SHIFT)
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#define pfn_pte(pfn, prot) __pte(__pfn_addr(pfn) | pgprot_val(prot))
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#define pfn_pmd(pfn, prot) __pmd(__pfn_addr(pfn) | pgprot_val(prot))
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/*
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* All present user pages are user-executable:
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*/
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static inline int pte_exec(pte_t pte)
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{
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return pte_user(pte);
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}
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/*
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* All present pages are kernel-executable:
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*/
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static inline int pte_exec_kernel(pte_t pte)
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{
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return 1;
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}
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#define PTE_FILE_MAX_BITS 30
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#define pte_to_pgoff(pte) (pte_val(pte) >> 2)
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#define pgoff_to_pte(off) __pte((off) << 2 | _PAGE_FILE)
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/* Encode and de-code a swap entry */
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#define __swp_type(x) (((x).val >> 2) & 0x3f)
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#define __swp_offset(x) ((x).val >> 8)
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#define __swp_entry(type, offset) \
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((swp_entry_t) { ((type) << 2) | ((offset) << 8) })
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
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#define __swp_entry_to_pte(x) __pte((x).val)
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static inline
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int ptep_test_and_clear_dirty(struct vm_area_struct *vma, unsigned long addr,
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pte_t *ptep)
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{
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if (!pte_dirty(*ptep))
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return 0;
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return test_and_clear_bit(_PAGE_BIT_DIRTY, &ptep->pte);
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}
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static inline
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int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr,
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pte_t *ptep)
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{
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if (!pte_young(*ptep))
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return 0;
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return test_and_clear_bit(_PAGE_BIT_ACCESSED, &ptep->pte);
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}
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static inline
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void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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pte_val(*ptep) &= ~(__PAGE_PROT_WRITE|__PAGE_PROT_UWAUX);
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}
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static inline void ptep_mkdirty(pte_t *ptep)
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{
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set_bit(_PAGE_BIT_DIRTY, &ptep->pte);
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}
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/*
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* Macro to mark a page protection value as "uncacheable". On processors which
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* do not support it, this is a no-op.
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*/
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#define pgprot_noncached(prot) __pgprot(pgprot_val(prot) & ~_PAGE_CACHE)
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/*
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* Macro to mark a page protection value as "Write-Through".
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* On processors which do not support it, this is a no-op.
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*/
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#define pgprot_through(prot) __pgprot(pgprot_val(prot) | _PAGE_CACHE_WT)
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*/
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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#define mk_pte_huge(entry) \
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((entry).pte |= _PAGE_PRESENT | _PAGE_PSE | _PAGE_VALID)
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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pte_val(pte) &= _PAGE_CHG_MASK;
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pte_val(pte) |= pgprot_val(newprot);
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return pte;
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}
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#define page_pte(page) page_pte_prot((page), __pgprot(0))
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#define pmd_page_kernel(pmd) \
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((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
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#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
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#define pmd_large(pmd) \
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((pmd_val(pmd) & (_PAGE_PSE | _PAGE_PRESENT)) == \
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(_PAGE_PSE | _PAGE_PRESENT))
|
|
|
|
/*
|
|
* the pgd page can be thought of an array like this: pgd_t[PTRS_PER_PGD]
|
|
*
|
|
* this macro returns the index of the entry in the pgd page which would
|
|
* control the given virtual address
|
|
*/
|
|
#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
|
|
|
|
/*
|
|
* pgd_offset() returns a (pgd_t *)
|
|
* pgd_index() is used get the offset into the pgd page's array of pgd_t's;
|
|
*/
|
|
#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
|
|
|
|
/*
|
|
* a shortcut which implies the use of the kernel's pgd, instead
|
|
* of a process's
|
|
*/
|
|
#define pgd_offset_k(address) pgd_offset(&init_mm, address)
|
|
|
|
/*
|
|
* the pmd page can be thought of an array like this: pmd_t[PTRS_PER_PMD]
|
|
*
|
|
* this macro returns the index of the entry in the pmd page which would
|
|
* control the given virtual address
|
|
*/
|
|
#define pmd_index(address) \
|
|
(((address) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
|
|
|
|
/*
|
|
* the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
|
|
*
|
|
* this macro returns the index of the entry in the pte page which would
|
|
* control the given virtual address
|
|
*/
|
|
#define pte_index(address) \
|
|
(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
|
|
|
|
#define pte_offset_kernel(dir, address) \
|
|
((pte_t *) pmd_page_kernel(*(dir)) + pte_index(address))
|
|
|
|
/*
|
|
* Make a given kernel text page executable/non-executable.
|
|
* Returns the previous executability setting of that page (which
|
|
* is used to restore the previous state). Used by the SMP bootup code.
|
|
* NOTE: this is an __init function for security reasons.
|
|
*/
|
|
static inline int set_kernel_exec(unsigned long vaddr, int enable)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
#define pte_offset_map(dir, address) \
|
|
((pte_t *) page_address(pmd_page(*(dir))) + pte_index(address))
|
|
#define pte_unmap(pte) do {} while (0)
|
|
|
|
/*
|
|
* The MN10300 has external MMU info in the form of a TLB: this is adapted from
|
|
* the kernel page tables containing the necessary information by tlb-mn10300.S
|
|
*/
|
|
extern void update_mmu_cache(struct vm_area_struct *vma,
|
|
unsigned long address, pte_t *ptep);
|
|
|
|
#endif /* !__ASSEMBLY__ */
|
|
|
|
#define kern_addr_valid(addr) (1)
|
|
|
|
#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
|
|
remap_pfn_range((vma), (vaddr), (pfn), (size), (prot))
|
|
|
|
#define MK_IOSPACE_PFN(space, pfn) (pfn)
|
|
#define GET_IOSPACE(pfn) 0
|
|
#define GET_PFN(pfn) (pfn)
|
|
|
|
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
|
|
#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_DIRTY
|
|
#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
|
|
#define __HAVE_ARCH_PTEP_SET_WRPROTECT
|
|
#define __HAVE_ARCH_PTEP_MKDIRTY
|
|
#define __HAVE_ARCH_PTE_SAME
|
|
#include <asm-generic/pgtable.h>
|
|
|
|
#endif /* !__ASSEMBLY__ */
|
|
|
|
#endif /* _ASM_PGTABLE_H */
|