mirror of https://gitee.com/openkylin/linux.git
418 lines
10 KiB
C
418 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* PowerPC Memory Protection Keys management
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*
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* Copyright 2017, Ram Pai, IBM Corporation.
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*/
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#include <asm/mman.h>
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#include <asm/mmu_context.h>
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#include <asm/setup.h>
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#include <linux/pkeys.h>
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#include <linux/of_device.h>
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DEFINE_STATIC_KEY_TRUE(pkey_disabled);
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int pkeys_total; /* Total pkeys as per device tree */
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u32 initial_allocation_mask; /* Bits set for the initially allocated keys */
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u32 reserved_allocation_mask; /* Bits set for reserved keys */
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static bool pkey_execute_disable_supported;
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static bool pkeys_devtree_defined; /* property exported by device tree */
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static u64 pkey_amr_mask; /* Bits in AMR not to be touched */
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static u64 pkey_iamr_mask; /* Bits in AMR not to be touched */
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static u64 pkey_uamor_mask; /* Bits in UMOR not to be touched */
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static int execute_only_key = 2;
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#define AMR_BITS_PER_PKEY 2
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#define AMR_RD_BIT 0x1UL
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#define AMR_WR_BIT 0x2UL
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#define IAMR_EX_BIT 0x1UL
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#define PKEY_REG_BITS (sizeof(u64)*8)
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#define pkeyshift(pkey) (PKEY_REG_BITS - ((pkey+1) * AMR_BITS_PER_PKEY))
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static void scan_pkey_feature(void)
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{
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u32 vals[2];
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struct device_node *cpu;
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cpu = of_find_node_by_type(NULL, "cpu");
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if (!cpu)
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return;
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if (of_property_read_u32_array(cpu,
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"ibm,processor-storage-keys", vals, 2))
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return;
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/*
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* Since any pkey can be used for data or execute, we will just treat
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* all keys as equal and track them as one entity.
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*/
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pkeys_total = vals[0];
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pkeys_devtree_defined = true;
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}
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static inline bool pkey_mmu_enabled(void)
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{
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if (firmware_has_feature(FW_FEATURE_LPAR))
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return pkeys_total;
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else
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return cpu_has_feature(CPU_FTR_PKEY);
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}
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static int pkey_initialize(void)
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{
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int os_reserved, i;
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/*
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* We define PKEY_DISABLE_EXECUTE in addition to the arch-neutral
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* generic defines for PKEY_DISABLE_ACCESS and PKEY_DISABLE_WRITE.
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* Ensure that the bits a distinct.
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*/
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BUILD_BUG_ON(PKEY_DISABLE_EXECUTE &
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(PKEY_DISABLE_ACCESS | PKEY_DISABLE_WRITE));
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/*
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* pkey_to_vmflag_bits() assumes that the pkey bits are contiguous
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* in the vmaflag. Make sure that is really the case.
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*/
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BUILD_BUG_ON(__builtin_clzl(ARCH_VM_PKEY_FLAGS >> VM_PKEY_SHIFT) +
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__builtin_popcountl(ARCH_VM_PKEY_FLAGS >> VM_PKEY_SHIFT)
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!= (sizeof(u64) * BITS_PER_BYTE));
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/* scan the device tree for pkey feature */
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scan_pkey_feature();
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/*
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* Let's assume 32 pkeys on P8 bare metal, if its not defined by device
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* tree. We make this exception since skiboot forgot to expose this
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* property on power8.
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*/
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if (!pkeys_devtree_defined && !firmware_has_feature(FW_FEATURE_LPAR) &&
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cpu_has_feature(CPU_FTRS_POWER8))
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pkeys_total = 32;
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/*
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* Adjust the upper limit, based on the number of bits supported by
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* arch-neutral code.
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*/
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pkeys_total = min_t(int, pkeys_total,
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((ARCH_VM_PKEY_FLAGS >> VM_PKEY_SHIFT)+1));
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if (!pkey_mmu_enabled() || radix_enabled() || !pkeys_total)
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static_branch_enable(&pkey_disabled);
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else
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static_branch_disable(&pkey_disabled);
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if (static_branch_likely(&pkey_disabled))
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return 0;
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/*
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* The device tree cannot be relied to indicate support for
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* execute_disable support. Instead we use a PVR check.
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*/
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if (pvr_version_is(PVR_POWER7) || pvr_version_is(PVR_POWER7p))
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pkey_execute_disable_supported = false;
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else
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pkey_execute_disable_supported = true;
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#ifdef CONFIG_PPC_4K_PAGES
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/*
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* The OS can manage only 8 pkeys due to its inability to represent them
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* in the Linux 4K PTE.
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*/
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os_reserved = pkeys_total - 8;
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#else
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os_reserved = 0;
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#endif
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/* Bits are in LE format. */
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reserved_allocation_mask = (0x1 << 1) | (0x1 << execute_only_key);
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/* register mask is in BE format */
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pkey_amr_mask = ~0x0ul;
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pkey_amr_mask &= ~(0x3ul << pkeyshift(0));
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pkey_iamr_mask = ~0x0ul;
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pkey_iamr_mask &= ~(0x3ul << pkeyshift(0));
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pkey_iamr_mask &= ~(0x3ul << pkeyshift(execute_only_key));
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pkey_uamor_mask = ~0x0ul;
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pkey_uamor_mask &= ~(0x3ul << pkeyshift(0));
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pkey_uamor_mask &= ~(0x3ul << pkeyshift(execute_only_key));
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/* mark the rest of the keys as reserved and hence unavailable */
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for (i = (pkeys_total - os_reserved); i < pkeys_total; i++) {
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reserved_allocation_mask |= (0x1 << i);
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pkey_uamor_mask &= ~(0x3ul << pkeyshift(i));
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}
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initial_allocation_mask = reserved_allocation_mask | (0x1 << 0);
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if (unlikely((pkeys_total - os_reserved) <= execute_only_key)) {
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/*
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* Insufficient number of keys to support
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* execute only key. Mark it unavailable.
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* Any AMR, UAMOR, IAMR bit set for
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* this key is irrelevant since this key
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* can never be allocated.
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*/
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execute_only_key = -1;
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}
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return 0;
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}
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arch_initcall(pkey_initialize);
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void pkey_mm_init(struct mm_struct *mm)
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{
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if (static_branch_likely(&pkey_disabled))
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return;
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mm_pkey_allocation_map(mm) = initial_allocation_mask;
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mm->context.execute_only_pkey = execute_only_key;
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}
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static inline u64 read_amr(void)
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{
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return mfspr(SPRN_AMR);
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}
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static inline void write_amr(u64 value)
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{
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mtspr(SPRN_AMR, value);
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}
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static inline u64 read_iamr(void)
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{
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if (!likely(pkey_execute_disable_supported))
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return 0x0UL;
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return mfspr(SPRN_IAMR);
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}
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static inline void write_iamr(u64 value)
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{
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if (!likely(pkey_execute_disable_supported))
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return;
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mtspr(SPRN_IAMR, value);
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}
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static inline u64 read_uamor(void)
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{
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return mfspr(SPRN_UAMOR);
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}
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static inline void write_uamor(u64 value)
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{
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mtspr(SPRN_UAMOR, value);
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}
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static bool is_pkey_enabled(int pkey)
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{
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u64 uamor = read_uamor();
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u64 pkey_bits = 0x3ul << pkeyshift(pkey);
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u64 uamor_pkey_bits = (uamor & pkey_bits);
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/*
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* Both the bits in UAMOR corresponding to the key should be set or
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* reset.
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*/
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WARN_ON(uamor_pkey_bits && (uamor_pkey_bits != pkey_bits));
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return !!(uamor_pkey_bits);
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}
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static inline void init_amr(int pkey, u8 init_bits)
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{
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u64 new_amr_bits = (((u64)init_bits & 0x3UL) << pkeyshift(pkey));
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u64 old_amr = read_amr() & ~((u64)(0x3ul) << pkeyshift(pkey));
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write_amr(old_amr | new_amr_bits);
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}
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static inline void init_iamr(int pkey, u8 init_bits)
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{
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u64 new_iamr_bits = (((u64)init_bits & 0x1UL) << pkeyshift(pkey));
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u64 old_iamr = read_iamr() & ~((u64)(0x1ul) << pkeyshift(pkey));
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write_iamr(old_iamr | new_iamr_bits);
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}
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/*
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* Set the access rights in AMR IAMR and UAMOR registers for @pkey to that
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* specified in @init_val.
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*/
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int __arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
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unsigned long init_val)
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{
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u64 new_amr_bits = 0x0ul;
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u64 new_iamr_bits = 0x0ul;
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if (!is_pkey_enabled(pkey))
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return -EINVAL;
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if (init_val & PKEY_DISABLE_EXECUTE) {
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if (!pkey_execute_disable_supported)
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return -EINVAL;
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new_iamr_bits |= IAMR_EX_BIT;
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}
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init_iamr(pkey, new_iamr_bits);
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/* Set the bits we need in AMR: */
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if (init_val & PKEY_DISABLE_ACCESS)
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new_amr_bits |= AMR_RD_BIT | AMR_WR_BIT;
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else if (init_val & PKEY_DISABLE_WRITE)
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new_amr_bits |= AMR_WR_BIT;
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init_amr(pkey, new_amr_bits);
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return 0;
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}
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void thread_pkey_regs_save(struct thread_struct *thread)
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{
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if (static_branch_likely(&pkey_disabled))
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return;
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/*
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* TODO: Skip saving registers if @thread hasn't used any keys yet.
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*/
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thread->amr = read_amr();
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thread->iamr = read_iamr();
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thread->uamor = read_uamor();
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}
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void thread_pkey_regs_restore(struct thread_struct *new_thread,
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struct thread_struct *old_thread)
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{
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if (static_branch_likely(&pkey_disabled))
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return;
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if (old_thread->amr != new_thread->amr)
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write_amr(new_thread->amr);
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if (old_thread->iamr != new_thread->iamr)
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write_iamr(new_thread->iamr);
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if (old_thread->uamor != new_thread->uamor)
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write_uamor(new_thread->uamor);
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}
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void thread_pkey_regs_init(struct thread_struct *thread)
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{
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if (static_branch_likely(&pkey_disabled))
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return;
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thread->amr = pkey_amr_mask;
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thread->iamr = pkey_iamr_mask;
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thread->uamor = pkey_uamor_mask;
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write_uamor(pkey_uamor_mask);
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write_amr(pkey_amr_mask);
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write_iamr(pkey_iamr_mask);
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}
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static inline bool pkey_allows_readwrite(int pkey)
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{
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int pkey_shift = pkeyshift(pkey);
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if (!is_pkey_enabled(pkey))
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return true;
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return !(read_amr() & ((AMR_RD_BIT|AMR_WR_BIT) << pkey_shift));
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}
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int __execute_only_pkey(struct mm_struct *mm)
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{
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return mm->context.execute_only_pkey;
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}
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static inline bool vma_is_pkey_exec_only(struct vm_area_struct *vma)
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{
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/* Do this check first since the vm_flags should be hot */
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if ((vma->vm_flags & (VM_READ | VM_WRITE | VM_EXEC)) != VM_EXEC)
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return false;
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return (vma_pkey(vma) == vma->vm_mm->context.execute_only_pkey);
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}
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/*
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* This should only be called for *plain* mprotect calls.
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*/
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int __arch_override_mprotect_pkey(struct vm_area_struct *vma, int prot,
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int pkey)
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{
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/*
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* If the currently associated pkey is execute-only, but the requested
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* protection is not execute-only, move it back to the default pkey.
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*/
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if (vma_is_pkey_exec_only(vma) && (prot != PROT_EXEC))
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return 0;
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/*
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* The requested protection is execute-only. Hence let's use an
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* execute-only pkey.
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*/
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if (prot == PROT_EXEC) {
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pkey = execute_only_pkey(vma->vm_mm);
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if (pkey > 0)
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return pkey;
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}
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/* Nothing to override. */
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return vma_pkey(vma);
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}
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static bool pkey_access_permitted(int pkey, bool write, bool execute)
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{
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int pkey_shift;
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u64 amr;
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if (!is_pkey_enabled(pkey))
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return true;
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pkey_shift = pkeyshift(pkey);
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if (execute && !(read_iamr() & (IAMR_EX_BIT << pkey_shift)))
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return true;
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amr = read_amr(); /* Delay reading amr until absolutely needed */
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return ((!write && !(amr & (AMR_RD_BIT << pkey_shift))) ||
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(write && !(amr & (AMR_WR_BIT << pkey_shift))));
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}
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bool arch_pte_access_permitted(u64 pte, bool write, bool execute)
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{
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if (static_branch_likely(&pkey_disabled))
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return true;
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return pkey_access_permitted(pte_to_pkey_bits(pte), write, execute);
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}
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/*
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* We only want to enforce protection keys on the current thread because we
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* effectively have no access to AMR/IAMR for other threads or any way to tell
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* which AMR/IAMR in a threaded process we could use.
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*
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* So do not enforce things if the VMA is not from the current mm, or if we are
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* in a kernel thread.
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*/
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static inline bool vma_is_foreign(struct vm_area_struct *vma)
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{
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if (!current->mm)
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return true;
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/* if it is not our ->mm, it has to be foreign */
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if (current->mm != vma->vm_mm)
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return true;
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return false;
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}
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bool arch_vma_access_permitted(struct vm_area_struct *vma, bool write,
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bool execute, bool foreign)
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{
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if (static_branch_likely(&pkey_disabled))
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return true;
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/*
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* Do not enforce our key-permissions on a foreign vma.
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*/
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if (foreign || vma_is_foreign(vma))
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return true;
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return pkey_access_permitted(vma_pkey(vma), write, execute);
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}
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