Jun Nie 8d9a0860b7 clk: zx: reform pll config info to ease code extension ... Add power down bit and pll lock bit in pll config structure to ease new SoC support. Signed-off-by: Jun Nie <jun.nie@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>		2016-09-14 13:48:32 -07:00
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Makefile	clk: zx: Add audio div clock method for zx296702	2015-07-28 11:59:34 -07:00
clk-zx296702.c	clk: zte: Remove CLK_IS_ROOT	2016-04-15 16:50:07 -07:00
clk.c	clk: zx: reform pll config info to ease code extension	2016-09-14 13:48:32 -07:00
clk.h	clk: zx: reform pll config info to ease code extension	2016-09-14 13:48:32 -07:00