linux/drivers/vfio/pci
Alex Williamson db04264fe9 vfio/pci: Mask buggy SR-IOV VF INTx support
The SR-IOV spec requires that VFs must report zero for the INTx pin
register as VFs are precluded from INTx support.  It's much easier for
the host kernel to understand whether a device is a VF and therefore
whether a non-zero pin register value is bogus than it is to do the
same in userspace.  Override the INTx count for such devices and
virtualize the pin register to provide a consistent view of the device
to the user.

As this is clearly a spec violation, warn about it to support hardware
validation, but also provide a known whitelist as it doesn't do much
good to continue complaining if the hardware vendor doesn't plan to
fix it.

Known devices with this issue: 8086:270c

Tested-by: Gage Eads <gage.eads@intel.com>
Reviewed-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2018-09-25 13:01:27 -06:00
..
Kconfig vfio/pci: Make IGD support a configurable option 2018-06-18 16:39:50 -06:00
Makefile vfio/pci: Intel IGD OpRegion support 2016-02-22 16:10:09 -07:00
vfio_pci.c vfio/pci: Mask buggy SR-IOV VF INTx support 2018-09-25 13:01:27 -06:00
vfio_pci_config.c vfio/pci: Mask buggy SR-IOV VF INTx support 2018-09-25 13:01:27 -06:00
vfio_pci_igd.c vfio/pci: Intel IGD host and LCP bridge config space access 2016-02-22 16:10:09 -07:00
vfio_pci_intrs.c vfio/pci: Fix integer overflows, bitmask check 2016-10-26 13:49:29 -06:00
vfio_pci_private.h vfio/pci: Add ioeventfd support 2018-03-26 13:22:58 -06:00
vfio_pci_rdwr.c vfio/pci: Add ioeventfd support 2018-03-26 13:22:58 -06:00