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83 lines
3.5 KiB
Plaintext
83 lines
3.5 KiB
Plaintext
Memory Layout on AArch64 Linux
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==============================
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Author: Catalin Marinas <catalin.marinas@arm.com>
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Date : 20 February 2012
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This document describes the virtual memory layout used by the AArch64
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Linux kernel. The architecture allows up to 4 levels of translation
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tables with a 4KB page size and up to 3 levels with a 64KB page size.
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AArch64 Linux uses 3 levels of translation tables with the 4KB page
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configuration, allowing 39-bit (512GB) virtual addresses for both user
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and kernel. With 64KB pages, only 2 levels of translation tables are
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used but the memory layout is the same.
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User addresses have bits 63:39 set to 0 while the kernel addresses have
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the same bits set to 1. TTBRx selection is given by bit 63 of the
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virtual address. The swapper_pg_dir contains only kernel (global)
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mappings while the user pgd contains only user (non-global) mappings.
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The swapper_pgd_dir address is written to TTBR1 and never written to
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TTBR0.
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AArch64 Linux memory layout:
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Start End Size Use
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-----------------------------------------------------------------------
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0000000000000000 0000007fffffffff 512GB user
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ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc
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ffffffbbffff0000 ffffffbbffffffff 64KB [guard page]
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ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
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ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap]
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ffffffbffbc00000 ffffffbffbdfffff 2MB earlyprintk device
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ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space
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ffffffbbffff0000 ffffffbcffffffff ~2MB [guard]
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ffffffbffc000000 ffffffbfffffffff 64MB modules
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ffffffc000000000 ffffffffffffffff 256GB kernel logical memory map
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Translation table lookup with 4KB pages:
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+--------+--------+--------+--------+--------+--------+--------+--------+
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|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
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+--------+--------+--------+--------+--------+--------+--------+--------+
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| | | | | |
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| | | | | v
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| | | | | [11:0] in-page offset
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| | | | +-> [20:12] L3 index
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| | | +-----------> [29:21] L2 index
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| | +---------------------> [38:30] L1 index
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| +-------------------------------> [47:39] L0 index (not used)
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+-------------------------------------------------> [63] TTBR0/1
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Translation table lookup with 64KB pages:
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+--------+--------+--------+--------+--------+--------+--------+--------+
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|63 56|55 48|47 40|39 32|31 24|23 16|15 8|7 0|
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+--------+--------+--------+--------+--------+--------+--------+--------+
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| | | | |
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| | | | v
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| | | | [15:0] in-page offset
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| | | +----------> [28:16] L3 index
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| | +--------------------------> [41:29] L2 index (only 38:29 used)
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| +-------------------------------> [47:42] L1 index (not used)
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+-------------------------------------------------> [63] TTBR0/1
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When using KVM, the hypervisor maps kernel pages in EL2, at a fixed
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offset from the kernel VA (top 24bits of the kernel VA set to zero):
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Start End Size Use
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-----------------------------------------------------------------------
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0000004000000000 0000007fffffffff 256GB kernel objects mapped in HYP
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