mirror of https://gitee.com/openkylin/linux.git
126 lines
3.2 KiB
C
126 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* BRIEF MODULE DESCRIPTION
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* MyCable XXS1500 board support
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*
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* Copyright 2003, 2008 MontaVista Software Inc.
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* Author: MontaVista Software, Inc. <source@mvista.com>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <asm/bootinfo.h>
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#include <asm/reboot.h>
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#include <asm/setup.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/gpio-au1000.h>
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#include <prom.h>
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const char *get_system_type(void)
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{
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return "XXS1500";
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}
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void prom_putchar(char c)
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{
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alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
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}
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static void xxs1500_reset(char *c)
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{
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/* Jump to the reset vector */
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__asm__ __volatile__("jr\t%0" : : "r"(0xbfc00000));
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}
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static void xxs1500_power_off(void)
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{
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while (1)
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asm volatile (
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" .set mips32 \n"
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" wait \n"
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" .set mips0 \n");
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}
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void __init board_setup(void)
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{
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u32 pin_func;
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pm_power_off = xxs1500_power_off;
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_machine_halt = xxs1500_power_off;
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_machine_restart = xxs1500_reset;
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alchemy_gpio1_input_enable();
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alchemy_gpio2_enable();
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/* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
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pin_func = alchemy_rdsys(AU1000_SYS_PINFUNC) & ~SYS_PF_UR3;
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pin_func |= SYS_PF_UR3;
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alchemy_wrsys(pin_func, AU1000_SYS_PINFUNC);
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/* Enable UART */
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alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
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/* Enable DTR (MCR bit 0) = USB power up */
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__raw_writel(1, (void __iomem *)KSEG1ADDR(AU1000_UART3_PHYS_ADDR + 0x18));
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wmb();
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}
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/******************************************************************************/
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static struct resource xxs1500_pcmcia_res[] = {
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{
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.name = "pcmcia-io",
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.flags = IORESOURCE_MEM,
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.start = AU1000_PCMCIA_IO_PHYS_ADDR,
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.end = AU1000_PCMCIA_IO_PHYS_ADDR + 0x000400000 - 1,
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},
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{
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.name = "pcmcia-attr",
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.flags = IORESOURCE_MEM,
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.start = AU1000_PCMCIA_ATTR_PHYS_ADDR,
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.end = AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x000400000 - 1,
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},
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{
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.name = "pcmcia-mem",
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.flags = IORESOURCE_MEM,
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.start = AU1000_PCMCIA_MEM_PHYS_ADDR,
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.end = AU1000_PCMCIA_MEM_PHYS_ADDR + 0x000400000 - 1,
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},
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};
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static struct platform_device xxs1500_pcmcia_dev = {
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.name = "xxs1500_pcmcia",
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.id = -1,
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.num_resources = ARRAY_SIZE(xxs1500_pcmcia_res),
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.resource = xxs1500_pcmcia_res,
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};
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static struct platform_device *xxs1500_devs[] __initdata = {
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&xxs1500_pcmcia_dev,
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};
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static int __init xxs1500_dev_init(void)
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{
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irq_set_irq_type(AU1500_GPIO204_INT, IRQ_TYPE_LEVEL_HIGH);
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irq_set_irq_type(AU1500_GPIO201_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO202_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO203_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO205_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO207_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO0_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO1_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO2_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO3_INT, IRQ_TYPE_LEVEL_LOW);
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irq_set_irq_type(AU1500_GPIO4_INT, IRQ_TYPE_LEVEL_LOW); /* CF irq */
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irq_set_irq_type(AU1500_GPIO5_INT, IRQ_TYPE_LEVEL_LOW);
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return platform_add_devices(xxs1500_devs,
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ARRAY_SIZE(xxs1500_devs));
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}
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device_initcall(xxs1500_dev_init);
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