mirror of https://gitee.com/openkylin/linux.git
159 lines
3.8 KiB
C
159 lines
3.8 KiB
C
/*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Based on drivers/serial/s3c6400.c
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*
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* Driver for Samsung S5PV210 SoC UARTs.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/init.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <linux/delay.h>
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#include <asm/irq.h>
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#include <mach/hardware.h>
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#include <plat/regs-serial.h>
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#include "samsung.h"
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static int s5pv210_serial_setsource(struct uart_port *port,
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struct s3c24xx_uart_clksrc *clk)
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{
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struct s3c2410_uartcfg *cfg = port->dev->platform_data;
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unsigned long ucon = rd_regl(port, S3C2410_UCON);
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if (cfg->flags & NO_NEED_CHECK_CLKSRC)
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return 0;
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if (strcmp(clk->name, "pclk") == 0)
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ucon &= ~S5PV210_UCON_CLKMASK;
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else if (strcmp(clk->name, "uclk1") == 0)
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ucon |= S5PV210_UCON_CLKMASK;
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else {
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printk(KERN_ERR "unknown clock source %s\n", clk->name);
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return -EINVAL;
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}
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wr_regl(port, S3C2410_UCON, ucon);
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return 0;
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}
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static int s5pv210_serial_getsource(struct uart_port *port,
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struct s3c24xx_uart_clksrc *clk)
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{
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struct s3c2410_uartcfg *cfg = port->dev->platform_data;
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u32 ucon = rd_regl(port, S3C2410_UCON);
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clk->divisor = 1;
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if (cfg->flags & NO_NEED_CHECK_CLKSRC)
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return 0;
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switch (ucon & S5PV210_UCON_CLKMASK) {
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case S5PV210_UCON_PCLK:
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clk->name = "pclk";
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break;
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case S5PV210_UCON_UCLK:
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clk->name = "uclk1";
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break;
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}
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return 0;
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}
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static int s5pv210_serial_resetport(struct uart_port *port,
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struct s3c2410_uartcfg *cfg)
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{
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unsigned long ucon = rd_regl(port, S3C2410_UCON);
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ucon &= S5PV210_UCON_CLKMASK;
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wr_regl(port, S3C2410_UCON, ucon | cfg->ucon);
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wr_regl(port, S3C2410_ULCON, cfg->ulcon);
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/* reset both fifos */
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wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
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wr_regl(port, S3C2410_UFCON, cfg->ufcon);
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/* It is need to delay When reset FIFO register */
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udelay(1);
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return 0;
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}
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#define S5PV210_UART_DEFAULT_INFO(fifo_size) \
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.name = "Samsung S5PV210 UART0", \
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.type = PORT_S3C6400, \
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.fifosize = fifo_size, \
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.has_divslot = 1, \
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.rx_fifomask = S5PV210_UFSTAT_RXMASK, \
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.rx_fifoshift = S5PV210_UFSTAT_RXSHIFT, \
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.rx_fifofull = S5PV210_UFSTAT_RXFULL, \
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.tx_fifofull = S5PV210_UFSTAT_TXFULL, \
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.tx_fifomask = S5PV210_UFSTAT_TXMASK, \
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.tx_fifoshift = S5PV210_UFSTAT_TXSHIFT, \
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.get_clksrc = s5pv210_serial_getsource, \
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.set_clksrc = s5pv210_serial_setsource, \
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.reset_port = s5pv210_serial_resetport
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static struct s3c24xx_uart_info s5p_port_fifo256 = {
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S5PV210_UART_DEFAULT_INFO(256),
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};
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static struct s3c24xx_uart_info s5p_port_fifo64 = {
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S5PV210_UART_DEFAULT_INFO(64),
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};
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static struct s3c24xx_uart_info s5p_port_fifo16 = {
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S5PV210_UART_DEFAULT_INFO(16),
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};
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static struct s3c24xx_uart_info *s5p_uart_inf[] = {
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[0] = &s5p_port_fifo256,
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[1] = &s5p_port_fifo64,
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[2] = &s5p_port_fifo16,
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[3] = &s5p_port_fifo16,
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};
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/* device management */
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static int s5p_serial_probe(struct platform_device *pdev)
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{
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return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]);
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}
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static struct platform_driver s5p_serial_driver = {
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.probe = s5p_serial_probe,
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.remove = __devexit_p(s3c24xx_serial_remove),
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.driver = {
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.name = "s5pv210-uart",
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.owner = THIS_MODULE,
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},
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};
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static int __init s5p_serial_init(void)
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{
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return s3c24xx_serial_init(&s5p_serial_driver, *s5p_uart_inf);
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}
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static void __exit s5p_serial_exit(void)
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{
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platform_driver_unregister(&s5p_serial_driver);
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}
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module_init(s5p_serial_init);
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module_exit(s5p_serial_exit);
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:s5pv210-uart");
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MODULE_DESCRIPTION("Samsung S5PV210 UART Driver support");
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MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
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