mirror of https://gitee.com/openkylin/linux.git
491 lines
13 KiB
Plaintext
491 lines
13 KiB
Plaintext
== MediaTek MT7622 pinctrl controller ==
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Required properties for the root node:
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- compatible: Should be one of the following
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"mediatek,mt7622-pinctrl" for MT7622 SoC
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"mediatek,mt7629-pinctrl" for MT7629 SoC
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- reg: offset and length of the pinctrl space
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- gpio-controller: Marks the device node as a GPIO controller.
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- #gpio-cells: Should be two. The first cell is the pin number and the
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second is the GPIO flags.
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Optional properties:
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- interrupt-controller : Marks the device node as an interrupt controller
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If the property interrupt-controller is defined, following property is required
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- reg-names: A string describing the "reg" entries. Must contain "eint".
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- interrupts : The interrupt output from the controller.
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- #interrupt-cells: Should be two.
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Please refer to pinctrl-bindings.txt in this directory for details of the
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common pinctrl bindings used by client devices, including the meaning of the
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phrase "pin configuration node".
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MT7622 pin configuration nodes act as a container for an arbitrary number of
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subnodes. Each of these subnodes represents some desired configuration for a
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pin, a group, or a list of pins or groups. This configuration can include the
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mux function to select on those pin(s)/group(s), and various pin configuration
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parameters, such as pull-up, slew rate, etc.
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We support 2 types of configuration nodes. Those nodes can be either pinmux
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nodes or pinconf nodes. Each configuration node can consist of multiple nodes
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describing the pinmux and pinconf options.
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The name of each subnode doesn't matter as long as it is unique; all subnodes
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should be enumerated and processed purely based on their content.
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== pinmux nodes content ==
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The following generic properties as defined in pinctrl-bindings.txt are valid
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to specify in a pinmux subnode:
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Required properties are:
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- groups: An array of strings. Each string contains the name of a group.
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Valid values for these names are listed below.
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- function: A string containing the name of the function to mux to the
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group. Valid values for function names are listed below.
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== pinconf nodes content ==
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The following generic properties as defined in pinctrl-bindings.txt are valid
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to specify in a pinconf subnode:
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Required properties are:
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- pins: An array of strings. Each string contains the name of a pin.
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Valid values for these names are listed below.
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- groups: An array of strings. Each string contains the name of a group.
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Valid values for these names are listed below.
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Optional properies are:
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bias-disable, bias-pull, bias-pull-down, input-enable,
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input-schmitt-enable, input-schmitt-disable, output-enable
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output-low, output-high, drive-strength, slew-rate
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Valid arguments for 'slew-rate' are '0' for no slew rate controlled and '1' for
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slower slew rate respectively.
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Valid arguments for 'drive-strength', 4, 8, 12, or 16 in mA.
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The following specific properties as defined are valid to specify in a pinconf
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subnode:
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Optional properties are:
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- mediatek,tdsel: An integer describing the steps for output level shifter duty
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cycle when asserted (high pulse width adjustment). Valid arguments are from 0
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to 15.
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- mediatek,rdsel: An integer describing the steps for input level shifter duty
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cycle when asserted (high pulse width adjustment). Valid arguments are from 0
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to 63.
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== Valid values for pins, function and groups on MT7622 ==
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Valid values for pins are:
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pins can be referenced via the pin names as the below table shown and the
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related physical number is also put ahead of those names which helps cross
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references to pins between groups to know whether pins assignment conflict
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happens among devices try to acquire those available pins.
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Pin #: Valid values for pins
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-----------------------------
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PIN 0: "GPIO_A"
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PIN 1: "I2S1_IN"
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PIN 2: "I2S1_OUT"
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PIN 3: "I2S_BCLK"
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PIN 4: "I2S_WS"
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PIN 5: "I2S_MCLK"
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PIN 6: "TXD0"
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PIN 7: "RXD0"
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PIN 8: "SPI_WP"
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PIN 9: "SPI_HOLD"
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PIN 10: "SPI_CLK"
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PIN 11: "SPI_MOSI"
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PIN 12: "SPI_MISO"
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PIN 13: "SPI_CS"
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PIN 14: "I2C_SDA"
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PIN 15: "I2C_SCL"
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PIN 16: "I2S2_IN"
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PIN 17: "I2S3_IN"
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PIN 18: "I2S4_IN"
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PIN 19: "I2S2_OUT"
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PIN 20: "I2S3_OUT"
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PIN 21: "I2S4_OUT"
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PIN 22: "GPIO_B"
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PIN 23: "MDC"
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PIN 24: "MDIO"
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PIN 25: "G2_TXD0"
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PIN 26: "G2_TXD1"
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PIN 27: "G2_TXD2"
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PIN 28: "G2_TXD3"
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PIN 29: "G2_TXEN"
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PIN 30: "G2_TXC"
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PIN 31: "G2_RXD0"
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PIN 32: "G2_RXD1"
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PIN 33: "G2_RXD2"
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PIN 34: "G2_RXD3"
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PIN 35: "G2_RXDV"
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PIN 36: "G2_RXC"
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PIN 37: "NCEB"
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PIN 38: "NWEB"
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PIN 39: "NREB"
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PIN 40: "NDL4"
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PIN 41: "NDL5"
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PIN 42: "NDL6"
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PIN 43: "NDL7"
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PIN 44: "NRB"
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PIN 45: "NCLE"
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PIN 46: "NALE"
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PIN 47: "NDL0"
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PIN 48: "NDL1"
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PIN 49: "NDL2"
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PIN 50: "NDL3"
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PIN 51: "MDI_TP_P0"
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PIN 52: "MDI_TN_P0"
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PIN 53: "MDI_RP_P0"
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PIN 54: "MDI_RN_P0"
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PIN 55: "MDI_TP_P1"
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PIN 56: "MDI_TN_P1"
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PIN 57: "MDI_RP_P1"
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PIN 58: "MDI_RN_P1"
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PIN 59: "MDI_RP_P2"
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PIN 60: "MDI_RN_P2"
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PIN 61: "MDI_TP_P2"
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PIN 62: "MDI_TN_P2"
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PIN 63: "MDI_TP_P3"
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PIN 64: "MDI_TN_P3"
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PIN 65: "MDI_RP_P3"
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PIN 66: "MDI_RN_P3"
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PIN 67: "MDI_RP_P4"
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PIN 68: "MDI_RN_P4"
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PIN 69: "MDI_TP_P4"
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PIN 70: "MDI_TN_P4"
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PIN 71: "PMIC_SCL"
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PIN 72: "PMIC_SDA"
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PIN 73: "SPIC1_CLK"
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PIN 74: "SPIC1_MOSI"
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PIN 75: "SPIC1_MISO"
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PIN 76: "SPIC1_CS"
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PIN 77: "GPIO_D"
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PIN 78: "WATCHDOG"
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PIN 79: "RTS3_N"
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PIN 80: "CTS3_N"
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PIN 81: "TXD3"
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PIN 82: "RXD3"
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PIN 83: "PERST0_N"
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PIN 84: "PERST1_N"
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PIN 85: "WLED_N"
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PIN 86: "EPHY_LED0_N"
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PIN 87: "AUXIN0"
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PIN 88: "AUXIN1"
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PIN 89: "AUXIN2"
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PIN 90: "AUXIN3"
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PIN 91: "TXD4"
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PIN 92: "RXD4"
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PIN 93: "RTS4_N"
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PIN 94: "CST4_N"
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PIN 95: "PWM1"
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PIN 96: "PWM2"
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PIN 97: "PWM3"
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PIN 98: "PWM4"
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PIN 99: "PWM5"
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PIN 100: "PWM6"
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PIN 101: "PWM7"
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PIN 102: "GPIO_E"
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Valid values for function are:
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"emmc", "eth", "i2c", "i2s", "ir", "led", "flash", "pcie",
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"pmic", "pwm", "sd", "spi", "tdm", "uart", "watchdog"
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Valid values for groups are:
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additional data is put followingly with valid value allowing us to know which
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applicable function and which relevant pins (in pin#) are able applied for that
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group.
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Valid value function pins (in pin#)
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-------------------------------------------------------------------------
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"emmc" "emmc" 40, 41, 42, 43, 44, 45,
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47, 48, 49, 50
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"emmc_rst" "emmc" 37
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"esw" "eth" 51, 52, 53, 54, 55, 56,
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57, 58, 59, 60, 61, 62,
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63, 64, 65, 66, 67, 68,
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69, 70
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"esw_p0_p1" "eth" 51, 52, 53, 54, 55, 56,
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57, 58
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"esw_p2_p3_p4" "eth" 59, 60, 61, 62, 63, 64,
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65, 66, 67, 68, 69, 70
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"rgmii_via_esw" "eth" 59, 60, 61, 62, 63, 64,
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65, 66, 67, 68, 69, 70
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"rgmii_via_gmac1" "eth" 59, 60, 61, 62, 63, 64,
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65, 66, 67, 68, 69, 70
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"rgmii_via_gmac2" "eth" 25, 26, 27, 28, 29, 30,
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31, 32, 33, 34, 35, 36
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"mdc_mdio" "eth" 23, 24
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"i2c0" "i2c" 14, 15
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"i2c1_0" "i2c" 55, 56
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"i2c1_1" "i2c" 73, 74
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"i2c1_2" "i2c" 87, 88
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"i2c2_0" "i2c" 57, 58
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"i2c2_1" "i2c" 75, 76
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"i2c2_2" "i2c" 89, 90
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"i2s_in_mclk_bclk_ws" "i2s" 3, 4, 5
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"i2s1_in_data" "i2s" 1
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"i2s2_in_data" "i2s" 16
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"i2s3_in_data" "i2s" 17
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"i2s4_in_data" "i2s" 18
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"i2s_out_mclk_bclk_ws" "i2s" 3, 4, 5
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"i2s1_out_data" "i2s" 2
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"i2s2_out_data" "i2s" 19
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"i2s3_out_data" "i2s" 20
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"i2s4_out_data" "i2s" 21
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"ir_0_tx" "ir" 16
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"ir_1_tx" "ir" 59
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"ir_2_tx" "ir" 99
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"ir_0_rx" "ir" 17
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"ir_1_rx" "ir" 60
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"ir_2_rx" "ir" 100
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"ephy_leds" "led" 86, 91, 92, 93, 94
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"ephy0_led" "led" 86
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"ephy1_led" "led" 91
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"ephy2_led" "led" 92
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"ephy3_led" "led" 93
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"ephy4_led" "led" 94
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"wled" "led" 85
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"par_nand" "flash" 37, 38, 39, 40, 41, 42,
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43, 44, 45, 46, 47, 48,
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49, 50
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"snfi" "flash" 8, 9, 10, 11, 12, 13
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"spi_nor" "flash" 8, 9, 10, 11, 12, 13
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"pcie0_0_waken" "pcie" 14
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"pcie0_1_waken" "pcie" 79
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"pcie1_0_waken" "pcie" 14
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"pcie0_0_clkreq" "pcie" 15
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"pcie0_1_clkreq" "pcie" 80
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"pcie1_0_clkreq" "pcie" 15
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"pcie0_pad_perst" "pcie" 83
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"pcie1_pad_perst" "pcie" 84
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"pmic_bus" "pmic" 71, 72
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"pwm_ch1_0" "pwm" 51
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"pwm_ch1_1" "pwm" 73
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"pwm_ch1_2" "pwm" 95
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"pwm_ch2_0" "pwm" 52
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"pwm_ch2_1" "pwm" 74
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"pwm_ch2_2" "pwm" 96
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"pwm_ch3_0" "pwm" 53
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"pwm_ch3_1" "pwm" 75
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"pwm_ch3_2" "pwm" 97
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"pwm_ch4_0" "pwm" 54
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"pwm_ch4_1" "pwm" 67
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"pwm_ch4_2" "pwm" 76
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"pwm_ch4_3" "pwm" 98
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"pwm_ch5_0" "pwm" 68
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"pwm_ch5_1" "pwm" 77
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"pwm_ch5_2" "pwm" 99
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"pwm_ch6_0" "pwm" 69
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"pwm_ch6_1" "pwm" 78
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"pwm_ch6_2" "pwm" 81
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"pwm_ch6_3" "pwm" 100
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"pwm_ch7_0" "pwm" 70
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"pwm_ch7_1" "pwm" 82
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"pwm_ch7_2" "pwm" 101
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"sd_0" "sd" 16, 17, 18, 19, 20, 21
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"sd_1" "sd" 25, 26, 27, 28, 29, 30
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"spic0_0" "spi" 63, 64, 65, 66
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"spic0_1" "spi" 79, 80, 81, 82
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"spic1_0" "spi" 67, 68, 69, 70
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"spic1_1" "spi" 73, 74, 75, 76
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"spic2_0_wp_hold" "spi" 8, 9
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"spic2_0" "spi" 10, 11, 12, 13
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"tdm_0_out_mclk_bclk_ws" "tdm" 8, 9, 10
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"tdm_0_in_mclk_bclk_ws" "tdm" 11, 12, 13
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"tdm_0_out_data" "tdm" 20
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"tdm_0_in_data" "tdm" 21
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"tdm_1_out_mclk_bclk_ws" "tdm" 57, 58, 59
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"tdm_1_in_mclk_bclk_ws" "tdm" 60, 61, 62
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"tdm_1_out_data" "tdm" 55
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"tdm_1_in_data" "tdm" 56
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"uart0_0_tx_rx" "uart" 6, 7
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"uart1_0_tx_rx" "uart" 55, 56
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"uart1_0_rts_cts" "uart" 57, 58
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"uart1_1_tx_rx" "uart" 73, 74
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"uart1_1_rts_cts" "uart" 75, 76
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"uart2_0_tx_rx" "uart" 3, 4
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"uart2_0_rts_cts" "uart" 1, 2
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"uart2_1_tx_rx" "uart" 51, 52
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"uart2_1_rts_cts" "uart" 53, 54
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"uart2_2_tx_rx" "uart" 59, 60
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"uart2_2_rts_cts" "uart" 61, 62
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"uart2_3_tx_rx" "uart" 95, 96
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"uart3_0_tx_rx" "uart" 57, 58
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"uart3_1_tx_rx" "uart" 81, 82
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"uart3_1_rts_cts" "uart" 79, 80
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"uart4_0_tx_rx" "uart" 61, 62
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"uart4_1_tx_rx" "uart" 91, 92
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"uart4_1_rts_cts" "uart" 93, 94
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"uart4_2_tx_rx" "uart" 97, 98
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"uart4_2_rts_cts" "uart" 95, 96
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"watchdog" "watchdog" 78
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== Valid values for pins, function and groups on MT7629 ==
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Pin #: Valid values for pins
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-----------------------------
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PIN 0: "TOP_5G_CLK"
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PIN 1: "TOP_5G_DATA"
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PIN 2: "WF0_5G_HB0"
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PIN 3: "WF0_5G_HB1"
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PIN 4: "WF0_5G_HB2"
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PIN 5: "WF0_5G_HB3"
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PIN 6: "WF0_5G_HB4"
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PIN 7: "WF0_5G_HB5"
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PIN 8: "WF0_5G_HB6"
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PIN 9: "XO_REQ"
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PIN 10: "TOP_RST_N"
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PIN 11: "SYS_WATCHDOG"
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PIN 12: "EPHY_LED0_N_JTDO"
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PIN 13: "EPHY_LED1_N_JTDI"
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PIN 14: "EPHY_LED2_N_JTMS"
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PIN 15: "EPHY_LED3_N_JTCLK"
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PIN 16: "EPHY_LED4_N_JTRST_N"
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PIN 17: "WF2G_LED_N"
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PIN 18: "WF5G_LED_N"
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PIN 19: "I2C_SDA"
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PIN 20: "I2C_SCL"
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PIN 21: "GPIO_9"
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PIN 22: "GPIO_10"
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PIN 23: "GPIO_11"
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PIN 24: "GPIO_12"
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PIN 25: "UART1_TXD"
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PIN 26: "UART1_RXD"
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PIN 27: "UART1_CTS"
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PIN 28: "UART1_RTS"
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PIN 29: "UART2_TXD"
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PIN 30: "UART2_RXD"
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PIN 31: "UART2_CTS"
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PIN 32: "UART2_RTS"
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PIN 33: "MDI_TP_P1"
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PIN 34: "MDI_TN_P1"
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PIN 35: "MDI_RP_P1"
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PIN 36: "MDI_RN_P1"
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PIN 37: "MDI_RP_P2"
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PIN 38: "MDI_RN_P2"
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PIN 39: "MDI_TP_P2"
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PIN 40: "MDI_TN_P2"
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PIN 41: "MDI_TP_P3"
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PIN 42: "MDI_TN_P3"
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PIN 43: "MDI_RP_P3"
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PIN 44: "MDI_RN_P3"
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PIN 45: "MDI_RP_P4"
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PIN 46: "MDI_RN_P4"
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PIN 47: "MDI_TP_P4"
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PIN 48: "MDI_TN_P4"
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PIN 49: "SMI_MDC"
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PIN 50: "SMI_MDIO"
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PIN 51: "PCIE_PERESET_N"
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PIN 52: "PWM_0"
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PIN 53: "GPIO_0"
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PIN 54: "GPIO_1"
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PIN 55: "GPIO_2"
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PIN 56: "GPIO_3"
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PIN 57: "GPIO_4"
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PIN 58: "GPIO_5"
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PIN 59: "GPIO_6"
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PIN 60: "GPIO_7"
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PIN 61: "GPIO_8"
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PIN 62: "SPI_CLK"
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PIN 63: "SPI_CS"
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PIN 64: "SPI_MOSI"
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PIN 65: "SPI_MISO"
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PIN 66: "SPI_WP"
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PIN 67: "SPI_HOLD"
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PIN 68: "UART0_TXD"
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PIN 69: "UART0_RXD"
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PIN 70: "TOP_2G_CLK"
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PIN 71: "TOP_2G_DATA"
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PIN 72: "WF0_2G_HB0"
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PIN 73: "WF0_2G_HB1"
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PIN 74: "WF0_2G_HB2"
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PIN 75: "WF0_2G_HB3"
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PIN 76: "WF0_2G_HB4"
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PIN 77: "WF0_2G_HB5"
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PIN 78: "WF0_2G_HB6"
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Valid values for function are:
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"eth", "i2c", "led", "flash", "pcie", "pwm", "spi", "uart",
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"watchdog", "wifi"
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Valid values for groups are:
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Valid value function pins (in pin#)
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----------------------------------------------------------------
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"mdc_mdio" "eth" 23, 24
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"i2c_0" "i2c" 19, 20
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"i2c_1" "i2c" 53, 54
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"ephy_leds" "led" 12, 13, 14, 15, 16,
|
|
17, 18
|
|
"ephy0_led" "led" 12
|
|
"ephy1_led" "led" 13
|
|
"ephy2_led" "led" 14
|
|
"ephy3_led" "led" 15
|
|
"ephy4_led" "led" 16
|
|
"wf2g_led" "led" 17
|
|
"wf5g_led" "led" 18
|
|
"snfi" "flash" 62, 63, 64, 65, 66, 67
|
|
"spi_nor" "flash" 62, 63, 64, 65, 66, 67
|
|
"pcie_pereset" "pcie" 51
|
|
"pcie_wake" "pcie" 55
|
|
"pcie_clkreq" "pcie" 56
|
|
"pwm_0" "pwm" 52
|
|
"pwm_1" "pwm" 61
|
|
"spi_0" "spi" 21, 22, 23, 24
|
|
"spi_1" "spi" 62, 63, 64, 65
|
|
"spi_wp" "spi" 66
|
|
"spi_hold" "spi" 67
|
|
"uart0_txd_rxd" "uart" 68, 69
|
|
"uart1_0_txd_rxd" "uart" 25, 26
|
|
"uart1_0_cts_rts" "uart" 27, 28
|
|
"uart1_1_txd_rxd" "uart" 53, 54
|
|
"uart1_1_cts_rts" "uart" 55, 56
|
|
"uart2_0_txd_rxd" "uart" 29, 30
|
|
"uart2_0_cts_rts" "uart" 31, 32
|
|
"uart2_1_txd_rxd" "uart" 57, 58
|
|
"uart2_1_cts_rts" "uart" 59, 60
|
|
"watchdog" "watchdog" 11
|
|
"wf0_2g" "wifi" 70, 71, 72, 73, 74,
|
|
75, 76, 77, 78
|
|
"wf0_5g" "wifi" 0, 1, 2, 3, 4, 5, 6,
|
|
7, 8, 9, 10
|
|
|
|
Example:
|
|
|
|
pio: pinctrl@10211000 {
|
|
compatible = "mediatek,mt7622-pinctrl";
|
|
reg = <0 0x10211000 0 0x1000>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
pinctrl_eth_default: eth-default {
|
|
mux-mdio {
|
|
groups = "mdc_mdio";
|
|
function = "eth";
|
|
drive-strength = <12>;
|
|
};
|
|
|
|
mux-gmac2 {
|
|
groups = "gmac2";
|
|
function = "eth";
|
|
drive-strength = <12>;
|
|
};
|
|
|
|
mux-esw {
|
|
groups = "esw";
|
|
function = "eth";
|
|
drive-strength = <8>;
|
|
};
|
|
|
|
conf-mdio {
|
|
pins = "MDC";
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|