mirror of https://gitee.com/openkylin/linux.git
198 lines
5.5 KiB
C
198 lines
5.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Early serial console for 8250/16550 devices
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*
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* (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
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* Bjorn Helgaas <bjorn.helgaas@hp.com>
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*
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* Based on the 8250.c serial driver, Copyright (C) 2001 Russell King,
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* and on early_printk.c by Andi Kleen.
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*
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* This is for use before the serial driver has initialized, in
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* particular, before the UARTs have been discovered and named.
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* Instead of specifying the console device as, e.g., "ttyS0",
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* we locate the device directly by its MMIO or I/O port address.
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*
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* The user can specify the device directly, e.g.,
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* earlycon=uart8250,io,0x3f8,9600n8
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* earlycon=uart8250,mmio,0xff5e0000,115200n8
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* earlycon=uart8250,mmio32,0xff5e0000,115200n8
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* or
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* console=uart8250,io,0x3f8,9600n8
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* console=uart8250,mmio,0xff5e0000,115200n8
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* console=uart8250,mmio32,0xff5e0000,115200n8
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*/
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#include <linux/tty.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/serial_reg.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <asm/io.h>
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#include <asm/serial.h>
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static unsigned int serial8250_early_in(struct uart_port *port, int offset)
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{
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int reg_offset = offset;
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offset <<= port->regshift;
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switch (port->iotype) {
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case UPIO_MEM:
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return readb(port->membase + offset);
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case UPIO_MEM16:
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return readw(port->membase + offset);
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case UPIO_MEM32:
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return readl(port->membase + offset);
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case UPIO_MEM32BE:
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return ioread32be(port->membase + offset);
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case UPIO_PORT:
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return inb(port->iobase + offset);
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case UPIO_AU:
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return port->serial_in(port, reg_offset);
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default:
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return 0;
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}
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}
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static void serial8250_early_out(struct uart_port *port, int offset, int value)
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{
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int reg_offset = offset;
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offset <<= port->regshift;
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switch (port->iotype) {
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case UPIO_MEM:
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writeb(value, port->membase + offset);
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break;
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case UPIO_MEM16:
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writew(value, port->membase + offset);
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break;
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case UPIO_MEM32:
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writel(value, port->membase + offset);
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break;
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case UPIO_MEM32BE:
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iowrite32be(value, port->membase + offset);
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break;
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case UPIO_PORT:
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outb(value, port->iobase + offset);
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break;
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case UPIO_AU:
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port->serial_out(port, reg_offset, value);
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break;
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}
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}
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#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
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static void serial_putc(struct uart_port *port, int c)
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{
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unsigned int status;
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serial8250_early_out(port, UART_TX, c);
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for (;;) {
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status = serial8250_early_in(port, UART_LSR);
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if ((status & BOTH_EMPTY) == BOTH_EMPTY)
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break;
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cpu_relax();
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}
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}
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static void early_serial8250_write(struct console *console,
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const char *s, unsigned int count)
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{
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struct earlycon_device *device = console->data;
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struct uart_port *port = &device->port;
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uart_console_write(port, s, count, serial_putc);
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}
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static void __init init_port(struct earlycon_device *device)
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{
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struct uart_port *port = &device->port;
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unsigned int divisor;
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unsigned char c;
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unsigned int ier;
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serial8250_early_out(port, UART_LCR, 0x3); /* 8n1 */
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ier = serial8250_early_in(port, UART_IER);
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serial8250_early_out(port, UART_IER, ier & UART_IER_UUE); /* no interrupt */
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serial8250_early_out(port, UART_FCR, 0); /* no fifo */
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serial8250_early_out(port, UART_MCR, 0x3); /* DTR + RTS */
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if (port->uartclk && device->baud) {
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divisor = DIV_ROUND_CLOSEST(port->uartclk, 16 * device->baud);
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c = serial8250_early_in(port, UART_LCR);
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serial8250_early_out(port, UART_LCR, c | UART_LCR_DLAB);
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serial8250_early_out(port, UART_DLL, divisor & 0xff);
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serial8250_early_out(port, UART_DLM, (divisor >> 8) & 0xff);
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serial8250_early_out(port, UART_LCR, c & ~UART_LCR_DLAB);
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}
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}
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int __init early_serial8250_setup(struct earlycon_device *device,
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const char *options)
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{
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if (!(device->port.membase || device->port.iobase))
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return -ENODEV;
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if (!device->baud) {
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struct uart_port *port = &device->port;
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unsigned int ier;
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/* assume the device was initialized, only mask interrupts */
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ier = serial8250_early_in(port, UART_IER);
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serial8250_early_out(port, UART_IER, ier & UART_IER_UUE);
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} else
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init_port(device);
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device->con->write = early_serial8250_write;
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return 0;
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}
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EARLYCON_DECLARE(uart8250, early_serial8250_setup);
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EARLYCON_DECLARE(uart, early_serial8250_setup);
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OF_EARLYCON_DECLARE(ns16550, "ns16550", early_serial8250_setup);
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OF_EARLYCON_DECLARE(ns16550a, "ns16550a", early_serial8250_setup);
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OF_EARLYCON_DECLARE(uart, "nvidia,tegra20-uart", early_serial8250_setup);
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OF_EARLYCON_DECLARE(uart, "snps,dw-apb-uart", early_serial8250_setup);
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#ifdef CONFIG_SERIAL_8250_OMAP
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static int __init early_omap8250_setup(struct earlycon_device *device,
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const char *options)
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{
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struct uart_port *port = &device->port;
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if (!(device->port.membase || device->port.iobase))
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return -ENODEV;
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port->regshift = 2;
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device->con->write = early_serial8250_write;
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return 0;
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}
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OF_EARLYCON_DECLARE(omap8250, "ti,omap2-uart", early_omap8250_setup);
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OF_EARLYCON_DECLARE(omap8250, "ti,omap3-uart", early_omap8250_setup);
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OF_EARLYCON_DECLARE(omap8250, "ti,omap4-uart", early_omap8250_setup);
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#endif
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#ifdef CONFIG_SERIAL_8250_RT288X
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unsigned int au_serial_in(struct uart_port *p, int offset);
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void au_serial_out(struct uart_port *p, int offset, int value);
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static int __init early_au_setup(struct earlycon_device *dev, const char *opt)
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{
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dev->port.serial_in = au_serial_in;
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dev->port.serial_out = au_serial_out;
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dev->port.iotype = UPIO_AU;
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dev->con->write = early_serial8250_write;
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return 0;
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}
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OF_EARLYCON_DECLARE(palmchip, "ralink,rt2880-uart", early_au_setup);
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#endif
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