mirror of https://gitee.com/openkylin/linux.git
942 lines
24 KiB
C
942 lines
24 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* A devfreq driver for NVIDIA Tegra SoCs
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*
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* Copyright (c) 2014 NVIDIA CORPORATION. All rights reserved.
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* Copyright (C) 2014 Google, Inc
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*/
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#include <linux/clk.h>
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#include <linux/cpufreq.h>
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#include <linux/devfreq.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/pm_opp.h>
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#include <linux/reset.h>
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#include <linux/workqueue.h>
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#include "governor.h"
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#define ACTMON_GLB_STATUS 0x0
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#define ACTMON_GLB_PERIOD_CTRL 0x4
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#define ACTMON_DEV_CTRL 0x0
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#define ACTMON_DEV_CTRL_K_VAL_SHIFT 10
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#define ACTMON_DEV_CTRL_ENB_PERIODIC BIT(18)
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#define ACTMON_DEV_CTRL_AVG_BELOW_WMARK_EN BIT(20)
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#define ACTMON_DEV_CTRL_AVG_ABOVE_WMARK_EN BIT(21)
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#define ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_NUM_SHIFT 23
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#define ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_NUM_SHIFT 26
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#define ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_EN BIT(29)
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#define ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_EN BIT(30)
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#define ACTMON_DEV_CTRL_ENB BIT(31)
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#define ACTMON_DEV_CTRL_STOP 0x00000000
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#define ACTMON_DEV_UPPER_WMARK 0x4
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#define ACTMON_DEV_LOWER_WMARK 0x8
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#define ACTMON_DEV_INIT_AVG 0xc
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#define ACTMON_DEV_AVG_UPPER_WMARK 0x10
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#define ACTMON_DEV_AVG_LOWER_WMARK 0x14
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#define ACTMON_DEV_COUNT_WEIGHT 0x18
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#define ACTMON_DEV_AVG_COUNT 0x20
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#define ACTMON_DEV_INTR_STATUS 0x24
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#define ACTMON_INTR_STATUS_CLEAR 0xffffffff
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#define ACTMON_DEV_INTR_CONSECUTIVE_UPPER BIT(31)
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#define ACTMON_DEV_INTR_CONSECUTIVE_LOWER BIT(30)
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#define ACTMON_ABOVE_WMARK_WINDOW 1
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#define ACTMON_BELOW_WMARK_WINDOW 3
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#define ACTMON_BOOST_FREQ_STEP 16000
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/*
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* Activity counter is incremented every 256 memory transactions, and each
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* transaction takes 4 EMC clocks for Tegra124; So the COUNT_WEIGHT is
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* 4 * 256 = 1024.
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*/
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#define ACTMON_COUNT_WEIGHT 0x400
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/*
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* ACTMON_AVERAGE_WINDOW_LOG2: default value for @DEV_CTRL_K_VAL, which
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* translates to 2 ^ (K_VAL + 1). ex: 2 ^ (6 + 1) = 128
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*/
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#define ACTMON_AVERAGE_WINDOW_LOG2 6
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#define ACTMON_SAMPLING_PERIOD 12 /* ms */
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#define ACTMON_DEFAULT_AVG_BAND 6 /* 1/10 of % */
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#define KHZ 1000
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#define KHZ_MAX (ULONG_MAX / KHZ)
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/* Assume that the bus is saturated if the utilization is 25% */
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#define BUS_SATURATION_RATIO 25
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/**
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* struct tegra_devfreq_device_config - configuration specific to an ACTMON
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* device
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*
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* Coefficients and thresholds are percentages unless otherwise noted
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*/
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struct tegra_devfreq_device_config {
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u32 offset;
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u32 irq_mask;
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/* Factors applied to boost_freq every consecutive watermark breach */
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unsigned int boost_up_coeff;
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unsigned int boost_down_coeff;
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/* Define the watermark bounds when applied to the current avg */
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unsigned int boost_up_threshold;
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unsigned int boost_down_threshold;
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/*
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* Threshold of activity (cycles translated to kHz) below which the
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* CPU frequency isn't to be taken into account. This is to avoid
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* increasing the EMC frequency when the CPU is very busy but not
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* accessing the bus often.
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*/
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u32 avg_dependency_threshold;
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};
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enum tegra_actmon_device {
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MCALL = 0,
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MCCPU,
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};
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static const struct tegra_devfreq_device_config actmon_device_configs[] = {
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{
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/* MCALL: All memory accesses (including from the CPUs) */
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.offset = 0x1c0,
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.irq_mask = 1 << 26,
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.boost_up_coeff = 200,
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.boost_down_coeff = 50,
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.boost_up_threshold = 60,
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.boost_down_threshold = 40,
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},
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{
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/* MCCPU: memory accesses from the CPUs */
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.offset = 0x200,
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.irq_mask = 1 << 25,
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.boost_up_coeff = 800,
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.boost_down_coeff = 40,
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.boost_up_threshold = 27,
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.boost_down_threshold = 10,
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.avg_dependency_threshold = 16000, /* 16MHz in kHz units */
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},
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};
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/**
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* struct tegra_devfreq_device - state specific to an ACTMON device
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*
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* Frequencies are in kHz.
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*/
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struct tegra_devfreq_device {
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const struct tegra_devfreq_device_config *config;
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void __iomem *regs;
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/* Average event count sampled in the last interrupt */
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u32 avg_count;
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/*
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* Extra frequency to increase the target by due to consecutive
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* watermark breaches.
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*/
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unsigned long boost_freq;
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/* Optimal frequency calculated from the stats for this device */
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unsigned long target_freq;
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};
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struct tegra_devfreq {
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struct devfreq *devfreq;
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struct reset_control *reset;
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struct clk *clock;
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void __iomem *regs;
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struct clk *emc_clock;
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unsigned long max_freq;
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unsigned long cur_freq;
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struct notifier_block clk_rate_change_nb;
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struct delayed_work cpufreq_update_work;
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struct notifier_block cpu_rate_change_nb;
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struct tegra_devfreq_device devices[ARRAY_SIZE(actmon_device_configs)];
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unsigned int irq;
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bool started;
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};
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struct tegra_actmon_emc_ratio {
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unsigned long cpu_freq;
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unsigned long emc_freq;
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};
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static const struct tegra_actmon_emc_ratio actmon_emc_ratios[] = {
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{ 1400000, KHZ_MAX },
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{ 1200000, 750000 },
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{ 1100000, 600000 },
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{ 1000000, 500000 },
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{ 800000, 375000 },
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{ 500000, 200000 },
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{ 250000, 100000 },
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};
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static u32 actmon_readl(struct tegra_devfreq *tegra, u32 offset)
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{
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return readl_relaxed(tegra->regs + offset);
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}
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static void actmon_writel(struct tegra_devfreq *tegra, u32 val, u32 offset)
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{
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writel_relaxed(val, tegra->regs + offset);
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}
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static u32 device_readl(struct tegra_devfreq_device *dev, u32 offset)
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{
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return readl_relaxed(dev->regs + offset);
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}
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static void device_writel(struct tegra_devfreq_device *dev, u32 val,
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u32 offset)
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{
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writel_relaxed(val, dev->regs + offset);
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}
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static unsigned long do_percent(unsigned long long val, unsigned int pct)
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{
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val = val * pct;
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do_div(val, 100);
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/*
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* High freq + high boosting percent + large polling interval are
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* resulting in integer overflow when watermarks are calculated.
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*/
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return min_t(u64, val, U32_MAX);
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}
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static void tegra_devfreq_update_avg_wmark(struct tegra_devfreq *tegra,
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struct tegra_devfreq_device *dev)
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{
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u32 avg_band_freq = tegra->max_freq * ACTMON_DEFAULT_AVG_BAND / KHZ;
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u32 band = avg_band_freq * tegra->devfreq->profile->polling_ms;
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u32 avg;
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avg = min(dev->avg_count, U32_MAX - band);
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device_writel(dev, avg + band, ACTMON_DEV_AVG_UPPER_WMARK);
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avg = max(dev->avg_count, band);
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device_writel(dev, avg - band, ACTMON_DEV_AVG_LOWER_WMARK);
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}
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static void tegra_devfreq_update_wmark(struct tegra_devfreq *tegra,
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struct tegra_devfreq_device *dev)
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{
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u32 val = tegra->cur_freq * tegra->devfreq->profile->polling_ms;
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device_writel(dev, do_percent(val, dev->config->boost_up_threshold),
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ACTMON_DEV_UPPER_WMARK);
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device_writel(dev, do_percent(val, dev->config->boost_down_threshold),
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ACTMON_DEV_LOWER_WMARK);
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}
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static void actmon_isr_device(struct tegra_devfreq *tegra,
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struct tegra_devfreq_device *dev)
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{
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u32 intr_status, dev_ctrl;
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dev->avg_count = device_readl(dev, ACTMON_DEV_AVG_COUNT);
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tegra_devfreq_update_avg_wmark(tegra, dev);
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intr_status = device_readl(dev, ACTMON_DEV_INTR_STATUS);
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dev_ctrl = device_readl(dev, ACTMON_DEV_CTRL);
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if (intr_status & ACTMON_DEV_INTR_CONSECUTIVE_UPPER) {
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/*
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* new_boost = min(old_boost * up_coef + step, max_freq)
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*/
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dev->boost_freq = do_percent(dev->boost_freq,
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dev->config->boost_up_coeff);
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dev->boost_freq += ACTMON_BOOST_FREQ_STEP;
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dev_ctrl |= ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_EN;
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if (dev->boost_freq >= tegra->max_freq) {
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dev_ctrl &= ~ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_EN;
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dev->boost_freq = tegra->max_freq;
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}
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} else if (intr_status & ACTMON_DEV_INTR_CONSECUTIVE_LOWER) {
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/*
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* new_boost = old_boost * down_coef
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* or 0 if (old_boost * down_coef < step / 2)
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*/
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dev->boost_freq = do_percent(dev->boost_freq,
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dev->config->boost_down_coeff);
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dev_ctrl |= ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_EN;
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if (dev->boost_freq < (ACTMON_BOOST_FREQ_STEP >> 1)) {
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dev_ctrl &= ~ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_EN;
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dev->boost_freq = 0;
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}
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}
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device_writel(dev, dev_ctrl, ACTMON_DEV_CTRL);
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device_writel(dev, ACTMON_INTR_STATUS_CLEAR, ACTMON_DEV_INTR_STATUS);
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}
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static unsigned long actmon_cpu_to_emc_rate(struct tegra_devfreq *tegra,
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unsigned long cpu_freq)
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{
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unsigned int i;
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const struct tegra_actmon_emc_ratio *ratio = actmon_emc_ratios;
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for (i = 0; i < ARRAY_SIZE(actmon_emc_ratios); i++, ratio++) {
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if (cpu_freq >= ratio->cpu_freq) {
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if (ratio->emc_freq >= tegra->max_freq)
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return tegra->max_freq;
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else
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return ratio->emc_freq;
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}
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}
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return 0;
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}
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static unsigned long actmon_device_target_freq(struct tegra_devfreq *tegra,
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struct tegra_devfreq_device *dev)
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{
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unsigned int avg_sustain_coef;
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unsigned long target_freq;
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target_freq = dev->avg_count / tegra->devfreq->profile->polling_ms;
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avg_sustain_coef = 100 * 100 / dev->config->boost_up_threshold;
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target_freq = do_percent(target_freq, avg_sustain_coef);
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return target_freq;
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}
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static void actmon_update_target(struct tegra_devfreq *tegra,
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struct tegra_devfreq_device *dev)
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{
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unsigned long cpu_freq = 0;
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unsigned long static_cpu_emc_freq = 0;
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dev->target_freq = actmon_device_target_freq(tegra, dev);
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if (dev->config->avg_dependency_threshold &&
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dev->config->avg_dependency_threshold <= dev->target_freq) {
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cpu_freq = cpufreq_quick_get(0);
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static_cpu_emc_freq = actmon_cpu_to_emc_rate(tegra, cpu_freq);
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dev->target_freq += dev->boost_freq;
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dev->target_freq = max(dev->target_freq, static_cpu_emc_freq);
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} else {
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dev->target_freq += dev->boost_freq;
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}
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}
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static irqreturn_t actmon_thread_isr(int irq, void *data)
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{
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struct tegra_devfreq *tegra = data;
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bool handled = false;
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unsigned int i;
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u32 val;
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mutex_lock(&tegra->devfreq->lock);
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val = actmon_readl(tegra, ACTMON_GLB_STATUS);
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for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) {
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if (val & tegra->devices[i].config->irq_mask) {
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actmon_isr_device(tegra, tegra->devices + i);
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handled = true;
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}
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}
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if (handled)
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update_devfreq(tegra->devfreq);
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mutex_unlock(&tegra->devfreq->lock);
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return handled ? IRQ_HANDLED : IRQ_NONE;
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}
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static int tegra_actmon_clk_notify_cb(struct notifier_block *nb,
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unsigned long action, void *ptr)
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{
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struct clk_notifier_data *data = ptr;
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struct tegra_devfreq *tegra;
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struct tegra_devfreq_device *dev;
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unsigned int i;
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if (action != POST_RATE_CHANGE)
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return NOTIFY_OK;
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tegra = container_of(nb, struct tegra_devfreq, clk_rate_change_nb);
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tegra->cur_freq = data->new_rate / KHZ;
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for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) {
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dev = &tegra->devices[i];
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tegra_devfreq_update_wmark(tegra, dev);
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}
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return NOTIFY_OK;
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}
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static void tegra_actmon_delayed_update(struct work_struct *work)
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{
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struct tegra_devfreq *tegra = container_of(work, struct tegra_devfreq,
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cpufreq_update_work.work);
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mutex_lock(&tegra->devfreq->lock);
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update_devfreq(tegra->devfreq);
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mutex_unlock(&tegra->devfreq->lock);
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}
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static unsigned long
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tegra_actmon_cpufreq_contribution(struct tegra_devfreq *tegra,
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unsigned int cpu_freq)
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{
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struct tegra_devfreq_device *actmon_dev = &tegra->devices[MCCPU];
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unsigned long static_cpu_emc_freq, dev_freq;
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dev_freq = actmon_device_target_freq(tegra, actmon_dev);
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/* check whether CPU's freq is taken into account at all */
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if (dev_freq < actmon_dev->config->avg_dependency_threshold)
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return 0;
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static_cpu_emc_freq = actmon_cpu_to_emc_rate(tegra, cpu_freq);
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if (dev_freq >= static_cpu_emc_freq)
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return 0;
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return static_cpu_emc_freq;
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}
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static int tegra_actmon_cpu_notify_cb(struct notifier_block *nb,
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unsigned long action, void *ptr)
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{
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struct cpufreq_freqs *freqs = ptr;
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struct tegra_devfreq *tegra;
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unsigned long old, new, delay;
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if (action != CPUFREQ_POSTCHANGE)
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return NOTIFY_OK;
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tegra = container_of(nb, struct tegra_devfreq, cpu_rate_change_nb);
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/*
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* Quickly check whether CPU frequency should be taken into account
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* at all, without blocking CPUFreq's core.
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*/
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if (mutex_trylock(&tegra->devfreq->lock)) {
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old = tegra_actmon_cpufreq_contribution(tegra, freqs->old);
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new = tegra_actmon_cpufreq_contribution(tegra, freqs->new);
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mutex_unlock(&tegra->devfreq->lock);
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/*
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* If CPU's frequency shouldn't be taken into account at
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* the moment, then there is no need to update the devfreq's
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* state because ISR will re-check CPU's frequency on the
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* next interrupt.
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*/
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if (old == new)
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return NOTIFY_OK;
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}
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/*
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* CPUFreq driver should support CPUFREQ_ASYNC_NOTIFICATION in order
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* to allow asynchronous notifications. This means we can't block
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* here for too long, otherwise CPUFreq's core will complain with a
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* warning splat.
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*/
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delay = msecs_to_jiffies(ACTMON_SAMPLING_PERIOD);
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schedule_delayed_work(&tegra->cpufreq_update_work, delay);
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return NOTIFY_OK;
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}
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static void tegra_actmon_configure_device(struct tegra_devfreq *tegra,
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struct tegra_devfreq_device *dev)
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{
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u32 val = 0;
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/* reset boosting on governor's restart */
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dev->boost_freq = 0;
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dev->target_freq = tegra->cur_freq;
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dev->avg_count = tegra->cur_freq * tegra->devfreq->profile->polling_ms;
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device_writel(dev, dev->avg_count, ACTMON_DEV_INIT_AVG);
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tegra_devfreq_update_avg_wmark(tegra, dev);
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tegra_devfreq_update_wmark(tegra, dev);
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device_writel(dev, ACTMON_COUNT_WEIGHT, ACTMON_DEV_COUNT_WEIGHT);
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device_writel(dev, ACTMON_INTR_STATUS_CLEAR, ACTMON_DEV_INTR_STATUS);
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val |= ACTMON_DEV_CTRL_ENB_PERIODIC;
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val |= (ACTMON_AVERAGE_WINDOW_LOG2 - 1)
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<< ACTMON_DEV_CTRL_K_VAL_SHIFT;
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val |= (ACTMON_BELOW_WMARK_WINDOW - 1)
|
|
<< ACTMON_DEV_CTRL_CONSECUTIVE_BELOW_WMARK_NUM_SHIFT;
|
|
val |= (ACTMON_ABOVE_WMARK_WINDOW - 1)
|
|
<< ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_NUM_SHIFT;
|
|
val |= ACTMON_DEV_CTRL_AVG_ABOVE_WMARK_EN;
|
|
val |= ACTMON_DEV_CTRL_AVG_BELOW_WMARK_EN;
|
|
val |= ACTMON_DEV_CTRL_CONSECUTIVE_ABOVE_WMARK_EN;
|
|
val |= ACTMON_DEV_CTRL_ENB;
|
|
|
|
device_writel(dev, val, ACTMON_DEV_CTRL);
|
|
}
|
|
|
|
static void tegra_actmon_stop_devices(struct tegra_devfreq *tegra)
|
|
{
|
|
struct tegra_devfreq_device *dev = tegra->devices;
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(tegra->devices); i++, dev++) {
|
|
device_writel(dev, ACTMON_DEV_CTRL_STOP, ACTMON_DEV_CTRL);
|
|
device_writel(dev, ACTMON_INTR_STATUS_CLEAR,
|
|
ACTMON_DEV_INTR_STATUS);
|
|
}
|
|
}
|
|
|
|
static int tegra_actmon_resume(struct tegra_devfreq *tegra)
|
|
{
|
|
unsigned int i;
|
|
int err;
|
|
|
|
if (!tegra->devfreq->profile->polling_ms || !tegra->started)
|
|
return 0;
|
|
|
|
actmon_writel(tegra, tegra->devfreq->profile->polling_ms - 1,
|
|
ACTMON_GLB_PERIOD_CTRL);
|
|
|
|
/*
|
|
* CLK notifications are needed in order to reconfigure the upper
|
|
* consecutive watermark in accordance to the actual clock rate
|
|
* to avoid unnecessary upper interrupts.
|
|
*/
|
|
err = clk_notifier_register(tegra->emc_clock,
|
|
&tegra->clk_rate_change_nb);
|
|
if (err) {
|
|
dev_err(tegra->devfreq->dev.parent,
|
|
"Failed to register rate change notifier\n");
|
|
return err;
|
|
}
|
|
|
|
tegra->cur_freq = clk_get_rate(tegra->emc_clock) / KHZ;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(tegra->devices); i++)
|
|
tegra_actmon_configure_device(tegra, &tegra->devices[i]);
|
|
|
|
/*
|
|
* We are estimating CPU's memory bandwidth requirement based on
|
|
* amount of memory accesses and system's load, judging by CPU's
|
|
* frequency. We also don't want to receive events about CPU's
|
|
* frequency transaction when governor is stopped, hence notifier
|
|
* is registered dynamically.
|
|
*/
|
|
err = cpufreq_register_notifier(&tegra->cpu_rate_change_nb,
|
|
CPUFREQ_TRANSITION_NOTIFIER);
|
|
if (err) {
|
|
dev_err(tegra->devfreq->dev.parent,
|
|
"Failed to register rate change notifier: %d\n", err);
|
|
goto err_stop;
|
|
}
|
|
|
|
enable_irq(tegra->irq);
|
|
|
|
return 0;
|
|
|
|
err_stop:
|
|
tegra_actmon_stop_devices(tegra);
|
|
|
|
clk_notifier_unregister(tegra->emc_clock, &tegra->clk_rate_change_nb);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int tegra_actmon_start(struct tegra_devfreq *tegra)
|
|
{
|
|
int ret = 0;
|
|
|
|
if (!tegra->started) {
|
|
tegra->started = true;
|
|
|
|
ret = tegra_actmon_resume(tegra);
|
|
if (ret)
|
|
tegra->started = false;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void tegra_actmon_pause(struct tegra_devfreq *tegra)
|
|
{
|
|
if (!tegra->devfreq->profile->polling_ms || !tegra->started)
|
|
return;
|
|
|
|
disable_irq(tegra->irq);
|
|
|
|
cpufreq_unregister_notifier(&tegra->cpu_rate_change_nb,
|
|
CPUFREQ_TRANSITION_NOTIFIER);
|
|
|
|
cancel_delayed_work_sync(&tegra->cpufreq_update_work);
|
|
|
|
tegra_actmon_stop_devices(tegra);
|
|
|
|
clk_notifier_unregister(tegra->emc_clock, &tegra->clk_rate_change_nb);
|
|
}
|
|
|
|
static void tegra_actmon_stop(struct tegra_devfreq *tegra)
|
|
{
|
|
tegra_actmon_pause(tegra);
|
|
tegra->started = false;
|
|
}
|
|
|
|
static int tegra_devfreq_target(struct device *dev, unsigned long *freq,
|
|
u32 flags)
|
|
{
|
|
struct tegra_devfreq *tegra = dev_get_drvdata(dev);
|
|
struct devfreq *devfreq = tegra->devfreq;
|
|
struct dev_pm_opp *opp;
|
|
unsigned long rate;
|
|
int err;
|
|
|
|
opp = devfreq_recommended_opp(dev, freq, flags);
|
|
if (IS_ERR(opp)) {
|
|
dev_err(dev, "Failed to find opp for %lu Hz\n", *freq);
|
|
return PTR_ERR(opp);
|
|
}
|
|
rate = dev_pm_opp_get_freq(opp);
|
|
dev_pm_opp_put(opp);
|
|
|
|
err = clk_set_min_rate(tegra->emc_clock, rate * KHZ);
|
|
if (err)
|
|
return err;
|
|
|
|
err = clk_set_rate(tegra->emc_clock, 0);
|
|
if (err)
|
|
goto restore_min_rate;
|
|
|
|
return 0;
|
|
|
|
restore_min_rate:
|
|
clk_set_min_rate(tegra->emc_clock, devfreq->previous_freq);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int tegra_devfreq_get_dev_status(struct device *dev,
|
|
struct devfreq_dev_status *stat)
|
|
{
|
|
struct tegra_devfreq *tegra = dev_get_drvdata(dev);
|
|
struct tegra_devfreq_device *actmon_dev;
|
|
unsigned long cur_freq;
|
|
|
|
cur_freq = READ_ONCE(tegra->cur_freq);
|
|
|
|
/* To be used by the tegra governor */
|
|
stat->private_data = tegra;
|
|
|
|
/* The below are to be used by the other governors */
|
|
stat->current_frequency = cur_freq;
|
|
|
|
actmon_dev = &tegra->devices[MCALL];
|
|
|
|
/* Number of cycles spent on memory access */
|
|
stat->busy_time = device_readl(actmon_dev, ACTMON_DEV_AVG_COUNT);
|
|
|
|
/* The bus can be considered to be saturated way before 100% */
|
|
stat->busy_time *= 100 / BUS_SATURATION_RATIO;
|
|
|
|
/* Number of cycles in a sampling period */
|
|
stat->total_time = tegra->devfreq->profile->polling_ms * cur_freq;
|
|
|
|
stat->busy_time = min(stat->busy_time, stat->total_time);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct devfreq_dev_profile tegra_devfreq_profile = {
|
|
.polling_ms = ACTMON_SAMPLING_PERIOD,
|
|
.target = tegra_devfreq_target,
|
|
.get_dev_status = tegra_devfreq_get_dev_status,
|
|
};
|
|
|
|
static int tegra_governor_get_target(struct devfreq *devfreq,
|
|
unsigned long *freq)
|
|
{
|
|
struct devfreq_dev_status *stat;
|
|
struct tegra_devfreq *tegra;
|
|
struct tegra_devfreq_device *dev;
|
|
unsigned long target_freq = 0;
|
|
unsigned int i;
|
|
int err;
|
|
|
|
err = devfreq_update_stats(devfreq);
|
|
if (err)
|
|
return err;
|
|
|
|
stat = &devfreq->last_status;
|
|
|
|
tegra = stat->private_data;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(tegra->devices); i++) {
|
|
dev = &tegra->devices[i];
|
|
|
|
actmon_update_target(tegra, dev);
|
|
|
|
target_freq = max(target_freq, dev->target_freq);
|
|
}
|
|
|
|
*freq = target_freq;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tegra_governor_event_handler(struct devfreq *devfreq,
|
|
unsigned int event, void *data)
|
|
{
|
|
struct tegra_devfreq *tegra = dev_get_drvdata(devfreq->dev.parent);
|
|
unsigned int *new_delay = data;
|
|
int ret = 0;
|
|
|
|
/*
|
|
* Couple devfreq-device with the governor early because it is
|
|
* needed at the moment of governor's start (used by ISR).
|
|
*/
|
|
tegra->devfreq = devfreq;
|
|
|
|
switch (event) {
|
|
case DEVFREQ_GOV_START:
|
|
devfreq_monitor_start(devfreq);
|
|
ret = tegra_actmon_start(tegra);
|
|
break;
|
|
|
|
case DEVFREQ_GOV_STOP:
|
|
tegra_actmon_stop(tegra);
|
|
devfreq_monitor_stop(devfreq);
|
|
break;
|
|
|
|
case DEVFREQ_GOV_UPDATE_INTERVAL:
|
|
/*
|
|
* ACTMON hardware supports up to 256 milliseconds for the
|
|
* sampling period.
|
|
*/
|
|
if (*new_delay > 256) {
|
|
ret = -EINVAL;
|
|
break;
|
|
}
|
|
|
|
tegra_actmon_pause(tegra);
|
|
devfreq_update_interval(devfreq, new_delay);
|
|
ret = tegra_actmon_resume(tegra);
|
|
break;
|
|
|
|
case DEVFREQ_GOV_SUSPEND:
|
|
tegra_actmon_stop(tegra);
|
|
devfreq_monitor_suspend(devfreq);
|
|
break;
|
|
|
|
case DEVFREQ_GOV_RESUME:
|
|
devfreq_monitor_resume(devfreq);
|
|
ret = tegra_actmon_start(tegra);
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static struct devfreq_governor tegra_devfreq_governor = {
|
|
.name = "tegra_actmon",
|
|
.get_target_freq = tegra_governor_get_target,
|
|
.event_handler = tegra_governor_event_handler,
|
|
.immutable = true,
|
|
.interrupt_driven = true,
|
|
};
|
|
|
|
static int tegra_devfreq_probe(struct platform_device *pdev)
|
|
{
|
|
struct tegra_devfreq_device *dev;
|
|
struct tegra_devfreq *tegra;
|
|
struct devfreq *devfreq;
|
|
unsigned int i;
|
|
long rate;
|
|
int err;
|
|
|
|
tegra = devm_kzalloc(&pdev->dev, sizeof(*tegra), GFP_KERNEL);
|
|
if (!tegra)
|
|
return -ENOMEM;
|
|
|
|
tegra->regs = devm_platform_ioremap_resource(pdev, 0);
|
|
if (IS_ERR(tegra->regs))
|
|
return PTR_ERR(tegra->regs);
|
|
|
|
tegra->reset = devm_reset_control_get(&pdev->dev, "actmon");
|
|
if (IS_ERR(tegra->reset)) {
|
|
dev_err(&pdev->dev, "Failed to get reset\n");
|
|
return PTR_ERR(tegra->reset);
|
|
}
|
|
|
|
tegra->clock = devm_clk_get(&pdev->dev, "actmon");
|
|
if (IS_ERR(tegra->clock)) {
|
|
dev_err(&pdev->dev, "Failed to get actmon clock\n");
|
|
return PTR_ERR(tegra->clock);
|
|
}
|
|
|
|
tegra->emc_clock = devm_clk_get(&pdev->dev, "emc");
|
|
if (IS_ERR(tegra->emc_clock)) {
|
|
dev_err(&pdev->dev, "Failed to get emc clock\n");
|
|
return PTR_ERR(tegra->emc_clock);
|
|
}
|
|
|
|
err = platform_get_irq(pdev, 0);
|
|
if (err < 0) {
|
|
dev_err(&pdev->dev, "Failed to get IRQ: %d\n", err);
|
|
return err;
|
|
}
|
|
tegra->irq = err;
|
|
|
|
irq_set_status_flags(tegra->irq, IRQ_NOAUTOEN);
|
|
|
|
err = devm_request_threaded_irq(&pdev->dev, tegra->irq, NULL,
|
|
actmon_thread_isr, IRQF_ONESHOT,
|
|
"tegra-devfreq", tegra);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Interrupt request failed: %d\n", err);
|
|
return err;
|
|
}
|
|
|
|
reset_control_assert(tegra->reset);
|
|
|
|
err = clk_prepare_enable(tegra->clock);
|
|
if (err) {
|
|
dev_err(&pdev->dev,
|
|
"Failed to prepare and enable ACTMON clock\n");
|
|
return err;
|
|
}
|
|
|
|
reset_control_deassert(tegra->reset);
|
|
|
|
rate = clk_round_rate(tegra->emc_clock, ULONG_MAX);
|
|
if (rate < 0) {
|
|
dev_err(&pdev->dev, "Failed to round clock rate: %ld\n", rate);
|
|
return rate;
|
|
}
|
|
|
|
tegra->max_freq = rate / KHZ;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(actmon_device_configs); i++) {
|
|
dev = tegra->devices + i;
|
|
dev->config = actmon_device_configs + i;
|
|
dev->regs = tegra->regs + dev->config->offset;
|
|
}
|
|
|
|
for (rate = 0; rate <= tegra->max_freq * KHZ; rate++) {
|
|
rate = clk_round_rate(tegra->emc_clock, rate);
|
|
|
|
if (rate < 0) {
|
|
dev_err(&pdev->dev,
|
|
"Failed to round clock rate: %ld\n", rate);
|
|
err = rate;
|
|
goto remove_opps;
|
|
}
|
|
|
|
err = dev_pm_opp_add(&pdev->dev, rate / KHZ, 0);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Failed to add OPP: %d\n", err);
|
|
goto remove_opps;
|
|
}
|
|
}
|
|
|
|
platform_set_drvdata(pdev, tegra);
|
|
|
|
tegra->clk_rate_change_nb.notifier_call = tegra_actmon_clk_notify_cb;
|
|
tegra->cpu_rate_change_nb.notifier_call = tegra_actmon_cpu_notify_cb;
|
|
|
|
INIT_DELAYED_WORK(&tegra->cpufreq_update_work,
|
|
tegra_actmon_delayed_update);
|
|
|
|
err = devfreq_add_governor(&tegra_devfreq_governor);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Failed to add governor: %d\n", err);
|
|
goto remove_opps;
|
|
}
|
|
|
|
tegra_devfreq_profile.initial_freq = clk_get_rate(tegra->emc_clock);
|
|
tegra_devfreq_profile.initial_freq /= KHZ;
|
|
|
|
devfreq = devfreq_add_device(&pdev->dev, &tegra_devfreq_profile,
|
|
"tegra_actmon", NULL);
|
|
if (IS_ERR(devfreq)) {
|
|
err = PTR_ERR(devfreq);
|
|
goto remove_governor;
|
|
}
|
|
|
|
return 0;
|
|
|
|
remove_governor:
|
|
devfreq_remove_governor(&tegra_devfreq_governor);
|
|
|
|
remove_opps:
|
|
dev_pm_opp_remove_all_dynamic(&pdev->dev);
|
|
|
|
reset_control_reset(tegra->reset);
|
|
clk_disable_unprepare(tegra->clock);
|
|
|
|
return err;
|
|
}
|
|
|
|
static int tegra_devfreq_remove(struct platform_device *pdev)
|
|
{
|
|
struct tegra_devfreq *tegra = platform_get_drvdata(pdev);
|
|
|
|
devfreq_remove_device(tegra->devfreq);
|
|
devfreq_remove_governor(&tegra_devfreq_governor);
|
|
|
|
dev_pm_opp_remove_all_dynamic(&pdev->dev);
|
|
|
|
reset_control_reset(tegra->reset);
|
|
clk_disable_unprepare(tegra->clock);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id tegra_devfreq_of_match[] = {
|
|
{ .compatible = "nvidia,tegra30-actmon" },
|
|
{ .compatible = "nvidia,tegra124-actmon" },
|
|
{ },
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, tegra_devfreq_of_match);
|
|
|
|
static struct platform_driver tegra_devfreq_driver = {
|
|
.probe = tegra_devfreq_probe,
|
|
.remove = tegra_devfreq_remove,
|
|
.driver = {
|
|
.name = "tegra-devfreq",
|
|
.of_match_table = tegra_devfreq_of_match,
|
|
},
|
|
};
|
|
module_platform_driver(tegra_devfreq_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_DESCRIPTION("Tegra devfreq driver");
|
|
MODULE_AUTHOR("Tomeu Vizoso <tomeu.vizoso@collabora.com>");
|