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linux/arch/mips/include/asm/mach-loongson1
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Kelvin Cheung f29ad10de6 MIPS: Loongson1B: Some fixes/updates for LS1B 
- Fix hanging ethernet issue of LS1B v2.0 by adding pbl field in plat data.
   (It seems that the MAC controller of LS1B v2.0 can only accept pbl=1)
 - Add GMAC1 support and setup MUX in terms of PHY mode.
 - Add CPUFreq support.
 - Add MUX Register Definitions.
 - Add PWM Register Definitions.
 - Update clock register bitfields according to the latest spec.
 - Update clock related stuff.

Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8024/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 		2014-11-24 07:45:09 +01:00
..
cpufreq.h MIPS: Loongson1B: Some fixes/updates for LS1B 2014-11-24 07:45:09 +01:00
irq.h MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
loongson1.h MIPS: Loongson1B: Some fixes/updates for LS1B 2014-11-24 07:45:09 +01:00
platform.h MIPS: Loongson1B: Some fixes/updates for LS1B 2014-11-24 07:45:09 +01:00
prom.h MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
regs-clk.h MIPS: Loongson1B: Some fixes/updates for LS1B 2014-11-24 07:45:09 +01:00
regs-mux.h MIPS: Loongson1B: Some fixes/updates for LS1B 2014-11-24 07:45:09 +01:00
regs-pwm.h MIPS: Loongson1B: Some fixes/updates for LS1B 2014-11-24 07:45:09 +01:00
regs-wdt.h MIPS: Loongson1B: Fix reboot problem on LS1B 2014-11-24 07:45:09 +01:00
war.h MIPS: PMC-Sierra Yosemite: Remove support. 2012-12-13 18:15:30 +01:00