linux/arch/mips/mm
James Hogan a05c392032 MIPS: SMP: Clear ASID without confusing has_valid_asid()
The SMP flush_tlb_*() functions may clear the memory map's ASIDs for
other CPUs if the mm has only a single user (the current CPU) in order
to avoid SMP calls. However this makes it appear to has_valid_asid(),
which is used by various cache flush functions, as if the CPUs have
never run in the mm, and therefore can't have cached any of its memory.

For flush_tlb_mm() this doesn't sound unreasonable.

flush_tlb_range() corresponds to flush_cache_range() which does do full
indexed cache flushes, but only on the icache if the specified mapping
is executable, otherwise it doesn't guarantee that there are no cache
contents left for the mm.

flush_tlb_page() corresponds to flush_cache_page(), which will perform
address based cache ops on the specified page only, and also only
touches the icache if the page is executable. It does not guarantee that
there are no cache contents left for the mm.

For example, this affects flush_cache_range() which uses the
has_valid_asid() optimisation. It is required to flush the icache when
mappings are made executable (e.g. using mprotect) so they are
immediately usable. If some code is changed to non executable in order
to be modified then it will not be flushed from the icache during that
time, but the ASID on other CPUs may still be cleared for TLB flushing.
When the code is changed back to executable, flush_cache_range() will
assume the code hasn't run on those other CPUs due to the zero ASID, and
won't invalidate the icache on them.

This is fixed by clearing the other CPUs ASIDs to 1 instead of 0 for the
above two flush_tlb_*() functions when the corresponding cache flushes
are likely to be incomplete (non executable range flush, or any page
flush). This ASID appears valid to has_valid_asid(), but still triggers
ASID regeneration due to the upper ASID version bits being 0, which is
less than the minimum ASID version of 1 and so always treated as stale.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13795/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-07-29 10:19:28 +02:00
..
Makefile MIPS: Allow L2 prefetch to be configured via debugfs 2015-10-26 09:49:42 +01:00
c-octeon.c MIPS: Call find_vma with the mmap_sem held 2014-06-03 22:19:09 +02:00
c-r3k.c mips: delete non-required instances of include <linux/init.h> 2014-01-24 22:39:56 +01:00
c-r4k.c MIPS: SMP: Clear ASID without confusing has_valid_asid() 2016-07-29 10:19:28 +02:00
c-tx39.c MIPS: tlb-r3k: Move CP0.Wired register initialisation to `tlb_init' 2015-06-21 21:52:41 +02:00
cache.c MIPS: Sync icache & dcache in set_pte_at 2016-05-13 14:01:58 +02:00
cerr-sb1.c MIPS: Sibyte: Fix build for SIBYTE_BW_TRACE on BCM1x55 and BCM1x80. 2013-06-21 18:07:02 +02:00
cex-gen.S MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
cex-oct.S MIPS: Whitespace cleanup. 2013-02-01 10:00:22 +01:00
cex-sb1.S mips: delete non-required instances of include <linux/init.h> 2014-01-24 22:39:56 +01:00
dma-default.c MIPS: dma-default: Defend against NULL dev in massage_gfp_flags 2016-05-09 12:00:04 +02:00
extable.c MIPS: Eleminate filenames from comments 2009-08-03 17:52:40 +01:00
fault.c MIPS: Set trap_no field in thread_struct on exception. 2015-09-03 12:08:04 +02:00
gup.c Merge branch 'mm-pkeys-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 2016-03-20 19:08:56 -07:00
highmem.c kmap_atomic_to_page() has no users, remove it 2015-11-09 15:11:24 -08:00
hugetlbpage.c mm/hugetlb: reduce arch dependent code about huge_pmd_unshare 2015-06-24 17:49:41 -07:00
init.c MIPS: mm: Don't do MTHC0 if XPA not present 2016-05-13 15:30:25 +02:00
ioremap.c MIPS: Replace use of phys_t with phys_addr_t. 2014-11-24 22:47:31 +01:00
mmap.c mm: ASLR: use get_random_long() 2016-02-27 10:28:52 -08:00
page-funcs.S MIPS: Refactor 'clear_page' and 'copy_page' functions. 2012-07-19 11:23:43 +02:00
page.c MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENT 2016-05-13 14:02:15 +02:00
pgtable-32.c MIPS: Limit fixrange_init() to the FIXMAP region 2011-07-25 17:26:54 +01:00
pgtable-64.c mips, thp: remove infrastructure for handling splitting PMDs 2016-01-15 17:56:32 -08:00
sc-debugfs.c MIPS: Allow L2 prefetch to be configured via debugfs 2015-10-26 09:49:42 +01:00
sc-ip22.c MIPS: Fix misspellings in comments. 2016-04-03 12:32:09 +02:00
sc-mips.c MIPS: Add P6600 cases to CPU switch statements 2016-05-13 14:01:52 +02:00
sc-r5k.c MIPS: Remove useless parentheses 2014-11-24 07:44:49 +01:00
sc-rm7k.c mips: delete non-required instances of include <linux/init.h> 2014-01-24 22:39:56 +01:00
tlb-funcs.S MIPS: mm: Fix broken microMIPS kernel regression. 2014-05-14 18:11:06 +02:00
tlb-r3k.c MIPS: Retrieve ASID masks using function accepting struct cpuinfo_mips 2016-05-13 14:02:20 +02:00
tlb-r4k.c Merge branch 'akpm' (patches from Andrew) 2016-05-19 20:00:06 -07:00
tlb-r8k.c MIPS: Retrieve ASID masks using function accepting struct cpuinfo_mips 2016-05-13 14:02:20 +02:00
tlbex-fault.S MIPS: Don't include <asm/page.h> unnecessarily. 2012-12-28 17:04:04 +01:00
tlbex.c MIPS: tlbex: Avoid duplicated single_insn_swpd 2016-07-24 13:16:00 +02:00
uasm-micromips.c MIPS: mm: Remove dead macro definitions 2015-02-20 23:42:00 +01:00
uasm-mips.c MIPS: Loongson-3: Fast TLB refill handler 2016-05-13 14:02:15 +02:00
uasm.c MIPS: uasm: Handle low values in uasm_in_compat_space_p() 2016-07-24 13:15:28 +02:00