mirror of https://gitee.com/openkylin/linux.git
272 lines
7.7 KiB
C
272 lines
7.7 KiB
C
/*
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* Thunderbolt Cactus Ridge driver - bus logic (NHI independent)
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*
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* Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
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*/
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#ifndef TB_H_
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#define TB_H_
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#include <linux/pci.h>
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#include "tb_regs.h"
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#include "ctl.h"
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/**
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* struct tb_switch - a thunderbolt switch
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*/
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struct tb_switch {
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struct tb_regs_switch_header config;
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struct tb_port *ports;
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struct tb *tb;
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u64 uid;
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int cap_plug_events; /* offset, zero if not found */
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bool is_unplugged; /* unplugged, will go away */
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u8 *drom;
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};
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/**
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* struct tb_port - a thunderbolt port, part of a tb_switch
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*/
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struct tb_port {
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struct tb_regs_port_header config;
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struct tb_switch *sw;
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struct tb_port *remote; /* remote port, NULL if not connected */
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int cap_phy; /* offset, zero if not found */
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u8 port; /* port number on switch */
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bool disabled; /* disabled by eeprom */
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struct tb_port *dual_link_port;
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u8 link_nr:1;
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};
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/**
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* struct tb_path_hop - routing information for a tb_path
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*
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* Hop configuration is always done on the IN port of a switch.
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* in_port and out_port have to be on the same switch. Packets arriving on
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* in_port with "hop" = in_hop_index will get routed to through out_port. The
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* next hop to take (on out_port->remote) is determined by next_hop_index.
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*
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* in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
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* port.
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*/
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struct tb_path_hop {
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struct tb_port *in_port;
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struct tb_port *out_port;
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int in_hop_index;
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int in_counter_index; /* write -1 to disable counters for this hop. */
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int next_hop_index;
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};
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/**
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* enum tb_path_port - path options mask
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*/
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enum tb_path_port {
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TB_PATH_NONE = 0,
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TB_PATH_SOURCE = 1, /* activate on the first hop (out of src) */
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TB_PATH_INTERNAL = 2, /* activate on other hops (not the first/last) */
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TB_PATH_DESTINATION = 4, /* activate on the last hop (into dst) */
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TB_PATH_ALL = 7,
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};
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/**
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* struct tb_path - a unidirectional path between two ports
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*
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* A path consists of a number of hops (see tb_path_hop). To establish a PCIe
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* tunnel two paths have to be created between the two PCIe ports.
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*
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*/
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struct tb_path {
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struct tb *tb;
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int nfc_credits; /* non flow controlled credits */
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enum tb_path_port ingress_shared_buffer;
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enum tb_path_port egress_shared_buffer;
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enum tb_path_port ingress_fc_enable;
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enum tb_path_port egress_fc_enable;
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int priority:3;
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int weight:4;
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bool drop_packages;
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bool activated;
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struct tb_path_hop *hops;
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int path_length; /* number of hops */
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};
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/**
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* struct tb - main thunderbolt bus structure
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*/
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struct tb {
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struct mutex lock; /*
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* Big lock. Must be held when accessing cfg or
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* any struct tb_switch / struct tb_port.
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*/
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struct tb_nhi *nhi;
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struct tb_ctl *ctl;
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struct workqueue_struct *wq; /* ordered workqueue for plug events */
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struct tb_switch *root_switch;
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struct list_head tunnel_list; /* list of active PCIe tunnels */
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bool hotplug_active; /*
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* tb_handle_hotplug will stop progressing plug
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* events and exit if this is not set (it needs to
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* acquire the lock one more time). Used to drain
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* wq after cfg has been paused.
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*/
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};
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/* helper functions & macros */
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/**
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* tb_upstream_port() - return the upstream port of a switch
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*
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* Every switch has an upstream port (for the root switch it is the NHI).
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*
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* During switch alloc/init tb_upstream_port()->remote may be NULL, even for
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* non root switches (on the NHI port remote is always NULL).
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*
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* Return: Returns the upstream port of the switch.
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*/
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static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
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{
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return &sw->ports[sw->config.upstream_port_number];
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}
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static inline u64 tb_route(struct tb_switch *sw)
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{
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return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
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}
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static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
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enum tb_cfg_space space, u32 offset, u32 length)
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{
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return tb_cfg_read(sw->tb->ctl,
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buffer,
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tb_route(sw),
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0,
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space,
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offset,
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length);
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}
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static inline int tb_sw_write(struct tb_switch *sw, void *buffer,
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enum tb_cfg_space space, u32 offset, u32 length)
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{
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return tb_cfg_write(sw->tb->ctl,
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buffer,
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tb_route(sw),
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0,
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space,
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offset,
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length);
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}
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static inline int tb_port_read(struct tb_port *port, void *buffer,
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enum tb_cfg_space space, u32 offset, u32 length)
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{
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return tb_cfg_read(port->sw->tb->ctl,
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buffer,
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tb_route(port->sw),
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port->port,
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space,
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offset,
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length);
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}
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static inline int tb_port_write(struct tb_port *port, void *buffer,
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enum tb_cfg_space space, u32 offset, u32 length)
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{
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return tb_cfg_write(port->sw->tb->ctl,
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buffer,
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tb_route(port->sw),
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port->port,
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space,
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offset,
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length);
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}
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#define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
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#define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
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#define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
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#define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
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#define __TB_SW_PRINT(level, sw, fmt, arg...) \
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do { \
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struct tb_switch *__sw = (sw); \
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level(__sw->tb, "%llx: " fmt, \
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tb_route(__sw), ## arg); \
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} while (0)
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#define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
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#define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
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#define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
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#define __TB_PORT_PRINT(level, _port, fmt, arg...) \
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do { \
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struct tb_port *__port = (_port); \
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level(__port->sw->tb, "%llx:%x: " fmt, \
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tb_route(__port->sw), __port->port, ## arg); \
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} while (0)
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#define tb_port_WARN(port, fmt, arg...) \
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__TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
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#define tb_port_warn(port, fmt, arg...) \
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__TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
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#define tb_port_info(port, fmt, arg...) \
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__TB_PORT_PRINT(tb_info, port, fmt, ##arg)
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struct tb *thunderbolt_alloc_and_start(struct tb_nhi *nhi);
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void thunderbolt_shutdown_and_free(struct tb *tb);
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void thunderbolt_suspend(struct tb *tb);
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void thunderbolt_resume(struct tb *tb);
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struct tb_switch *tb_switch_alloc(struct tb *tb, u64 route);
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void tb_switch_free(struct tb_switch *sw);
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void tb_switch_suspend(struct tb_switch *sw);
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int tb_switch_resume(struct tb_switch *sw);
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int tb_switch_reset(struct tb *tb, u64 route);
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void tb_sw_set_unpplugged(struct tb_switch *sw);
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struct tb_switch *get_switch_at_route(struct tb_switch *sw, u64 route);
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int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
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int tb_port_add_nfc_credits(struct tb_port *port, int credits);
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int tb_port_clear_counter(struct tb_port *port, int counter);
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int tb_find_cap(struct tb_port *port, enum tb_cfg_space space, enum tb_cap cap);
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struct tb_path *tb_path_alloc(struct tb *tb, int num_hops);
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void tb_path_free(struct tb_path *path);
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int tb_path_activate(struct tb_path *path);
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void tb_path_deactivate(struct tb_path *path);
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bool tb_path_is_invalid(struct tb_path *path);
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int tb_drom_read(struct tb_switch *sw);
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int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
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static inline int tb_route_length(u64 route)
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{
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return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
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}
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static inline bool tb_is_upstream_port(struct tb_port *port)
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{
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return port == tb_upstream_port(port->sw);
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}
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/**
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* tb_downstream_route() - get route to downstream switch
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*
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* Port must not be the upstream port (otherwise a loop is created).
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*
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* Return: Returns a route to the switch behind @port.
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*/
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static inline u64 tb_downstream_route(struct tb_port *port)
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{
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return tb_route(port->sw)
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| ((u64) port->port << (port->sw->config.depth * 8));
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}
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#endif
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