Alexandre Ghiti 0ddd7eaffa riscv: Fix BUILTIN_DTB for sifive and microchip soc ... Fix BUILTIN_DTB config which resulted in a dtb that was actually not built into the Linux image: in the same manner as Canaan soc does, create an object file from the dtb file that will get linked into the Linux image. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2021-06-11 21:07:09 -07:00
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dts	riscv: Fix BUILTIN_DTB for sifive and microchip soc	2021-06-11 21:07:09 -07:00
.gitignore	riscv: Ignore Image.* and loader.bin	2020-11-09 11:54:46 -08:00
Makefile	RISC-V: enable XIP	2021-04-26 08:31:28 -07:00
install.sh	RISC-V: Build flat and compressed kernel images	2018-11-20 05:19:09 -08:00
loader.S	riscv: provide a flat image loader	2019-11-17 15:17:39 -08:00
loader.lds.S	riscv: Move kernel mapping outside of linear mapping	2021-04-26 08:25:04 -07:00