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linux/drivers/fpga
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Thomas Gleixner 75a6faf617 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422 
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms and conditions of the gnu general public license
  version 2 as published by the free software foundation

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 101 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190531190113.822954939@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 		2019-06-05 17:37:15 +02:00
..
Kconfig treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
Makefile fpga manager: Adding FPGA Manager support for Xilinx zynqmp 2019-04-15 10:23:18 +02:00
altera-cvp.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285 2019-06-05 17:36:37 +02:00
altera-fpga2sdram.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
altera-freeze-bridge.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
altera-hps2fpga.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
altera-pr-ip-core-plat.c fpga: use SPDX 2018-05-25 18:23:56 +02:00
altera-pr-ip-core.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
altera-ps-spi.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422 2019-06-05 17:37:15 +02:00
dfl-afu-dma-region.c mm/gup: change GUP fast to use flags rather than a write 'bool' 2019-05-14 09:47:46 -07:00
dfl-afu-main.c fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support 2018-07-15 13:55:47 +02:00
dfl-afu-region.c fpga: dfl: afu: add afu sub feature support 2018-07-15 13:55:47 +02:00
dfl-afu.h fpga: dfl: afu: add DFL_FPGA_PORT_DMA_MAP/UNMAP ioctls support 2018-07-15 13:55:47 +02:00
dfl-fme-br.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
dfl-fme-main.c fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-fme-mgr.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
dfl-fme-pr.c Remove 'type' argument from access_ok() function 2019-01-03 18:57:57 -08:00
dfl-fme-pr.h fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-fme-region.c fpga: dfl-fme-region: Use platform_get_drvdata() 2018-11-26 20:47:10 +01:00
dfl-fme.h fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-pci.c fpga: dfl-pci: add enumeration for feature devices 2018-07-15 13:55:45 +02:00
dfl.c fpga: add devm_fpga_region_create 2018-10-16 11:13:50 +02:00
dfl.h fpga: dfl: add dfl_fpga_check_port_id function. 2018-07-15 13:55:45 +02:00
fpga-bridge.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
fpga-mgr.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
fpga-region.c fpga: add devm_fpga_region_create 2018-10-16 11:13:50 +02:00
ice40-spi.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
machxo2-spi.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
of-fpga-region.c fpga: of-fpga-region: Use platform_set_drvdata 2018-11-26 20:47:10 +01:00
socfpga-a10.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
socfpga.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
stratix10-soc.c fpga: stratix10-soc: fix wrong of_node_put() in init function 2019-01-31 16:19:48 +01:00
ts73xx-fpga.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285 2019-06-05 17:36:37 +02:00
xilinx-pr-decoupler.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285 2019-06-05 17:36:37 +02:00
xilinx-spi.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 422 2019-06-05 17:37:15 +02:00
zynq-fpga.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 285 2019-06-05 17:36:37 +02:00
zynqmp-fpga.c fpga manager: Adding FPGA Manager support for Xilinx zynqmp 2019-04-15 10:23:18 +02:00