mirror of https://gitee.com/openkylin/linux.git
633 lines
15 KiB
C
633 lines
15 KiB
C
/*
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* Huawei HiNIC PCI Express Linux driver
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* Copyright(c) 2017 Huawei Technologies Co., Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/device.h>
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#include <linux/errno.h>
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#include <linux/slab.h>
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#include <linux/bitops.h>
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#include <linux/err.h>
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#include "hinic_hw_if.h"
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#include "hinic_hw_eqs.h"
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#include "hinic_hw_mgmt.h"
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#include "hinic_hw_qp.h"
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#include "hinic_hw_io.h"
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#include "hinic_hw_dev.h"
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#define MAX_IRQS(max_qps, num_aeqs, num_ceqs) \
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(2 * (max_qps) + (num_aeqs) + (num_ceqs))
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enum intr_type {
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INTR_MSIX_TYPE,
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};
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/* HW struct */
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struct hinic_dev_cap {
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u8 status;
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u8 version;
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u8 rsvd0[6];
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u8 rsvd1[5];
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u8 intr_type;
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u8 rsvd2[66];
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u16 max_sqs;
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u16 max_rqs;
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u8 rsvd3[208];
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};
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/**
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* get_capability - convert device capabilities to NIC capabilities
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* @hwdev: the HW device to set and convert device capabilities for
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* @dev_cap: device capabilities from FW
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*
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* Return 0 - Success, negative - Failure
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**/
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static int get_capability(struct hinic_hwdev *hwdev,
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struct hinic_dev_cap *dev_cap)
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{
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struct hinic_cap *nic_cap = &hwdev->nic_cap;
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int num_aeqs, num_ceqs, num_irqs;
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if (!HINIC_IS_PF(hwdev->hwif) && !HINIC_IS_PPF(hwdev->hwif))
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return -EINVAL;
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if (dev_cap->intr_type != INTR_MSIX_TYPE)
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return -EFAULT;
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num_aeqs = HINIC_HWIF_NUM_AEQS(hwdev->hwif);
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num_ceqs = HINIC_HWIF_NUM_CEQS(hwdev->hwif);
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num_irqs = HINIC_HWIF_NUM_IRQS(hwdev->hwif);
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/* Each QP has its own (SQ + RQ) interrupts */
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nic_cap->num_qps = (num_irqs - (num_aeqs + num_ceqs)) / 2;
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/* num_qps must be power of 2 */
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nic_cap->num_qps = BIT(fls(nic_cap->num_qps) - 1);
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nic_cap->max_qps = dev_cap->max_sqs + 1;
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if (nic_cap->max_qps != (dev_cap->max_rqs + 1))
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return -EFAULT;
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if (nic_cap->num_qps > nic_cap->max_qps)
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nic_cap->num_qps = nic_cap->max_qps;
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return 0;
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}
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/**
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* get_cap_from_fw - get device capabilities from FW
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* @pfhwdev: the PF HW device to get capabilities for
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*
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* Return 0 - Success, negative - Failure
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**/
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static int get_cap_from_fw(struct hinic_pfhwdev *pfhwdev)
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{
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struct hinic_hwdev *hwdev = &pfhwdev->hwdev;
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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struct hinic_dev_cap dev_cap;
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u16 in_len, out_len;
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int err;
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in_len = 0;
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out_len = sizeof(dev_cap);
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err = hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_CFGM,
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HINIC_CFG_NIC_CAP, &dev_cap, in_len, &dev_cap,
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&out_len, HINIC_MGMT_MSG_SYNC);
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if (err) {
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dev_err(&pdev->dev, "Failed to get capability from FW\n");
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return err;
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}
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return get_capability(hwdev, &dev_cap);
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}
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/**
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* get_dev_cap - get device capabilities
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* @hwdev: the NIC HW device to get capabilities for
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*
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* Return 0 - Success, negative - Failure
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**/
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static int get_dev_cap(struct hinic_hwdev *hwdev)
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{
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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struct hinic_pfhwdev *pfhwdev;
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int err;
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switch (HINIC_FUNC_TYPE(hwif)) {
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case HINIC_PPF:
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case HINIC_PF:
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pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);
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err = get_cap_from_fw(pfhwdev);
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if (err) {
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dev_err(&pdev->dev, "Failed to get capability from FW\n");
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return err;
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}
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break;
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default:
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dev_err(&pdev->dev, "Unsupported PCI Function type\n");
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return -EINVAL;
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}
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return 0;
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}
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/**
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* init_msix - enable the msix and save the entries
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* @hwdev: the NIC HW device
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*
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* Return 0 - Success, negative - Failure
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**/
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static int init_msix(struct hinic_hwdev *hwdev)
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{
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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int nr_irqs, num_aeqs, num_ceqs;
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size_t msix_entries_size;
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int i, err;
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num_aeqs = HINIC_HWIF_NUM_AEQS(hwif);
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num_ceqs = HINIC_HWIF_NUM_CEQS(hwif);
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nr_irqs = MAX_IRQS(HINIC_MAX_QPS, num_aeqs, num_ceqs);
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if (nr_irqs > HINIC_HWIF_NUM_IRQS(hwif))
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nr_irqs = HINIC_HWIF_NUM_IRQS(hwif);
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msix_entries_size = nr_irqs * sizeof(*hwdev->msix_entries);
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hwdev->msix_entries = devm_kzalloc(&pdev->dev, msix_entries_size,
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GFP_KERNEL);
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if (!hwdev->msix_entries)
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return -ENOMEM;
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for (i = 0; i < nr_irqs; i++)
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hwdev->msix_entries[i].entry = i;
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err = pci_enable_msix_exact(pdev, hwdev->msix_entries, nr_irqs);
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if (err) {
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dev_err(&pdev->dev, "Failed to enable pci msix\n");
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return err;
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}
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return 0;
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}
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/**
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* disable_msix - disable the msix
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* @hwdev: the NIC HW device
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**/
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static void disable_msix(struct hinic_hwdev *hwdev)
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{
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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pci_disable_msix(pdev);
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}
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/**
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* hinic_port_msg_cmd - send port msg to mgmt
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* @hwdev: the NIC HW device
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* @cmd: the port command
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* @buf_in: input buffer
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* @in_size: input size
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* @buf_out: output buffer
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* @out_size: returned output size
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*
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* Return 0 - Success, negative - Failure
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**/
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int hinic_port_msg_cmd(struct hinic_hwdev *hwdev, enum hinic_port_cmd cmd,
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void *buf_in, u16 in_size, void *buf_out, u16 *out_size)
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{
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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struct hinic_pfhwdev *pfhwdev;
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if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {
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dev_err(&pdev->dev, "unsupported PCI Function type\n");
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return -EINVAL;
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}
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pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);
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return hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_L2NIC, cmd,
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buf_in, in_size, buf_out, out_size,
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HINIC_MGMT_MSG_SYNC);
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}
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/**
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* get_base_qpn - get the first qp number
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* @hwdev: the NIC HW device
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* @base_qpn: returned qp number
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*
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* Return 0 - Success, negative - Failure
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**/
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static int get_base_qpn(struct hinic_hwdev *hwdev, u16 *base_qpn)
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{
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struct hinic_cmd_base_qpn cmd_base_qpn;
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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u16 out_size;
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int err;
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cmd_base_qpn.func_idx = HINIC_HWIF_FUNC_IDX(hwif);
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err = hinic_port_msg_cmd(hwdev, HINIC_PORT_CMD_GET_GLOBAL_QPN,
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&cmd_base_qpn, sizeof(cmd_base_qpn),
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&cmd_base_qpn, &out_size);
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if (err || (out_size != sizeof(cmd_base_qpn)) || cmd_base_qpn.status) {
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dev_err(&pdev->dev, "Failed to get base qpn, status = %d\n",
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cmd_base_qpn.status);
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return -EFAULT;
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}
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*base_qpn = cmd_base_qpn.qpn;
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return 0;
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}
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/**
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* hinic_hwdev_ifup - Preparing the HW for passing IO
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* @hwdev: the NIC HW device
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*
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* Return 0 - Success, negative - Failure
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**/
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int hinic_hwdev_ifup(struct hinic_hwdev *hwdev)
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{
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struct hinic_func_to_io *func_to_io = &hwdev->func_to_io;
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struct hinic_cap *nic_cap = &hwdev->nic_cap;
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struct hinic_hwif *hwif = hwdev->hwif;
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int err, num_aeqs, num_ceqs, num_qps;
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struct msix_entry *sq_msix_entries;
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struct msix_entry *rq_msix_entries;
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struct pci_dev *pdev = hwif->pdev;
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u16 base_qpn;
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err = get_base_qpn(hwdev, &base_qpn);
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if (err) {
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dev_err(&pdev->dev, "Failed to get global base qp number\n");
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return err;
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}
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num_aeqs = HINIC_HWIF_NUM_AEQS(hwif);
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num_ceqs = HINIC_HWIF_NUM_CEQS(hwif);
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err = hinic_io_init(func_to_io, hwif, nic_cap->max_qps, 0, NULL);
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if (err) {
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dev_err(&pdev->dev, "Failed to init IO channel\n");
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return err;
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}
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num_qps = nic_cap->num_qps;
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sq_msix_entries = &hwdev->msix_entries[num_aeqs + num_ceqs];
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rq_msix_entries = &hwdev->msix_entries[num_aeqs + num_ceqs + num_qps];
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err = hinic_io_create_qps(func_to_io, base_qpn, num_qps,
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sq_msix_entries, rq_msix_entries);
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if (err) {
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dev_err(&pdev->dev, "Failed to create QPs\n");
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goto err_create_qps;
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}
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return 0;
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err_create_qps:
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hinic_io_free(func_to_io);
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return err;
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}
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/**
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* hinic_hwdev_ifdown - Closing the HW for passing IO
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* @hwdev: the NIC HW device
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*
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**/
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void hinic_hwdev_ifdown(struct hinic_hwdev *hwdev)
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{
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struct hinic_func_to_io *func_to_io = &hwdev->func_to_io;
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struct hinic_cap *nic_cap = &hwdev->nic_cap;
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hinic_io_destroy_qps(func_to_io, nic_cap->num_qps);
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hinic_io_free(func_to_io);
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}
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/**
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* hinic_hwdev_cb_register - register callback handler for MGMT events
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* @hwdev: the NIC HW device
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* @cmd: the mgmt event
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* @handle: private data for the handler
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* @handler: event handler
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**/
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void hinic_hwdev_cb_register(struct hinic_hwdev *hwdev,
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enum hinic_mgmt_msg_cmd cmd, void *handle,
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void (*handler)(void *handle, void *buf_in,
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u16 in_size, void *buf_out,
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u16 *out_size))
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{
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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struct hinic_pfhwdev *pfhwdev;
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struct hinic_nic_cb *nic_cb;
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u8 cmd_cb;
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if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {
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dev_err(&pdev->dev, "unsupported PCI Function type\n");
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return;
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}
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pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);
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cmd_cb = cmd - HINIC_MGMT_MSG_CMD_BASE;
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nic_cb = &pfhwdev->nic_cb[cmd_cb];
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nic_cb->handler = handler;
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nic_cb->handle = handle;
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nic_cb->cb_state = HINIC_CB_ENABLED;
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}
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/**
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* hinic_hwdev_cb_unregister - unregister callback handler for MGMT events
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* @hwdev: the NIC HW device
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* @cmd: the mgmt event
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**/
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void hinic_hwdev_cb_unregister(struct hinic_hwdev *hwdev,
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enum hinic_mgmt_msg_cmd cmd)
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{
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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struct hinic_pfhwdev *pfhwdev;
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struct hinic_nic_cb *nic_cb;
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u8 cmd_cb;
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if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {
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dev_err(&pdev->dev, "unsupported PCI Function type\n");
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return;
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}
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pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);
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cmd_cb = cmd - HINIC_MGMT_MSG_CMD_BASE;
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nic_cb = &pfhwdev->nic_cb[cmd_cb];
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nic_cb->cb_state &= ~HINIC_CB_ENABLED;
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while (nic_cb->cb_state & HINIC_CB_RUNNING)
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schedule();
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nic_cb->handler = NULL;
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}
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/**
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* nic_mgmt_msg_handler - nic mgmt event handler
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* @handle: private data for the handler
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* @buf_in: input buffer
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* @in_size: input size
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* @buf_out: output buffer
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* @out_size: returned output size
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**/
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static void nic_mgmt_msg_handler(void *handle, u8 cmd, void *buf_in,
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u16 in_size, void *buf_out, u16 *out_size)
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{
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struct hinic_pfhwdev *pfhwdev = handle;
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enum hinic_cb_state cb_state;
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struct hinic_nic_cb *nic_cb;
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struct hinic_hwdev *hwdev;
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struct hinic_hwif *hwif;
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struct pci_dev *pdev;
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u8 cmd_cb;
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hwdev = &pfhwdev->hwdev;
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hwif = hwdev->hwif;
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pdev = hwif->pdev;
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if ((cmd < HINIC_MGMT_MSG_CMD_BASE) ||
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(cmd >= HINIC_MGMT_MSG_CMD_MAX)) {
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dev_err(&pdev->dev, "unknown L2NIC event, cmd = %d\n", cmd);
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return;
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}
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cmd_cb = cmd - HINIC_MGMT_MSG_CMD_BASE;
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nic_cb = &pfhwdev->nic_cb[cmd_cb];
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cb_state = cmpxchg(&nic_cb->cb_state,
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HINIC_CB_ENABLED,
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HINIC_CB_ENABLED | HINIC_CB_RUNNING);
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if ((cb_state == HINIC_CB_ENABLED) && (nic_cb->handler))
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nic_cb->handler(nic_cb->handle, buf_in,
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in_size, buf_out, out_size);
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else
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dev_err(&pdev->dev, "Unhandled NIC Event %d\n", cmd);
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nic_cb->cb_state &= ~HINIC_CB_RUNNING;
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}
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/**
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* init_pfhwdev - Initialize the extended components of PF
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* @pfhwdev: the HW device for PF
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*
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* Return 0 - success, negative - failure
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**/
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static int init_pfhwdev(struct hinic_pfhwdev *pfhwdev)
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{
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struct hinic_hwdev *hwdev = &pfhwdev->hwdev;
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struct hinic_hwif *hwif = hwdev->hwif;
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struct pci_dev *pdev = hwif->pdev;
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int err;
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err = hinic_pf_to_mgmt_init(&pfhwdev->pf_to_mgmt, hwif);
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if (err) {
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dev_err(&pdev->dev, "Failed to initialize PF to MGMT channel\n");
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return err;
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}
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hinic_register_mgmt_msg_cb(&pfhwdev->pf_to_mgmt, HINIC_MOD_L2NIC,
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pfhwdev, nic_mgmt_msg_handler);
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hinic_set_pf_action(hwif, HINIC_PF_MGMT_ACTIVE);
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return 0;
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}
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/**
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* free_pfhwdev - Free the extended components of PF
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* @pfhwdev: the HW device for PF
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**/
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static void free_pfhwdev(struct hinic_pfhwdev *pfhwdev)
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{
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struct hinic_hwdev *hwdev = &pfhwdev->hwdev;
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hinic_set_pf_action(hwdev->hwif, HINIC_PF_MGMT_INIT);
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hinic_unregister_mgmt_msg_cb(&pfhwdev->pf_to_mgmt, HINIC_MOD_L2NIC);
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hinic_pf_to_mgmt_free(&pfhwdev->pf_to_mgmt);
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}
|
|
|
|
/**
|
|
* hinic_init_hwdev - Initialize the NIC HW
|
|
* @pdev: the NIC pci device
|
|
*
|
|
* Return initialized NIC HW device
|
|
*
|
|
* Initialize the NIC HW device and return a pointer to it
|
|
**/
|
|
struct hinic_hwdev *hinic_init_hwdev(struct pci_dev *pdev)
|
|
{
|
|
struct hinic_pfhwdev *pfhwdev;
|
|
struct hinic_hwdev *hwdev;
|
|
struct hinic_hwif *hwif;
|
|
int err, num_aeqs;
|
|
|
|
hwif = devm_kzalloc(&pdev->dev, sizeof(*hwif), GFP_KERNEL);
|
|
if (!hwif)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
err = hinic_init_hwif(hwif, pdev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Failed to init HW interface\n");
|
|
return ERR_PTR(err);
|
|
}
|
|
|
|
if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {
|
|
dev_err(&pdev->dev, "Unsupported PCI Function type\n");
|
|
err = -EFAULT;
|
|
goto err_func_type;
|
|
}
|
|
|
|
pfhwdev = devm_kzalloc(&pdev->dev, sizeof(*pfhwdev), GFP_KERNEL);
|
|
if (!pfhwdev) {
|
|
err = -ENOMEM;
|
|
goto err_pfhwdev_alloc;
|
|
}
|
|
|
|
hwdev = &pfhwdev->hwdev;
|
|
hwdev->hwif = hwif;
|
|
|
|
err = init_msix(hwdev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Failed to init msix\n");
|
|
goto err_init_msix;
|
|
}
|
|
|
|
num_aeqs = HINIC_HWIF_NUM_AEQS(hwif);
|
|
|
|
err = hinic_aeqs_init(&hwdev->aeqs, hwif, num_aeqs,
|
|
HINIC_DEFAULT_AEQ_LEN, HINIC_EQ_PAGE_SIZE,
|
|
hwdev->msix_entries);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Failed to init async event queues\n");
|
|
goto err_aeqs_init;
|
|
}
|
|
|
|
err = init_pfhwdev(pfhwdev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Failed to init PF HW device\n");
|
|
goto err_init_pfhwdev;
|
|
}
|
|
|
|
err = get_dev_cap(hwdev);
|
|
if (err) {
|
|
dev_err(&pdev->dev, "Failed to get device capabilities\n");
|
|
goto err_dev_cap;
|
|
}
|
|
|
|
return hwdev;
|
|
|
|
err_dev_cap:
|
|
free_pfhwdev(pfhwdev);
|
|
|
|
err_init_pfhwdev:
|
|
hinic_aeqs_free(&hwdev->aeqs);
|
|
|
|
err_aeqs_init:
|
|
disable_msix(hwdev);
|
|
|
|
err_init_msix:
|
|
err_pfhwdev_alloc:
|
|
err_func_type:
|
|
hinic_free_hwif(hwif);
|
|
return ERR_PTR(err);
|
|
}
|
|
|
|
/**
|
|
* hinic_free_hwdev - Free the NIC HW device
|
|
* @hwdev: the NIC HW device
|
|
**/
|
|
void hinic_free_hwdev(struct hinic_hwdev *hwdev)
|
|
{
|
|
struct hinic_pfhwdev *pfhwdev = container_of(hwdev,
|
|
struct hinic_pfhwdev,
|
|
hwdev);
|
|
|
|
free_pfhwdev(pfhwdev);
|
|
|
|
hinic_aeqs_free(&hwdev->aeqs);
|
|
|
|
disable_msix(hwdev);
|
|
|
|
hinic_free_hwif(hwdev->hwif);
|
|
}
|
|
|
|
/**
|
|
* hinic_hwdev_num_qps - return the number QPs available for use
|
|
* @hwdev: the NIC HW device
|
|
*
|
|
* Return number QPs available for use
|
|
**/
|
|
int hinic_hwdev_num_qps(struct hinic_hwdev *hwdev)
|
|
{
|
|
struct hinic_cap *nic_cap = &hwdev->nic_cap;
|
|
|
|
return nic_cap->num_qps;
|
|
}
|
|
|
|
/**
|
|
* hinic_hwdev_get_sq - get SQ
|
|
* @hwdev: the NIC HW device
|
|
* @i: the position of the SQ
|
|
*
|
|
* Return: the SQ in the i position
|
|
**/
|
|
struct hinic_sq *hinic_hwdev_get_sq(struct hinic_hwdev *hwdev, int i)
|
|
{
|
|
struct hinic_func_to_io *func_to_io = &hwdev->func_to_io;
|
|
struct hinic_qp *qp = &func_to_io->qps[i];
|
|
|
|
if (i >= hinic_hwdev_num_qps(hwdev))
|
|
return NULL;
|
|
|
|
return &qp->sq;
|
|
}
|
|
|
|
/**
|
|
* hinic_hwdev_get_sq - get RQ
|
|
* @hwdev: the NIC HW device
|
|
* @i: the position of the RQ
|
|
*
|
|
* Return: the RQ in the i position
|
|
**/
|
|
struct hinic_rq *hinic_hwdev_get_rq(struct hinic_hwdev *hwdev, int i)
|
|
{
|
|
struct hinic_func_to_io *func_to_io = &hwdev->func_to_io;
|
|
struct hinic_qp *qp = &func_to_io->qps[i];
|
|
|
|
if (i >= hinic_hwdev_num_qps(hwdev))
|
|
return NULL;
|
|
|
|
return &qp->rq;
|
|
}
|