mirror of https://gitee.com/openkylin/linux.git
73100e79c7
IDT VersaClock 6 5P49V6901 has 4 clock outputs, 4 fractional dividers. Input clock source can be taken from either external crystal or from external reference clock. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexey Firago <alexey_firago@mentor.com> Cc: Rob Herring <robh@kernel.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: linux-renesas-soc@vger.kernel.org Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> |
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| .. | ||
| bindings | ||
| 00-INDEX | ||
| booting-without-of.txt | ||
| changesets.txt | ||
| dynamic-resolution-notes.txt | ||
| of_unittest.txt | ||
| overlay-notes.txt | ||
| todo.txt | ||
| usage-model.txt | ||