mirror of https://gitee.com/openkylin/linux.git
f629ba2c04
This patch focuses on clock setting for RK3288 mmc controller. In RK3288 mmc controller, CLKDIV register can only be set 0 or 1, and if DDR 8bit mode, CLKDIV register must be set 1. Signed-off-by: Addy Ke <addy.ke@rock-chips.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> |
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bindings | ||
00-INDEX | ||
booting-without-of.txt | ||
changesets.txt | ||
todo.txt | ||
usage-model.txt |