linux/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml

134 lines
2.6 KiB
YAML

# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/snps,dw-apb-ssi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Synopsys DesignWare AMBA 2.0 Synchronous Serial Interface
maintainers:
- Mark Brown <broonie@kernel.org>
allOf:
- $ref: "spi-controller.yaml#"
- if:
properties:
compatible:
contains:
enum:
- mscc,ocelot-spi
- mscc,jaguar2-spi
then:
properties:
reg:
minItems: 2
properties:
compatible:
oneOf:
- description: Generic DW SPI Controller
enum:
- snps,dw-apb-ssi
- snps,dwc-ssi-1.01a
- description: Microsemi Ocelot/Jaguar2 SoC SPI Controller
items:
- enum:
- mscc,ocelot-spi
- mscc,jaguar2-spi
- const: snps,dw-apb-ssi
- description: Amazon Alpine SPI Controller
const: amazon,alpine-dw-apb-ssi
- description: Renesas RZ/N1 SPI Controller
items:
- const: renesas,rzn1-spi
- const: snps,dw-apb-ssi
- description: Intel Keem Bay SPI Controller
const: intel,keembay-ssi
reg:
minItems: 1
items:
- description: DW APB SSI controller memory mapped registers
- description: SPI MST region map
interrupts:
maxItems: 1
clocks:
minItems: 1
items:
- description: SPI Controller reference clock source
- description: APB interface clock source
clock-names:
minItems: 1
items:
- const: ssi_clk
- const: pclk
resets:
maxItems: 1
reset-names:
const: spi
reg-io-width:
$ref: /schemas/types.yaml#/definitions/uint32
description: I/O register width (in bytes) implemented by this device
default: 4
enum: [ 2, 4 ]
num-cs:
default: 4
minimum: 1
maximum: 4
dmas:
items:
- description: TX DMA Channel
- description: RX DMA Channel
dma-names:
items:
- const: tx
- const: rx
patternProperties:
"^.*@[0-9a-f]+$":
type: object
properties:
reg:
minimum: 0
maximum: 3
spi-rx-bus-width:
const: 1
spi-tx-bus-width:
const: 1
unevaluatedProperties: false
required:
- compatible
- reg
- "#address-cells"
- "#size-cells"
- interrupts
- clocks
examples:
- |
spi@fff00000 {
compatible = "snps,dw-apb-ssi";
reg = <0xfff00000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 154 4>;
clocks = <&spi_m_clk>;
num-cs = <2>;
cs-gpios = <&gpio0 13 0>,
<&gpio0 14 0>;
};
...