mirror of https://gitee.com/openkylin/linux.git
b64c4c937d
Since the arch/powerpc PCI subsystem now does a complete re-assignment of the resources, we can move from the unconditional PCIe PHY reset to the conditional version. Now the PHY is only reset, if no link is established yet. An additional PHY reset (one is already done in U-Boot) leads to problems with some Atheros PCIe boards and some HP FPGA PCIe designs. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com> |
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