Jerome Brunet b778f7451a clk: meson8b: add the mplls clocks 0, 1 and 2 ... Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20170309104154.28295-8-jbrunet@baylibre.com		2017-03-27 12:30:27 -07:00
..
Kconfig	clk: gxbb: add AmLogic GXBB clk controller driver	2016-06-22 18:07:31 -07:00
Makefile	clk: meson: Rename meson8b-clkc.c to reflect gxbb naming convention	2016-09-01 17:31:44 -07:00
clk-cpu.c	clk: meson8b: clean up cpu clocks	2016-06-22 18:02:35 -07:00
clk-mpll.c	clk: meson: mpll: add rw operation	2017-03-27 12:30:18 -07:00
clk-pll.c	clk: meson: fractional pll support	2016-06-22 18:05:47 -07:00
clkc.h	clk: meson: mpll: add rw operation	2017-03-27 12:30:18 -07:00
gxbb-aoclk.c	clk: meson: Fix invalid use of sizeof in gxbb_aoclkc_probe()	2016-08-24 00:55:13 -07:00
gxbb.c	clk: meson: gxbb: mpll: use rw operation	2017-03-27 12:30:22 -07:00
gxbb.h	clk: gxbb: fix CLKID_ETH defined twice	2017-01-27 10:56:57 -08:00
meson8b.c	clk: meson8b: add the mplls clocks 0, 1 and 2	2017-03-27 12:30:27 -07:00
meson8b.h	clk: meson8b: add the mplls clocks 0, 1 and 2	2017-03-27 12:30:27 -07:00