mirror of https://gitee.com/openkylin/linux.git
513 lines
12 KiB
C
513 lines
12 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Microsemi SoCs pinctrl driver
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*
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* Author: <alexandre.belloni@free-electrons.com>
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* License: Dual MIT/GPL
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* Copyright (c) 2017 Microsemi Corporation
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*/
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#include <linux/gpio/driver.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/of_device.h>
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#include <linux/of_platform.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include "core.h"
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#include "pinconf.h"
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#include "pinmux.h"
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#define OCELOT_GPIO_OUT_SET 0x0
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#define OCELOT_GPIO_OUT_CLR 0x4
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#define OCELOT_GPIO_OUT 0x8
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#define OCELOT_GPIO_IN 0xc
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#define OCELOT_GPIO_OE 0x10
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#define OCELOT_GPIO_INTR 0x14
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#define OCELOT_GPIO_INTR_ENA 0x18
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#define OCELOT_GPIO_INTR_IDENT 0x1c
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#define OCELOT_GPIO_ALT0 0x20
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#define OCELOT_GPIO_ALT1 0x24
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#define OCELOT_GPIO_SD_MAP 0x28
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#define OCELOT_PINS 22
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#define OCELOT_FUNC_PER_PIN 4
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enum {
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FUNC_NONE,
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FUNC_GPIO,
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FUNC_IRQ0_IN,
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FUNC_IRQ0_OUT,
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FUNC_IRQ1_IN,
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FUNC_IRQ1_OUT,
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FUNC_MIIM1,
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FUNC_PCI_WAKE,
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FUNC_PTP0,
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FUNC_PTP1,
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FUNC_PTP2,
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FUNC_PTP3,
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FUNC_PWM,
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FUNC_RECO_CLK0,
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FUNC_RECO_CLK1,
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FUNC_SFP0,
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FUNC_SFP1,
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FUNC_SFP2,
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FUNC_SFP3,
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FUNC_SFP4,
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FUNC_SFP5,
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FUNC_SG0,
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FUNC_SI,
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FUNC_TACHO,
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FUNC_TWI,
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FUNC_TWI_SCL_M,
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FUNC_UART,
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FUNC_UART2,
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FUNC_MAX
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};
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static const char *const ocelot_function_names[] = {
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[FUNC_NONE] = "none",
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[FUNC_GPIO] = "gpio",
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[FUNC_IRQ0_IN] = "irq0_in",
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[FUNC_IRQ0_OUT] = "irq0_out",
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[FUNC_IRQ1_IN] = "irq1_in",
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[FUNC_IRQ1_OUT] = "irq1_out",
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[FUNC_MIIM1] = "miim1",
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[FUNC_PCI_WAKE] = "pci_wake",
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[FUNC_PTP0] = "ptp0",
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[FUNC_PTP1] = "ptp1",
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[FUNC_PTP2] = "ptp2",
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[FUNC_PTP3] = "ptp3",
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[FUNC_PWM] = "pwm",
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[FUNC_RECO_CLK0] = "reco_clk0",
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[FUNC_RECO_CLK1] = "reco_clk1",
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[FUNC_SFP0] = "sfp0",
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[FUNC_SFP1] = "sfp1",
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[FUNC_SFP2] = "sfp2",
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[FUNC_SFP3] = "sfp3",
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[FUNC_SFP4] = "sfp4",
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[FUNC_SFP5] = "sfp5",
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[FUNC_SG0] = "sg0",
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[FUNC_SI] = "si",
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[FUNC_TACHO] = "tacho",
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[FUNC_TWI] = "twi",
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[FUNC_TWI_SCL_M] = "twi_scl_m",
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[FUNC_UART] = "uart",
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[FUNC_UART2] = "uart2",
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};
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struct ocelot_pmx_func {
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const char **groups;
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unsigned int ngroups;
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};
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struct ocelot_pin_caps {
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unsigned int pin;
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unsigned char functions[OCELOT_FUNC_PER_PIN];
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};
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struct ocelot_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pctl;
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struct gpio_chip gpio_chip;
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struct regmap *map;
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struct ocelot_pmx_func func[FUNC_MAX];
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};
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#define OCELOT_P(p, f0, f1, f2) \
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static struct ocelot_pin_caps ocelot_pin_##p = { \
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.pin = p, \
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.functions = { \
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FUNC_GPIO, FUNC_##f0, FUNC_##f1, FUNC_##f2, \
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}, \
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}
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OCELOT_P(0, SG0, NONE, NONE);
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OCELOT_P(1, SG0, NONE, NONE);
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OCELOT_P(2, SG0, NONE, NONE);
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OCELOT_P(3, SG0, NONE, NONE);
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OCELOT_P(4, IRQ0_IN, IRQ0_OUT, TWI);
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OCELOT_P(5, IRQ1_IN, IRQ1_OUT, PCI_WAKE);
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OCELOT_P(6, UART, TWI_SCL_M, NONE);
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OCELOT_P(7, UART, TWI_SCL_M, NONE);
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OCELOT_P(8, SI, TWI_SCL_M, IRQ0_OUT);
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OCELOT_P(9, SI, TWI_SCL_M, IRQ1_OUT);
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OCELOT_P(10, PTP2, TWI_SCL_M, SFP0);
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OCELOT_P(11, PTP3, TWI_SCL_M, SFP1);
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OCELOT_P(12, UART2, TWI_SCL_M, SFP2);
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OCELOT_P(13, UART2, TWI_SCL_M, SFP3);
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OCELOT_P(14, MIIM1, TWI_SCL_M, SFP4);
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OCELOT_P(15, MIIM1, TWI_SCL_M, SFP5);
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OCELOT_P(16, TWI, NONE, SI);
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OCELOT_P(17, TWI, TWI_SCL_M, SI);
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OCELOT_P(18, PTP0, TWI_SCL_M, NONE);
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OCELOT_P(19, PTP1, TWI_SCL_M, NONE);
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OCELOT_P(20, RECO_CLK0, TACHO, NONE);
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OCELOT_P(21, RECO_CLK1, PWM, NONE);
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#define OCELOT_PIN(n) { \
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.number = n, \
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.name = "GPIO_"#n, \
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.drv_data = &ocelot_pin_##n \
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}
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static const struct pinctrl_pin_desc ocelot_pins[] = {
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OCELOT_PIN(0),
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OCELOT_PIN(1),
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OCELOT_PIN(2),
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OCELOT_PIN(3),
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OCELOT_PIN(4),
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OCELOT_PIN(5),
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OCELOT_PIN(6),
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OCELOT_PIN(7),
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OCELOT_PIN(8),
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OCELOT_PIN(9),
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OCELOT_PIN(10),
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OCELOT_PIN(11),
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OCELOT_PIN(12),
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OCELOT_PIN(13),
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OCELOT_PIN(14),
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OCELOT_PIN(15),
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OCELOT_PIN(16),
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OCELOT_PIN(17),
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OCELOT_PIN(18),
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OCELOT_PIN(19),
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OCELOT_PIN(20),
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OCELOT_PIN(21),
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};
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static int ocelot_get_functions_count(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(ocelot_function_names);
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}
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static const char *ocelot_get_function_name(struct pinctrl_dev *pctldev,
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unsigned int function)
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{
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return ocelot_function_names[function];
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}
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static int ocelot_get_function_groups(struct pinctrl_dev *pctldev,
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unsigned int function,
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const char *const **groups,
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unsigned *const num_groups)
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{
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struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
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*groups = info->func[function].groups;
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*num_groups = info->func[function].ngroups;
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return 0;
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}
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static int ocelot_pin_function_idx(unsigned int pin, unsigned int function)
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{
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struct ocelot_pin_caps *p = ocelot_pins[pin].drv_data;
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int i;
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for (i = 0; i < OCELOT_FUNC_PER_PIN; i++) {
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if (function == p->functions[i])
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return i;
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}
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return -1;
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}
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static int ocelot_pinmux_set_mux(struct pinctrl_dev *pctldev,
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unsigned int selector, unsigned int group)
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{
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struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
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struct ocelot_pin_caps *pin = ocelot_pins[group].drv_data;
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int f;
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f = ocelot_pin_function_idx(group, selector);
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if (f < 0)
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return -EINVAL;
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/*
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* f is encoded on two bits.
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* bit 0 of f goes in BIT(pin) of ALT0, bit 1 of f goes in BIT(pin) of
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* ALT1
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* This is racy because both registers can't be updated at the same time
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* but it doesn't matter much for now.
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*/
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regmap_update_bits(info->map, OCELOT_GPIO_ALT0, BIT(pin->pin),
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f << pin->pin);
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regmap_update_bits(info->map, OCELOT_GPIO_ALT1, BIT(pin->pin),
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f << (pin->pin - 1));
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return 0;
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}
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static int ocelot_gpio_set_direction(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned int pin, bool input)
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{
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struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
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regmap_update_bits(info->map, OCELOT_GPIO_OE, BIT(pin),
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input ? 0 : BIT(pin));
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return 0;
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}
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static int ocelot_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned int offset)
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{
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struct ocelot_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
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regmap_update_bits(info->map, OCELOT_GPIO_ALT0, BIT(offset), 0);
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regmap_update_bits(info->map, OCELOT_GPIO_ALT1, BIT(offset), 0);
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return 0;
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}
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static const struct pinmux_ops ocelot_pmx_ops = {
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.get_functions_count = ocelot_get_functions_count,
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.get_function_name = ocelot_get_function_name,
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.get_function_groups = ocelot_get_function_groups,
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.set_mux = ocelot_pinmux_set_mux,
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.gpio_set_direction = ocelot_gpio_set_direction,
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.gpio_request_enable = ocelot_gpio_request_enable,
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};
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static int ocelot_pctl_get_groups_count(struct pinctrl_dev *pctldev)
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{
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return ARRAY_SIZE(ocelot_pins);
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}
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static const char *ocelot_pctl_get_group_name(struct pinctrl_dev *pctldev,
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unsigned int group)
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{
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return ocelot_pins[group].name;
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}
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static int ocelot_pctl_get_group_pins(struct pinctrl_dev *pctldev,
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unsigned int group,
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const unsigned int **pins,
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unsigned int *num_pins)
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{
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*pins = &ocelot_pins[group].number;
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*num_pins = 1;
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return 0;
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}
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static const struct pinctrl_ops ocelot_pctl_ops = {
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.get_groups_count = ocelot_pctl_get_groups_count,
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.get_group_name = ocelot_pctl_get_group_name,
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.get_group_pins = ocelot_pctl_get_group_pins,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
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.dt_free_map = pinconf_generic_dt_free_map,
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};
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static struct pinctrl_desc ocelot_desc = {
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.name = "ocelot-pinctrl",
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.pins = ocelot_pins,
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.npins = ARRAY_SIZE(ocelot_pins),
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.pctlops = &ocelot_pctl_ops,
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.pmxops = &ocelot_pmx_ops,
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.owner = THIS_MODULE,
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};
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static int ocelot_create_group_func_map(struct device *dev,
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struct ocelot_pinctrl *info)
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{
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u16 pins[ARRAY_SIZE(ocelot_pins)];
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int f, npins, i;
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for (f = 0; f < FUNC_MAX; f++) {
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for (npins = 0, i = 0; i < ARRAY_SIZE(ocelot_pins); i++) {
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if (ocelot_pin_function_idx(i, f) >= 0)
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pins[npins++] = i;
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}
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info->func[f].ngroups = npins;
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info->func[f].groups = devm_kcalloc(dev,
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npins,
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sizeof(char *),
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GFP_KERNEL);
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if (!info->func[f].groups)
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return -ENOMEM;
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for (i = 0; i < npins; i++)
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info->func[f].groups[i] = ocelot_pins[pins[i]].name;
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}
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return 0;
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}
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static int ocelot_pinctrl_register(struct platform_device *pdev,
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struct ocelot_pinctrl *info)
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{
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int ret;
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ret = ocelot_create_group_func_map(&pdev->dev, info);
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if (ret) {
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dev_err(&pdev->dev, "Unable to create group func map.\n");
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return ret;
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}
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info->pctl = devm_pinctrl_register(&pdev->dev, &ocelot_desc, info);
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if (IS_ERR(info->pctl)) {
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dev_err(&pdev->dev, "Failed to register pinctrl\n");
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return PTR_ERR(info->pctl);
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}
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return 0;
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}
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static int ocelot_gpio_get(struct gpio_chip *chip, unsigned int offset)
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{
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struct ocelot_pinctrl *info = gpiochip_get_data(chip);
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unsigned int val;
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regmap_read(info->map, OCELOT_GPIO_IN, &val);
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return !!(val & BIT(offset));
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}
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static void ocelot_gpio_set(struct gpio_chip *chip, unsigned int offset,
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int value)
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{
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struct ocelot_pinctrl *info = gpiochip_get_data(chip);
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if (value)
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regmap_write(info->map, OCELOT_GPIO_OUT_SET, BIT(offset));
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else
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regmap_write(info->map, OCELOT_GPIO_OUT_CLR, BIT(offset));
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}
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static int ocelot_gpio_get_direction(struct gpio_chip *chip,
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unsigned int offset)
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{
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struct ocelot_pinctrl *info = gpiochip_get_data(chip);
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unsigned int val;
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regmap_read(info->map, OCELOT_GPIO_OE, &val);
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return !(val & BIT(offset));
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}
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static int ocelot_gpio_direction_input(struct gpio_chip *chip,
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unsigned int offset)
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{
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return pinctrl_gpio_direction_input(chip->base + offset);
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}
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static int ocelot_gpio_direction_output(struct gpio_chip *chip,
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unsigned int offset, int value)
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{
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struct ocelot_pinctrl *info = gpiochip_get_data(chip);
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unsigned int pin = BIT(offset);
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if (value)
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regmap_write(info->map, OCELOT_GPIO_OUT_SET, pin);
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else
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regmap_write(info->map, OCELOT_GPIO_OUT_CLR, pin);
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return pinctrl_gpio_direction_output(chip->base + offset);
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}
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static const struct gpio_chip ocelot_gpiolib_chip = {
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.request = gpiochip_generic_request,
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.free = gpiochip_generic_free,
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.set = ocelot_gpio_set,
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.get = ocelot_gpio_get,
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.get_direction = ocelot_gpio_get_direction,
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.direction_input = ocelot_gpio_direction_input,
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.direction_output = ocelot_gpio_direction_output,
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.owner = THIS_MODULE,
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};
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static int ocelot_gpiochip_register(struct platform_device *pdev,
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struct ocelot_pinctrl *info)
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{
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struct gpio_chip *gc;
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int ret;
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info->gpio_chip = ocelot_gpiolib_chip;
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gc = &info->gpio_chip;
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gc->ngpio = OCELOT_PINS;
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gc->parent = &pdev->dev;
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gc->base = 0;
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gc->of_node = info->dev->of_node;
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gc->label = "ocelot-gpio";
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ret = devm_gpiochip_add_data(&pdev->dev, gc, info);
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if (ret)
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return ret;
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/* TODO: this can be used as an irqchip but no board is using that */
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return 0;
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}
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static const struct regmap_config ocelot_pinctrl_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = 0x64,
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};
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static const struct of_device_id ocelot_pinctrl_of_match[] = {
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{ .compatible = "mscc,ocelot-pinctrl" },
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{},
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};
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static int ocelot_pinctrl_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct ocelot_pinctrl *info;
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void __iomem *base;
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int ret;
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info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
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if (!info)
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return -ENOMEM;
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base = devm_ioremap_resource(dev,
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platform_get_resource(pdev, IORESOURCE_MEM, 0));
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if (IS_ERR(base)) {
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dev_err(dev, "Failed to ioremap registers\n");
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return PTR_ERR(base);
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}
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info->map = devm_regmap_init_mmio(dev, base,
|
|
&ocelot_pinctrl_regmap_config);
|
|
if (IS_ERR(info->map)) {
|
|
dev_err(dev, "Failed to create regmap\n");
|
|
return PTR_ERR(info->map);
|
|
}
|
|
dev_set_drvdata(dev, info->map);
|
|
info->dev = dev;
|
|
|
|
ret = ocelot_pinctrl_register(pdev, info);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = ocelot_gpiochip_register(pdev, info);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver ocelot_pinctrl_driver = {
|
|
.driver = {
|
|
.name = "pinctrl-ocelot",
|
|
.of_match_table = of_match_ptr(ocelot_pinctrl_of_match),
|
|
.suppress_bind_attrs = true,
|
|
},
|
|
.probe = ocelot_pinctrl_probe,
|
|
};
|
|
builtin_platform_driver(ocelot_pinctrl_driver);
|