mirror of https://gitee.com/openkylin/linux.git
1458 lines
37 KiB
C
1458 lines
37 KiB
C
/*
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* Blackfin On-Chip Serial Driver
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*
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* Copyright 2006-2008 Analog Devices Inc.
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*
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* Enter bugs at http://blackfin.uclinux.org/
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*
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* Licensed under the GPL-2 or later.
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*/
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#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/platform_device.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/serial_core.h>
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#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
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defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
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#include <linux/kgdb.h>
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#include <asm/irq_regs.h>
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#endif
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#include <asm/gpio.h>
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#include <mach/bfin_serial_5xx.h>
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#ifdef CONFIG_SERIAL_BFIN_DMA
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#include <linux/dma-mapping.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/cacheflush.h>
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#endif
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/* UART name and device definitions */
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#define BFIN_SERIAL_NAME "ttyBF"
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#define BFIN_SERIAL_MAJOR 204
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#define BFIN_SERIAL_MINOR 64
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static struct bfin_serial_port bfin_serial_ports[BFIN_UART_NR_PORTS];
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static int nr_active_ports = ARRAY_SIZE(bfin_serial_resource);
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#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
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defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
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# ifndef CONFIG_SERIAL_BFIN_PIO
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# error KGDB only support UART in PIO mode.
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# endif
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static int kgdboc_port_line;
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static int kgdboc_break_enabled;
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#endif
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/*
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* Setup for console. Argument comes from the menuconfig
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*/
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#define DMA_RX_XCOUNT 512
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#define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
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#define DMA_RX_FLUSH_JIFFIES (HZ / 50)
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#ifdef CONFIG_SERIAL_BFIN_DMA
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static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
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#else
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static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
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#endif
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static void bfin_serial_reset_irda(struct uart_port *port);
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#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
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defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
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static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
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{
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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if (uart->cts_pin < 0)
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
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/* CTS PIN is negative assertive. */
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if (UART_GET_CTS(uart))
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
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else
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return TIOCM_DSR | TIOCM_CAR;
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}
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static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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if (uart->rts_pin < 0)
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return;
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/* RTS PIN is negative assertive. */
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if (mctrl & TIOCM_RTS)
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UART_ENABLE_RTS(uart);
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else
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UART_DISABLE_RTS(uart);
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}
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/*
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* Handle any change of modem status signal.
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*/
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static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
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{
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struct bfin_serial_port *uart = dev_id;
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unsigned int status;
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status = bfin_serial_get_mctrl(&uart->port);
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uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
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#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
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uart->scts = 1;
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UART_CLEAR_SCTS(uart);
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UART_CLEAR_IER(uart, EDSSI);
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#endif
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return IRQ_HANDLED;
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}
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#else
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static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
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{
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return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
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}
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static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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}
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#endif
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/*
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* interrupts are disabled on entry
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*/
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static void bfin_serial_stop_tx(struct uart_port *port)
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{
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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#ifdef CONFIG_SERIAL_BFIN_DMA
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struct circ_buf *xmit = &uart->port.info->xmit;
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#endif
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while (!(UART_GET_LSR(uart) & TEMT))
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cpu_relax();
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#ifdef CONFIG_SERIAL_BFIN_DMA
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disable_dma(uart->tx_dma_channel);
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xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
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uart->port.icount.tx += uart->tx_count;
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uart->tx_count = 0;
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uart->tx_done = 1;
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#else
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#ifdef CONFIG_BF54x
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/* Clear TFI bit */
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UART_PUT_LSR(uart, TFI);
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#endif
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UART_CLEAR_IER(uart, ETBEI);
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#endif
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}
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/*
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* port is locked and interrupts are disabled
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*/
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static void bfin_serial_start_tx(struct uart_port *port)
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{
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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struct tty_struct *tty = uart->port.info->port.tty;
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#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
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if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
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uart->scts = 0;
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uart_handle_cts_change(&uart->port, uart->scts);
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}
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#endif
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/*
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* To avoid losting RX interrupt, we reset IR function
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* before sending data.
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*/
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if (tty->termios->c_line == N_IRDA)
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bfin_serial_reset_irda(port);
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#ifdef CONFIG_SERIAL_BFIN_DMA
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if (uart->tx_done)
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bfin_serial_dma_tx_chars(uart);
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#else
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UART_SET_IER(uart, ETBEI);
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bfin_serial_tx_chars(uart);
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#endif
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}
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/*
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* Interrupts are enabled
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*/
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static void bfin_serial_stop_rx(struct uart_port *port)
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{
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struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
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UART_CLEAR_IER(uart, ERBFI);
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}
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/*
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* Set the modem control timer to fire immediately.
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*/
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static void bfin_serial_enable_ms(struct uart_port *port)
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{
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}
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#if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
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# define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
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# define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
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#else
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# define UART_GET_ANOMALY_THRESHOLD(uart) 0
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# define UART_SET_ANOMALY_THRESHOLD(uart, v)
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#endif
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#ifdef CONFIG_SERIAL_BFIN_PIO
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static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
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{
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struct tty_struct *tty = NULL;
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unsigned int status, ch, flg;
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static struct timeval anomaly_start = { .tv_sec = 0 };
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status = UART_GET_LSR(uart);
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UART_CLEAR_LSR(uart);
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ch = UART_GET_CHAR(uart);
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uart->port.icount.rx++;
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#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
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defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
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if (kgdb_connected && kgdboc_port_line == uart->port.line)
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if (ch == 0x3) {/* Ctrl + C */
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kgdb_breakpoint();
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return;
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}
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if (!uart->port.info || !uart->port.info->port.tty)
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return;
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#endif
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tty = uart->port.info->port.tty;
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if (ANOMALY_05000363) {
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/* The BF533 (and BF561) family of processors have a nice anomaly
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* where they continuously generate characters for a "single" break.
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* We have to basically ignore this flood until the "next" valid
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* character comes across. Due to the nature of the flood, it is
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* not possible to reliably catch bytes that are sent too quickly
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* after this break. So application code talking to the Blackfin
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* which sends a break signal must allow at least 1.5 character
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* times after the end of the break for things to stabilize. This
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* timeout was picked as it must absolutely be larger than 1
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* character time +/- some percent. So 1.5 sounds good. All other
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* Blackfin families operate properly. Woo.
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*/
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if (anomaly_start.tv_sec) {
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struct timeval curr;
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suseconds_t usecs;
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if ((~ch & (~ch + 1)) & 0xff)
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goto known_good_char;
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do_gettimeofday(&curr);
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if (curr.tv_sec - anomaly_start.tv_sec > 1)
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goto known_good_char;
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usecs = 0;
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if (curr.tv_sec != anomaly_start.tv_sec)
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usecs += USEC_PER_SEC;
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usecs += curr.tv_usec - anomaly_start.tv_usec;
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if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
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goto known_good_char;
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if (ch)
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anomaly_start.tv_sec = 0;
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else
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anomaly_start = curr;
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return;
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known_good_char:
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status &= ~BI;
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anomaly_start.tv_sec = 0;
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}
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}
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if (status & BI) {
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if (ANOMALY_05000363)
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if (bfin_revid() < 5)
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do_gettimeofday(&anomaly_start);
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uart->port.icount.brk++;
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if (uart_handle_break(&uart->port))
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goto ignore_char;
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status &= ~(PE | FE);
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}
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if (status & PE)
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uart->port.icount.parity++;
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if (status & OE)
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uart->port.icount.overrun++;
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if (status & FE)
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uart->port.icount.frame++;
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status &= uart->port.read_status_mask;
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if (status & BI)
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flg = TTY_BREAK;
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else if (status & PE)
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flg = TTY_PARITY;
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else if (status & FE)
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flg = TTY_FRAME;
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else
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flg = TTY_NORMAL;
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if (uart_handle_sysrq_char(&uart->port, ch))
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goto ignore_char;
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uart_insert_char(&uart->port, status, OE, ch, flg);
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ignore_char:
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tty_flip_buffer_push(tty);
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}
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static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
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{
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struct circ_buf *xmit = &uart->port.info->xmit;
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if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
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#ifdef CONFIG_BF54x
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/* Clear TFI bit */
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UART_PUT_LSR(uart, TFI);
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#endif
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/* Anomaly notes:
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* 05000215 - we always clear ETBEI within last UART TX
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* interrupt to end a string. It is always set
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* when start a new tx.
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*/
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UART_CLEAR_IER(uart, ETBEI);
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return;
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}
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if (uart->port.x_char) {
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UART_PUT_CHAR(uart, uart->port.x_char);
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uart->port.icount.tx++;
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uart->port.x_char = 0;
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}
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while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
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UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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uart->port.icount.tx++;
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SSYNC();
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(&uart->port);
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}
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static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
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{
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struct bfin_serial_port *uart = dev_id;
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spin_lock(&uart->port.lock);
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while (UART_GET_LSR(uart) & DR)
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bfin_serial_rx_chars(uart);
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spin_unlock(&uart->port.lock);
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return IRQ_HANDLED;
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}
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static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
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{
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struct bfin_serial_port *uart = dev_id;
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#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
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if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
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uart->scts = 0;
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uart_handle_cts_change(&uart->port, uart->scts);
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}
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#endif
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spin_lock(&uart->port.lock);
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if (UART_GET_LSR(uart) & THRE)
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bfin_serial_tx_chars(uart);
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spin_unlock(&uart->port.lock);
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return IRQ_HANDLED;
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}
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#endif
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#ifdef CONFIG_SERIAL_BFIN_DMA
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static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
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{
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struct circ_buf *xmit = &uart->port.info->xmit;
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uart->tx_done = 0;
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if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
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uart->tx_count = 0;
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uart->tx_done = 1;
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return;
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}
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if (uart->port.x_char) {
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UART_PUT_CHAR(uart, uart->port.x_char);
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uart->port.icount.tx++;
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uart->port.x_char = 0;
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}
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uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
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if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
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uart->tx_count = UART_XMIT_SIZE - xmit->tail;
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blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
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(unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
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set_dma_config(uart->tx_dma_channel,
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set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
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INTR_ON_BUF,
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DIMENSION_LINEAR,
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DATA_SIZE_8,
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DMA_SYNC_RESTART));
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set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
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set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
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set_dma_x_modify(uart->tx_dma_channel, 1);
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SSYNC();
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enable_dma(uart->tx_dma_channel);
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UART_SET_IER(uart, ETBEI);
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}
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static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
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{
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struct tty_struct *tty = uart->port.info->port.tty;
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int i, flg, status;
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status = UART_GET_LSR(uart);
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UART_CLEAR_LSR(uart);
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uart->port.icount.rx +=
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CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
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UART_XMIT_SIZE);
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if (status & BI) {
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uart->port.icount.brk++;
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if (uart_handle_break(&uart->port))
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goto dma_ignore_char;
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status &= ~(PE | FE);
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}
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if (status & PE)
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uart->port.icount.parity++;
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if (status & OE)
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uart->port.icount.overrun++;
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if (status & FE)
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uart->port.icount.frame++;
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status &= uart->port.read_status_mask;
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if (status & BI)
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flg = TTY_BREAK;
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else if (status & PE)
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flg = TTY_PARITY;
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else if (status & FE)
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flg = TTY_FRAME;
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else
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flg = TTY_NORMAL;
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for (i = uart->rx_dma_buf.tail; ; i++) {
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if (i >= UART_XMIT_SIZE)
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i = 0;
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if (i == uart->rx_dma_buf.head)
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break;
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if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
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uart_insert_char(&uart->port, status, OE,
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uart->rx_dma_buf.buf[i], flg);
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}
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dma_ignore_char:
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tty_flip_buffer_push(tty);
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}
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void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
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{
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int x_pos, pos;
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dma_disable_irq(uart->rx_dma_channel);
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spin_lock_bh(&uart->port.lock);
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/* 2D DMA RX buffer ring is used. Because curr_y_count and
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* curr_x_count can't be read as an atomic operation,
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* curr_y_count should be read before curr_x_count. When
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* curr_x_count is read, curr_y_count may already indicate
|
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* next buffer line. But, the position calculated here is
|
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* still indicate the old line. The wrong position data may
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* be smaller than current buffer tail, which cause garbages
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* are received if it is not prohibit.
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*/
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uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
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x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
|
|
uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
|
|
if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
|
|
uart->rx_dma_nrows = 0;
|
|
x_pos = DMA_RX_XCOUNT - x_pos;
|
|
if (x_pos == DMA_RX_XCOUNT)
|
|
x_pos = 0;
|
|
|
|
pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
|
|
/* Ignore receiving data if new position is in the same line of
|
|
* current buffer tail and small.
|
|
*/
|
|
if (pos > uart->rx_dma_buf.tail ||
|
|
uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
|
|
uart->rx_dma_buf.head = pos;
|
|
bfin_serial_dma_rx_chars(uart);
|
|
uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
|
|
}
|
|
|
|
spin_unlock_bh(&uart->port.lock);
|
|
dma_enable_irq(uart->rx_dma_channel);
|
|
|
|
mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
|
|
}
|
|
|
|
static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
|
|
{
|
|
struct bfin_serial_port *uart = dev_id;
|
|
struct circ_buf *xmit = &uart->port.info->xmit;
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
|
if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
|
|
uart->scts = 0;
|
|
uart_handle_cts_change(&uart->port, uart->scts);
|
|
}
|
|
#endif
|
|
|
|
spin_lock(&uart->port.lock);
|
|
if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
|
|
disable_dma(uart->tx_dma_channel);
|
|
clear_dma_irqstat(uart->tx_dma_channel);
|
|
/* Anomaly notes:
|
|
* 05000215 - we always clear ETBEI within last UART TX
|
|
* interrupt to end a string. It is always set
|
|
* when start a new tx.
|
|
*/
|
|
UART_CLEAR_IER(uart, ETBEI);
|
|
xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
|
|
uart->port.icount.tx += uart->tx_count;
|
|
|
|
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
|
uart_write_wakeup(&uart->port);
|
|
|
|
bfin_serial_dma_tx_chars(uart);
|
|
}
|
|
|
|
spin_unlock(&uart->port.lock);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
|
|
{
|
|
struct bfin_serial_port *uart = dev_id;
|
|
unsigned short irqstat;
|
|
int x_pos, pos;
|
|
|
|
spin_lock(&uart->port.lock);
|
|
irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
|
|
clear_dma_irqstat(uart->rx_dma_channel);
|
|
|
|
uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
|
|
x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
|
|
uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
|
|
if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
|
|
uart->rx_dma_nrows = 0;
|
|
|
|
pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
|
|
if (pos > uart->rx_dma_buf.tail ||
|
|
uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
|
|
uart->rx_dma_buf.head = pos;
|
|
bfin_serial_dma_rx_chars(uart);
|
|
uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
|
|
}
|
|
|
|
spin_unlock(&uart->port.lock);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
#endif
|
|
|
|
/*
|
|
* Return TIOCSER_TEMT when transmitter is not busy.
|
|
*/
|
|
static unsigned int bfin_serial_tx_empty(struct uart_port *port)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
unsigned short lsr;
|
|
|
|
lsr = UART_GET_LSR(uart);
|
|
if (lsr & TEMT)
|
|
return TIOCSER_TEMT;
|
|
else
|
|
return 0;
|
|
}
|
|
|
|
static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
u16 lcr = UART_GET_LCR(uart);
|
|
if (break_state)
|
|
lcr |= SB;
|
|
else
|
|
lcr &= ~SB;
|
|
UART_PUT_LCR(uart, lcr);
|
|
SSYNC();
|
|
}
|
|
|
|
static int bfin_serial_startup(struct uart_port *port)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_DMA
|
|
dma_addr_t dma_handle;
|
|
|
|
if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
|
|
printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
|
|
return -EBUSY;
|
|
}
|
|
|
|
if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
|
|
printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
|
|
free_dma(uart->rx_dma_channel);
|
|
return -EBUSY;
|
|
}
|
|
|
|
set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
|
|
set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
|
|
|
|
uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
|
|
uart->rx_dma_buf.head = 0;
|
|
uart->rx_dma_buf.tail = 0;
|
|
uart->rx_dma_nrows = 0;
|
|
|
|
set_dma_config(uart->rx_dma_channel,
|
|
set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
|
|
INTR_ON_ROW, DIMENSION_2D,
|
|
DATA_SIZE_8,
|
|
DMA_SYNC_RESTART));
|
|
set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
|
|
set_dma_x_modify(uart->rx_dma_channel, 1);
|
|
set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
|
|
set_dma_y_modify(uart->rx_dma_channel, 1);
|
|
set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
|
|
enable_dma(uart->rx_dma_channel);
|
|
|
|
uart->rx_dma_timer.data = (unsigned long)(uart);
|
|
uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
|
|
uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
|
|
add_timer(&(uart->rx_dma_timer));
|
|
#else
|
|
# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
|
|
defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
|
|
if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
|
|
kgdboc_break_enabled = 0;
|
|
else {
|
|
# endif
|
|
if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
|
|
"BFIN_UART_RX", uart)) {
|
|
printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
|
|
return -EBUSY;
|
|
}
|
|
|
|
if (request_irq
|
|
(uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
|
|
"BFIN_UART_TX", uart)) {
|
|
printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
|
|
free_irq(uart->port.irq, uart);
|
|
return -EBUSY;
|
|
}
|
|
|
|
# ifdef CONFIG_BF54x
|
|
{
|
|
unsigned uart_dma_ch_rx, uart_dma_ch_tx;
|
|
|
|
switch (uart->port.irq) {
|
|
case IRQ_UART3_RX:
|
|
uart_dma_ch_rx = CH_UART3_RX;
|
|
uart_dma_ch_tx = CH_UART3_TX;
|
|
break;
|
|
case IRQ_UART2_RX:
|
|
uart_dma_ch_rx = CH_UART2_RX;
|
|
uart_dma_ch_tx = CH_UART2_TX;
|
|
break;
|
|
default:
|
|
uart_dma_ch_rx = uart_dma_ch_tx = 0;
|
|
break;
|
|
};
|
|
|
|
if (uart_dma_ch_rx &&
|
|
request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
|
|
printk(KERN_NOTICE"Fail to attach UART interrupt\n");
|
|
free_irq(uart->port.irq, uart);
|
|
free_irq(uart->port.irq + 1, uart);
|
|
return -EBUSY;
|
|
}
|
|
if (uart_dma_ch_tx &&
|
|
request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
|
|
printk(KERN_NOTICE "Fail to attach UART interrupt\n");
|
|
free_dma(uart_dma_ch_rx);
|
|
free_irq(uart->port.irq, uart);
|
|
free_irq(uart->port.irq + 1, uart);
|
|
return -EBUSY;
|
|
}
|
|
}
|
|
# endif
|
|
# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
|
|
defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
|
|
}
|
|
# endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
|
if (uart->cts_pin >= 0) {
|
|
if (request_irq(gpio_to_irq(uart->cts_pin),
|
|
bfin_serial_mctrl_cts_int,
|
|
IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
|
|
IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
|
|
uart->cts_pin = -1;
|
|
pr_info("Unable to attach BlackFin UART CTS interrupt.\
|
|
So, disable it.\n");
|
|
}
|
|
}
|
|
if (uart->rts_pin >= 0) {
|
|
gpio_request(uart->rts_pin, DRIVER_NAME);
|
|
gpio_direction_output(uart->rts_pin, 0);
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
|
if (request_irq(uart->status_irq,
|
|
bfin_serial_mctrl_cts_int,
|
|
IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
|
|
pr_info("Unable to attach BlackFin UART Modem \
|
|
Status interrupt.\n");
|
|
}
|
|
|
|
if (uart->cts_pin >= 0) {
|
|
gpio_request(uart->cts_pin, DRIVER_NAME);
|
|
gpio_direction_output(uart->cts_pin, 1);
|
|
}
|
|
if (uart->rts_pin >= 0) {
|
|
gpio_request(uart->rts_pin, DRIVER_NAME);
|
|
gpio_direction_output(uart->rts_pin, 0);
|
|
}
|
|
|
|
/* CTS RTS PINs are negative assertive. */
|
|
UART_PUT_MCR(uart, ACTS);
|
|
UART_SET_IER(uart, EDSSI);
|
|
#endif
|
|
|
|
UART_SET_IER(uart, ERBFI);
|
|
return 0;
|
|
}
|
|
|
|
static void bfin_serial_shutdown(struct uart_port *port)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_DMA
|
|
disable_dma(uart->tx_dma_channel);
|
|
free_dma(uart->tx_dma_channel);
|
|
disable_dma(uart->rx_dma_channel);
|
|
free_dma(uart->rx_dma_channel);
|
|
del_timer(&(uart->rx_dma_timer));
|
|
dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
|
|
#else
|
|
#ifdef CONFIG_BF54x
|
|
switch (uart->port.irq) {
|
|
case IRQ_UART3_RX:
|
|
free_dma(CH_UART3_RX);
|
|
free_dma(CH_UART3_TX);
|
|
break;
|
|
case IRQ_UART2_RX:
|
|
free_dma(CH_UART2_RX);
|
|
free_dma(CH_UART2_TX);
|
|
break;
|
|
default:
|
|
break;
|
|
};
|
|
#endif
|
|
free_irq(uart->port.irq, uart);
|
|
free_irq(uart->port.irq+1, uart);
|
|
#endif
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
|
|
if (uart->cts_pin >= 0)
|
|
free_irq(gpio_to_irq(uart->cts_pin), uart);
|
|
if (uart->rts_pin >= 0)
|
|
gpio_free(uart->rts_pin);
|
|
#endif
|
|
#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
|
|
if (uart->cts_pin >= 0)
|
|
gpio_free(uart->cts_pin);
|
|
if (uart->rts_pin >= 0)
|
|
gpio_free(uart->rts_pin);
|
|
if (UART_GET_IER(uart) && EDSSI)
|
|
free_irq(uart->status_irq, uart);
|
|
#endif
|
|
}
|
|
|
|
static void
|
|
bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
struct ktermios *old)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
unsigned long flags;
|
|
unsigned int baud, quot;
|
|
unsigned short val, ier, lcr = 0;
|
|
|
|
switch (termios->c_cflag & CSIZE) {
|
|
case CS8:
|
|
lcr = WLS(8);
|
|
break;
|
|
case CS7:
|
|
lcr = WLS(7);
|
|
break;
|
|
case CS6:
|
|
lcr = WLS(6);
|
|
break;
|
|
case CS5:
|
|
lcr = WLS(5);
|
|
break;
|
|
default:
|
|
printk(KERN_ERR "%s: word lengh not supported\n",
|
|
__func__);
|
|
}
|
|
|
|
/* Anomaly notes:
|
|
* 05000231 - STOP bit is always set to 1 whatever the user is set.
|
|
*/
|
|
if (termios->c_cflag & CSTOPB) {
|
|
if (ANOMALY_05000231)
|
|
printk(KERN_WARNING "STOP bits other than 1 is not "
|
|
"supported in case of anomaly 05000231.\n");
|
|
else
|
|
lcr |= STB;
|
|
}
|
|
if (termios->c_cflag & PARENB)
|
|
lcr |= PEN;
|
|
if (!(termios->c_cflag & PARODD))
|
|
lcr |= EPS;
|
|
if (termios->c_cflag & CMSPAR)
|
|
lcr |= STP;
|
|
|
|
port->read_status_mask = OE;
|
|
if (termios->c_iflag & INPCK)
|
|
port->read_status_mask |= (FE | PE);
|
|
if (termios->c_iflag & (BRKINT | PARMRK))
|
|
port->read_status_mask |= BI;
|
|
|
|
/*
|
|
* Characters to ignore
|
|
*/
|
|
port->ignore_status_mask = 0;
|
|
if (termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= FE | PE;
|
|
if (termios->c_iflag & IGNBRK) {
|
|
port->ignore_status_mask |= BI;
|
|
/*
|
|
* If we're ignoring parity and break indicators,
|
|
* ignore overruns too (for real raw support).
|
|
*/
|
|
if (termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= OE;
|
|
}
|
|
|
|
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
|
|
quot = uart_get_divisor(port, baud) - ANOMALY_05000230;
|
|
spin_lock_irqsave(&uart->port.lock, flags);
|
|
|
|
UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
|
|
|
|
/* Disable UART */
|
|
ier = UART_GET_IER(uart);
|
|
UART_DISABLE_INTS(uart);
|
|
|
|
/* Set DLAB in LCR to Access DLL and DLH */
|
|
UART_SET_DLAB(uart);
|
|
|
|
UART_PUT_DLL(uart, quot & 0xFF);
|
|
UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
|
|
SSYNC();
|
|
|
|
/* Clear DLAB in LCR to Access THR RBR IER */
|
|
UART_CLEAR_DLAB(uart);
|
|
|
|
UART_PUT_LCR(uart, lcr);
|
|
|
|
/* Enable UART */
|
|
UART_ENABLE_INTS(uart, ier);
|
|
|
|
val = UART_GET_GCTL(uart);
|
|
val |= UCEN;
|
|
UART_PUT_GCTL(uart, val);
|
|
|
|
/* Port speed changed, update the per-port timeout. */
|
|
uart_update_timeout(port, termios->c_cflag, baud);
|
|
|
|
spin_unlock_irqrestore(&uart->port.lock, flags);
|
|
}
|
|
|
|
static const char *bfin_serial_type(struct uart_port *port)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
|
|
}
|
|
|
|
/*
|
|
* Release the memory region(s) being used by 'port'.
|
|
*/
|
|
static void bfin_serial_release_port(struct uart_port *port)
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Request the memory region(s) being used by 'port'.
|
|
*/
|
|
static int bfin_serial_request_port(struct uart_port *port)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Configure/autoconfigure the port.
|
|
*/
|
|
static void bfin_serial_config_port(struct uart_port *port, int flags)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
if (flags & UART_CONFIG_TYPE &&
|
|
bfin_serial_request_port(&uart->port) == 0)
|
|
uart->port.type = PORT_BFIN;
|
|
}
|
|
|
|
/*
|
|
* Verify the new serial_struct (for TIOCSSERIAL).
|
|
* The only change we allow are to the flags and type, and
|
|
* even then only between PORT_BFIN and PORT_UNKNOWN
|
|
*/
|
|
static int
|
|
bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Enable the IrDA function if tty->ldisc.num is N_IRDA.
|
|
* In other cases, disable IrDA function.
|
|
*/
|
|
static void bfin_serial_set_ldisc(struct uart_port *port)
|
|
{
|
|
int line = port->line;
|
|
unsigned short val;
|
|
|
|
if (line >= port->info->port.tty->driver->num)
|
|
return;
|
|
|
|
switch (port->info->port.tty->termios->c_line) {
|
|
case N_IRDA:
|
|
val = UART_GET_GCTL(&bfin_serial_ports[line]);
|
|
val |= (IREN | RPOLC);
|
|
UART_PUT_GCTL(&bfin_serial_ports[line], val);
|
|
break;
|
|
default:
|
|
val = UART_GET_GCTL(&bfin_serial_ports[line]);
|
|
val &= ~(IREN | RPOLC);
|
|
UART_PUT_GCTL(&bfin_serial_ports[line], val);
|
|
}
|
|
}
|
|
|
|
static void bfin_serial_reset_irda(struct uart_port *port)
|
|
{
|
|
int line = port->line;
|
|
unsigned short val;
|
|
|
|
val = UART_GET_GCTL(&bfin_serial_ports[line]);
|
|
val &= ~(IREN | RPOLC);
|
|
UART_PUT_GCTL(&bfin_serial_ports[line], val);
|
|
SSYNC();
|
|
val |= (IREN | RPOLC);
|
|
UART_PUT_GCTL(&bfin_serial_ports[line], val);
|
|
SSYNC();
|
|
}
|
|
|
|
#ifdef CONFIG_CONSOLE_POLL
|
|
/* Anomaly notes:
|
|
* 05000099 - Because we only use THRE in poll_put and DR in poll_get,
|
|
* losing other bits of UART_LSR is not a problem here.
|
|
*/
|
|
static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
while (!(UART_GET_LSR(uart) & THRE))
|
|
cpu_relax();
|
|
|
|
UART_CLEAR_DLAB(uart);
|
|
UART_PUT_CHAR(uart, (unsigned char)chr);
|
|
}
|
|
|
|
static int bfin_serial_poll_get_char(struct uart_port *port)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
unsigned char chr;
|
|
|
|
while (!(UART_GET_LSR(uart) & DR))
|
|
cpu_relax();
|
|
|
|
UART_CLEAR_DLAB(uart);
|
|
chr = UART_GET_CHAR(uart);
|
|
|
|
return chr;
|
|
}
|
|
#endif
|
|
|
|
#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
|
|
defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
|
|
static void bfin_kgdboc_port_shutdown(struct uart_port *port)
|
|
{
|
|
if (kgdboc_break_enabled) {
|
|
kgdboc_break_enabled = 0;
|
|
bfin_serial_shutdown(port);
|
|
}
|
|
}
|
|
|
|
static int bfin_kgdboc_port_startup(struct uart_port *port)
|
|
{
|
|
kgdboc_port_line = port->line;
|
|
kgdboc_break_enabled = !bfin_serial_startup(port);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static struct uart_ops bfin_serial_pops = {
|
|
.tx_empty = bfin_serial_tx_empty,
|
|
.set_mctrl = bfin_serial_set_mctrl,
|
|
.get_mctrl = bfin_serial_get_mctrl,
|
|
.stop_tx = bfin_serial_stop_tx,
|
|
.start_tx = bfin_serial_start_tx,
|
|
.stop_rx = bfin_serial_stop_rx,
|
|
.enable_ms = bfin_serial_enable_ms,
|
|
.break_ctl = bfin_serial_break_ctl,
|
|
.startup = bfin_serial_startup,
|
|
.shutdown = bfin_serial_shutdown,
|
|
.set_termios = bfin_serial_set_termios,
|
|
.set_ldisc = bfin_serial_set_ldisc,
|
|
.type = bfin_serial_type,
|
|
.release_port = bfin_serial_release_port,
|
|
.request_port = bfin_serial_request_port,
|
|
.config_port = bfin_serial_config_port,
|
|
.verify_port = bfin_serial_verify_port,
|
|
#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
|
|
defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
|
|
.kgdboc_port_startup = bfin_kgdboc_port_startup,
|
|
.kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
|
|
#endif
|
|
#ifdef CONFIG_CONSOLE_POLL
|
|
.poll_put_char = bfin_serial_poll_put_char,
|
|
.poll_get_char = bfin_serial_poll_get_char,
|
|
#endif
|
|
};
|
|
|
|
static void __init bfin_serial_hw_init(void)
|
|
{
|
|
#ifdef CONFIG_SERIAL_BFIN_UART0
|
|
peripheral_request(P_UART0_TX, DRIVER_NAME);
|
|
peripheral_request(P_UART0_RX, DRIVER_NAME);
|
|
#endif
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_UART1
|
|
peripheral_request(P_UART1_TX, DRIVER_NAME);
|
|
peripheral_request(P_UART1_RX, DRIVER_NAME);
|
|
|
|
# if defined(CONFIG_BFIN_UART1_CTSRTS) && defined(CONFIG_BF54x)
|
|
peripheral_request(P_UART1_RTS, DRIVER_NAME);
|
|
peripheral_request(P_UART1_CTS, DRIVER_NAME);
|
|
# endif
|
|
#endif
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_UART2
|
|
peripheral_request(P_UART2_TX, DRIVER_NAME);
|
|
peripheral_request(P_UART2_RX, DRIVER_NAME);
|
|
#endif
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_UART3
|
|
peripheral_request(P_UART3_TX, DRIVER_NAME);
|
|
peripheral_request(P_UART3_RX, DRIVER_NAME);
|
|
|
|
# if defined(CONFIG_BFIN_UART3_CTSRTS) && defined(CONFIG_BF54x)
|
|
peripheral_request(P_UART3_RTS, DRIVER_NAME);
|
|
peripheral_request(P_UART3_CTS, DRIVER_NAME);
|
|
# endif
|
|
#endif
|
|
}
|
|
|
|
static void __init bfin_serial_init_ports(void)
|
|
{
|
|
static int first = 1;
|
|
int i;
|
|
|
|
if (!first)
|
|
return;
|
|
first = 0;
|
|
|
|
bfin_serial_hw_init();
|
|
|
|
for (i = 0; i < nr_active_ports; i++) {
|
|
bfin_serial_ports[i].port.uartclk = get_sclk();
|
|
bfin_serial_ports[i].port.fifosize = BFIN_UART_TX_FIFO_SIZE;
|
|
bfin_serial_ports[i].port.ops = &bfin_serial_pops;
|
|
bfin_serial_ports[i].port.line = i;
|
|
bfin_serial_ports[i].port.iotype = UPIO_MEM;
|
|
bfin_serial_ports[i].port.membase =
|
|
(void __iomem *)bfin_serial_resource[i].uart_base_addr;
|
|
bfin_serial_ports[i].port.mapbase =
|
|
bfin_serial_resource[i].uart_base_addr;
|
|
bfin_serial_ports[i].port.irq =
|
|
bfin_serial_resource[i].uart_irq;
|
|
bfin_serial_ports[i].status_irq =
|
|
bfin_serial_resource[i].uart_status_irq;
|
|
bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
|
|
#ifdef CONFIG_SERIAL_BFIN_DMA
|
|
bfin_serial_ports[i].tx_done = 1;
|
|
bfin_serial_ports[i].tx_count = 0;
|
|
bfin_serial_ports[i].tx_dma_channel =
|
|
bfin_serial_resource[i].uart_tx_dma_channel;
|
|
bfin_serial_ports[i].rx_dma_channel =
|
|
bfin_serial_resource[i].uart_rx_dma_channel;
|
|
init_timer(&(bfin_serial_ports[i].rx_dma_timer));
|
|
#endif
|
|
#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
|
|
defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
|
|
bfin_serial_ports[i].cts_pin =
|
|
bfin_serial_resource[i].uart_cts_pin;
|
|
bfin_serial_ports[i].rts_pin =
|
|
bfin_serial_resource[i].uart_rts_pin;
|
|
#endif
|
|
}
|
|
}
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
|
|
/*
|
|
* If the port was already initialised (eg, by a boot loader),
|
|
* try to determine the current setup.
|
|
*/
|
|
static void __init
|
|
bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
|
|
int *parity, int *bits)
|
|
{
|
|
unsigned short status;
|
|
|
|
status = UART_GET_IER(uart) & (ERBFI | ETBEI);
|
|
if (status == (ERBFI | ETBEI)) {
|
|
/* ok, the port was enabled */
|
|
u16 lcr, dlh, dll;
|
|
|
|
lcr = UART_GET_LCR(uart);
|
|
|
|
*parity = 'n';
|
|
if (lcr & PEN) {
|
|
if (lcr & EPS)
|
|
*parity = 'e';
|
|
else
|
|
*parity = 'o';
|
|
}
|
|
switch (lcr & 0x03) {
|
|
case 0: *bits = 5; break;
|
|
case 1: *bits = 6; break;
|
|
case 2: *bits = 7; break;
|
|
case 3: *bits = 8; break;
|
|
}
|
|
/* Set DLAB in LCR to Access DLL and DLH */
|
|
UART_SET_DLAB(uart);
|
|
|
|
dll = UART_GET_DLL(uart);
|
|
dlh = UART_GET_DLH(uart);
|
|
|
|
/* Clear DLAB in LCR to Access THR RBR IER */
|
|
UART_CLEAR_DLAB(uart);
|
|
|
|
*baud = get_sclk() / (16*(dll | dlh << 8));
|
|
}
|
|
pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
|
|
}
|
|
|
|
static struct uart_driver bfin_serial_reg;
|
|
|
|
static int __init
|
|
bfin_serial_console_setup(struct console *co, char *options)
|
|
{
|
|
struct bfin_serial_port *uart;
|
|
int baud = 57600;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
# if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
|
|
defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
|
|
int flow = 'r';
|
|
# else
|
|
int flow = 'n';
|
|
# endif
|
|
|
|
/*
|
|
* Check whether an invalid uart number has been specified, and
|
|
* if so, search for the first available port that does have
|
|
* console support.
|
|
*/
|
|
if (co->index == -1 || co->index >= nr_active_ports)
|
|
co->index = 0;
|
|
uart = &bfin_serial_ports[co->index];
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
bfin_serial_console_get_options(uart, &baud, &parity, &bits);
|
|
|
|
return uart_set_options(&uart->port, co, baud, parity, bits, flow);
|
|
}
|
|
#endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
|
|
defined (CONFIG_EARLY_PRINTK) */
|
|
|
|
#ifdef CONFIG_SERIAL_BFIN_CONSOLE
|
|
static void bfin_serial_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
while (!(UART_GET_LSR(uart) & THRE))
|
|
barrier();
|
|
UART_PUT_CHAR(uart, ch);
|
|
SSYNC();
|
|
}
|
|
|
|
/*
|
|
* Interrupts are disabled on entering
|
|
*/
|
|
static void
|
|
bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
|
|
{
|
|
struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&uart->port.lock, flags);
|
|
uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
|
|
spin_unlock_irqrestore(&uart->port.lock, flags);
|
|
|
|
}
|
|
|
|
static struct console bfin_serial_console = {
|
|
.name = BFIN_SERIAL_NAME,
|
|
.write = bfin_serial_console_write,
|
|
.device = uart_console_device,
|
|
.setup = bfin_serial_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &bfin_serial_reg,
|
|
};
|
|
|
|
static int __init bfin_serial_rs_console_init(void)
|
|
{
|
|
bfin_serial_init_ports();
|
|
register_console(&bfin_serial_console);
|
|
|
|
return 0;
|
|
}
|
|
console_initcall(bfin_serial_rs_console_init);
|
|
|
|
#define BFIN_SERIAL_CONSOLE &bfin_serial_console
|
|
#else
|
|
#define BFIN_SERIAL_CONSOLE NULL
|
|
#endif /* CONFIG_SERIAL_BFIN_CONSOLE */
|
|
|
|
|
|
#ifdef CONFIG_EARLY_PRINTK
|
|
static __init void early_serial_putc(struct uart_port *port, int ch)
|
|
{
|
|
unsigned timeout = 0xffff;
|
|
struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
|
|
|
|
while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
|
|
cpu_relax();
|
|
UART_PUT_CHAR(uart, ch);
|
|
}
|
|
|
|
static __init void early_serial_write(struct console *con, const char *s,
|
|
unsigned int n)
|
|
{
|
|
struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < n; i++, s++) {
|
|
if (*s == '\n')
|
|
early_serial_putc(&uart->port, '\r');
|
|
early_serial_putc(&uart->port, *s);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* This should have a .setup or .early_setup in it, but then things get called
|
|
* without the command line options, and the baud rate gets messed up - so
|
|
* don't let the common infrastructure play with things. (see calls to setup
|
|
* & earlysetup in ./kernel/printk.c:register_console()
|
|
*/
|
|
static struct __initdata console bfin_early_serial_console = {
|
|
.name = "early_BFuart",
|
|
.write = early_serial_write,
|
|
.device = uart_console_device,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &bfin_serial_reg,
|
|
};
|
|
|
|
struct console __init *bfin_earlyserial_init(unsigned int port,
|
|
unsigned int cflag)
|
|
{
|
|
struct bfin_serial_port *uart;
|
|
struct ktermios t;
|
|
|
|
if (port == -1 || port >= nr_active_ports)
|
|
port = 0;
|
|
bfin_serial_init_ports();
|
|
bfin_early_serial_console.index = port;
|
|
uart = &bfin_serial_ports[port];
|
|
t.c_cflag = cflag;
|
|
t.c_iflag = 0;
|
|
t.c_oflag = 0;
|
|
t.c_lflag = ICANON;
|
|
t.c_line = port;
|
|
bfin_serial_set_termios(&uart->port, &t, &t);
|
|
return &bfin_early_serial_console;
|
|
}
|
|
|
|
#endif /* CONFIG_EARLY_PRINTK */
|
|
|
|
static struct uart_driver bfin_serial_reg = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "bfin-uart",
|
|
.dev_name = BFIN_SERIAL_NAME,
|
|
.major = BFIN_SERIAL_MAJOR,
|
|
.minor = BFIN_SERIAL_MINOR,
|
|
.nr = BFIN_UART_NR_PORTS,
|
|
.cons = BFIN_SERIAL_CONSOLE,
|
|
};
|
|
|
|
static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < nr_active_ports; i++) {
|
|
if (bfin_serial_ports[i].port.dev != &dev->dev)
|
|
continue;
|
|
uart_suspend_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bfin_serial_resume(struct platform_device *dev)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < nr_active_ports; i++) {
|
|
if (bfin_serial_ports[i].port.dev != &dev->dev)
|
|
continue;
|
|
uart_resume_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bfin_serial_probe(struct platform_device *dev)
|
|
{
|
|
struct resource *res = dev->resource;
|
|
int i;
|
|
|
|
for (i = 0; i < dev->num_resources; i++, res++)
|
|
if (res->flags & IORESOURCE_MEM)
|
|
break;
|
|
|
|
if (i < dev->num_resources) {
|
|
for (i = 0; i < nr_active_ports; i++, res++) {
|
|
if (bfin_serial_ports[i].port.mapbase != res->start)
|
|
continue;
|
|
bfin_serial_ports[i].port.dev = &dev->dev;
|
|
uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int bfin_serial_remove(struct platform_device *dev)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < nr_active_ports; i++) {
|
|
if (bfin_serial_ports[i].port.dev != &dev->dev)
|
|
continue;
|
|
uart_remove_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
|
|
bfin_serial_ports[i].port.dev = NULL;
|
|
#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
|
|
defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
|
|
gpio_free(bfin_serial_ports[i].cts_pin);
|
|
gpio_free(bfin_serial_ports[i].rts_pin);
|
|
#endif
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver bfin_serial_driver = {
|
|
.probe = bfin_serial_probe,
|
|
.remove = bfin_serial_remove,
|
|
.suspend = bfin_serial_suspend,
|
|
.resume = bfin_serial_resume,
|
|
.driver = {
|
|
.name = "bfin-uart",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
};
|
|
|
|
static int __init bfin_serial_init(void)
|
|
{
|
|
int ret;
|
|
|
|
pr_info("Serial: Blackfin serial driver\n");
|
|
|
|
bfin_serial_init_ports();
|
|
|
|
ret = uart_register_driver(&bfin_serial_reg);
|
|
if (ret == 0) {
|
|
ret = platform_driver_register(&bfin_serial_driver);
|
|
if (ret) {
|
|
pr_debug("uart register failed\n");
|
|
uart_unregister_driver(&bfin_serial_reg);
|
|
}
|
|
}
|
|
return ret;
|
|
}
|
|
|
|
static void __exit bfin_serial_exit(void)
|
|
{
|
|
platform_driver_unregister(&bfin_serial_driver);
|
|
uart_unregister_driver(&bfin_serial_reg);
|
|
}
|
|
|
|
|
|
module_init(bfin_serial_init);
|
|
module_exit(bfin_serial_exit);
|
|
|
|
MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
|
|
MODULE_DESCRIPTION("Blackfin generic serial port driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
|
|
MODULE_ALIAS("platform:bfin-uart");
|