mirror of https://gitee.com/openkylin/linux.git
107 lines
2.1 KiB
Plaintext
107 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,xway", "lantiq,danube";
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cpus {
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cpu@0 {
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compatible = "mips,mips24Kc";
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};
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};
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biu@1f800000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,biu", "simple-bus";
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reg = <0x1f800000 0x800000>;
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ranges = <0x0 0x1f800000 0x7fffff>;
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icu0: icu@80200 {
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "lantiq,icu";
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reg = <0x80200 0x120>;
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};
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watchdog@803f0 {
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compatible = "lantiq,wdt";
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reg = <0x803f0 0x10>;
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};
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};
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sram@1f000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,sram";
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reg = <0x1f000000 0x800000>;
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ranges = <0x0 0x1f000000 0x7fffff>;
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eiu0: eiu@101000 {
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#interrupt-cells = <1>;
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interrupt-controller;
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interrupt-parent;
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compatible = "lantiq,eiu-xway";
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reg = <0x101000 0x1000>;
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};
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pmu0: pmu@102000 {
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compatible = "lantiq,pmu-xway";
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reg = <0x102000 0x1000>;
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};
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cgu0: cgu@103000 {
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compatible = "lantiq,cgu-xway";
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reg = <0x103000 0x1000>;
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#clock-cells = <1>;
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};
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rcu0: rcu@203000 {
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compatible = "lantiq,rcu-xway";
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reg = <0x203000 0x1000>;
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};
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};
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fpi@10000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "lantiq,fpi", "simple-bus";
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ranges = <0x0 0x10000000 0xeefffff>;
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reg = <0x10000000 0xef00000>;
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gptu@e100a00 {
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compatible = "lantiq,gptu-xway";
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reg = <0xe100a00 0x100>;
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};
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serial@e100c00 {
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compatible = "lantiq,asc";
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reg = <0xe100c00 0x400>;
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interrupt-parent = <&icu0>;
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interrupts = <112 113 114>;
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};
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dma0: dma@e104100 {
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compatible = "lantiq,dma-xway";
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reg = <0xe104100 0x800>;
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};
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ebu0: ebu@e105300 {
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compatible = "lantiq,ebu-xway";
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reg = <0xe105300 0x100>;
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};
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pci0: pci@e105400 {
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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compatible = "lantiq,pci-xway";
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bus-range = <0x0 0x0>;
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ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */
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0x1000000 0 0x00000000 0xae00000 0 0x200000>; /* io space */
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reg = <0x7000000 0x8000 /* config space */
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0xe105400 0x400>; /* pci bridge */
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};
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};
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};
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