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linux/drivers/clk/renesas
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Takeshi Kihara b9df2ea2b8 clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC 
The clock sources of the AXI-bus clock (266.66 MHz) used for Audio-DMAC
DMA transfers are:

    Channel        R-Car H3    R-Car M3-W    R-Car M3-N    R-Car E3
    ---------------------------------------------------------------
    Audio-DMAC0    S1D2        S1D2          S1D2          S1D2
    Audio-DMAC1    S1D2        S1D2          S1D2          -

As a result, change the parent clocks of the Audio-DMAC{0,1} module
clocks on R-Car H3, R-Car M3-W, and R-Car M3-N to S1D2, and change the
parent clock of the Audio-DMAC0 module on R-Car E3 to S1D2.

NOTE: This information will be reflected in a future revision of the
      R-Car Gen3 Hardware Manual.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Update R-Car D3, RZ/G2M, and RZ/G2E]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
 		2019-04-02 10:08:35 +02:00
..
Kconfig Merge branch 'clk-renesas' into clk-next 2018-10-18 15:38:51 -07:00
Makefile clk: renesas: cpg-mssr: Add r8a774c0 support 2018-09-19 16:42:14 +02:00
clk-div6.c clk: renesas: Remove usage of CLK_IS_BASIC 2018-12-10 14:43:04 -08:00
clk-div6.h We have two changes to the core framework this time around. The first being a 2017-11-17 20:04:24 -08:00
clk-emev2.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-mstp.c Merge branch 'clk-of' into clk-next 2018-12-14 14:02:55 -08:00
clk-r8a73a4.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-r8a7740.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-r8a7778.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-r8a7779.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-rcar-gen2.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-rz.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-sh73a0.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
r7s9210-cpg-mssr.c clk: renesas: r7s9210: Always use readl() 2019-04-02 09:50:48 +02:00
r8a774a1-cpg-mssr.c clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC 2019-04-02 10:08:35 +02:00
r8a774c0-cpg-mssr.c clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC 2019-04-02 10:08:35 +02:00
r8a7743-cpg-mssr.c Merge branch 'clk-renesas' into clk-next 2018-10-18 15:38:51 -07:00
r8a7745-cpg-mssr.c clk: renesas: Convert to SPDX identifiers 2018-09-28 17:16:37 -07:00
r8a7790-cpg-mssr.c clk: renesas: Convert to SPDX identifiers 2018-09-28 17:16:37 -07:00
r8a7791-cpg-mssr.c clk: renesas: Convert to SPDX identifiers 2018-09-28 17:16:37 -07:00
r8a7792-cpg-mssr.c clk: renesas: Convert to SPDX identifiers 2018-09-28 17:16:37 -07:00
r8a7794-cpg-mssr.c clk: renesas: Convert to SPDX identifiers 2018-09-28 17:16:37 -07:00
r8a7795-cpg-mssr.c clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC 2019-04-02 10:08:35 +02:00
r8a7796-cpg-mssr.c clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC 2019-04-02 10:08:35 +02:00
r8a77470-cpg-mssr.c clk: renesas: cpg-mssr: Add r8a77470 support 2018-04-16 13:39:40 +02:00
r8a77965-cpg-mssr.c clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC 2019-04-02 10:08:35 +02:00
r8a77970-cpg-mssr.c clk: renesas: r8a77970: Add CPEX clock 2018-12-04 10:29:48 +01:00
r8a77980-cpg-mssr.c clk: renesas: r8a77980: Add RPC clocks 2019-02-05 10:40:05 +01:00
r8a77990-cpg-mssr.c clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC 2019-04-02 10:08:35 +02:00
r8a77995-cpg-mssr.c clk: renesas: rcar-gen3: Correct parent clock of Audio-DMAC 2019-04-02 10:08:35 +02:00
r9a06g032-clocks.c clk: renesas: r9a06g032: Add missing PCI USB clock 2019-04-02 09:50:48 +02:00
rcar-gen2-cpg.c clk: renesas: Convert to SPDX identifiers 2018-09-28 17:16:37 -07:00
rcar-gen2-cpg.h clk: renesas: Convert to SPDX identifiers 2018-09-28 17:16:37 -07:00
rcar-gen3-cpg.c clk: renesas: rcar-gen3: Support Z and Z2 clocks with high frequency parents 2019-04-02 09:50:48 +02:00
rcar-gen3-cpg.h clk: renesas: rcar-gen3: Remove CLK_TYPE_GEN3_Z2 2019-04-02 09:50:48 +02:00
rcar-usb2-clock-sel.c clk: renesas: use SPDX identifier for Renesas drivers 2018-08-30 18:18:44 -07:00
renesas-cpg-mssr.c clk: renesas: Remove usage of CLK_IS_BASIC 2018-12-10 14:43:04 -08:00
renesas-cpg-mssr.h Merge branch 'clk-renesas' into clk-next 2018-10-18 15:38:51 -07:00