mirror of https://gitee.com/openkylin/linux.git
509 lines
13 KiB
C
509 lines
13 KiB
C
/*
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* Promise TX2/TX4/TX2000/133 IDE driver
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Split from:
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* linux/drivers/ide/pdc202xx.c Version 0.35 Mar. 30, 2002
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* Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
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* Portions Copyright (C) 1999 Promise Technology, Inc.
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* Author: Frank Tiernan (frankt@promise.com)
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* Released under terms of General Public License
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/timer.h>
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#include <linux/mm.h>
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#include <linux/ioport.h>
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#include <linux/blkdev.h>
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#include <linux/hdreg.h>
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#include <linux/interrupt.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/ide.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#ifdef CONFIG_PPC_PMAC
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#include <asm/prom.h>
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#include <asm/pci-bridge.h>
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#endif
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#define PDC202_DEBUG_CABLE 0
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const static char *pdc_quirk_drives[] = {
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"QUANTUM FIREBALLlct08 08",
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"QUANTUM FIREBALLP KA6.4",
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"QUANTUM FIREBALLP KA9.1",
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"QUANTUM FIREBALLP LM20.4",
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"QUANTUM FIREBALLP KX13.6",
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"QUANTUM FIREBALLP KX20.5",
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"QUANTUM FIREBALLP KX27.3",
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"QUANTUM FIREBALLP LM20.5",
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NULL
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};
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#define set_2regs(a, b) \
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do { \
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hwif->OUTB((a + adj), indexreg); \
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hwif->OUTB(b, datareg); \
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} while(0)
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#define set_ultra(a, b, c) \
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do { \
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set_2regs(0x10,(a)); \
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set_2regs(0x11,(b)); \
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set_2regs(0x12,(c)); \
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} while(0)
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#define set_ata2(a, b) \
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do { \
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set_2regs(0x0e,(a)); \
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set_2regs(0x0f,(b)); \
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} while(0)
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#define set_pio(a, b, c) \
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do { \
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set_2regs(0x0c,(a)); \
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set_2regs(0x0d,(b)); \
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set_2regs(0x13,(c)); \
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} while(0)
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static u8 pdcnew_ratemask (ide_drive_t *drive)
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{
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u8 mode;
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switch(HWIF(drive)->pci_dev->device) {
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case PCI_DEVICE_ID_PROMISE_20277:
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case PCI_DEVICE_ID_PROMISE_20276:
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case PCI_DEVICE_ID_PROMISE_20275:
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case PCI_DEVICE_ID_PROMISE_20271:
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case PCI_DEVICE_ID_PROMISE_20269:
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mode = 4;
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break;
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case PCI_DEVICE_ID_PROMISE_20270:
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case PCI_DEVICE_ID_PROMISE_20268:
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mode = 3;
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break;
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default:
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return 0;
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}
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if (!eighty_ninty_three(drive))
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mode = min(mode, (u8)1);
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return mode;
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}
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static int check_in_drive_lists (ide_drive_t *drive, const char **list)
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{
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struct hd_driveid *id = drive->id;
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if (pdc_quirk_drives == list) {
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while (*list) {
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if (strstr(id->model, *list++)) {
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return 2;
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}
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}
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} else {
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while (*list) {
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if (!strcmp(*list++,id->model)) {
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return 1;
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}
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}
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}
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return 0;
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}
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static int pdcnew_new_tune_chipset (ide_drive_t *drive, u8 xferspeed)
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{
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ide_hwif_t *hwif = HWIF(drive);
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unsigned long indexreg = hwif->dma_vendor1;
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unsigned long datareg = hwif->dma_vendor3;
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u8 thold = 0x10;
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u8 adj = (drive->dn%2) ? 0x08 : 0x00;
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u8 speed = ide_rate_filter(pdcnew_ratemask(drive), xferspeed);
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if (speed == XFER_UDMA_2) {
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hwif->OUTB((thold + adj), indexreg);
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hwif->OUTB((hwif->INB(datareg) & 0x7f), datareg);
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}
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switch (speed) {
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case XFER_UDMA_7:
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speed = XFER_UDMA_6;
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case XFER_UDMA_6: set_ultra(0x1a, 0x01, 0xcb); break;
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case XFER_UDMA_5: set_ultra(0x1a, 0x02, 0xcb); break;
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case XFER_UDMA_4: set_ultra(0x1a, 0x03, 0xcd); break;
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case XFER_UDMA_3: set_ultra(0x1a, 0x05, 0xcd); break;
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case XFER_UDMA_2: set_ultra(0x2a, 0x07, 0xcd); break;
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case XFER_UDMA_1: set_ultra(0x3a, 0x0a, 0xd0); break;
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case XFER_UDMA_0: set_ultra(0x4a, 0x0f, 0xd5); break;
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case XFER_MW_DMA_2: set_ata2(0x69, 0x25); break;
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case XFER_MW_DMA_1: set_ata2(0x6b, 0x27); break;
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case XFER_MW_DMA_0: set_ata2(0xdf, 0x5f); break;
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case XFER_PIO_4: set_pio(0x23, 0x09, 0x25); break;
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case XFER_PIO_3: set_pio(0x27, 0x0d, 0x35); break;
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case XFER_PIO_2: set_pio(0x23, 0x26, 0x64); break;
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case XFER_PIO_1: set_pio(0x46, 0x29, 0xa4); break;
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case XFER_PIO_0: set_pio(0xfb, 0x2b, 0xac); break;
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default:
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;
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}
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return (ide_config_drive_speed(drive, speed));
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}
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/* 0 1 2 3 4 5 6 7 8
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* 960, 480, 390, 300, 240, 180, 120, 90, 60
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* 180, 150, 120, 90, 60
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* DMA_Speed
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* 180, 120, 90, 90, 90, 60, 30
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* 11, 5, 4, 3, 2, 1, 0
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*/
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static void pdcnew_tune_drive(ide_drive_t *drive, u8 pio)
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{
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u8 speed;
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if (pio == 5) pio = 4;
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speed = XFER_PIO_0 + ide_get_best_pio_mode(drive, 255, pio, NULL);
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(void)pdcnew_new_tune_chipset(drive, speed);
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}
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static u8 pdcnew_new_cable_detect (ide_hwif_t *hwif)
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{
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hwif->OUTB(0x0b, hwif->dma_vendor1);
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return ((u8)((hwif->INB(hwif->dma_vendor3) & 0x04)));
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}
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static int config_chipset_for_dma (ide_drive_t *drive)
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{
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struct hd_driveid *id = drive->id;
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ide_hwif_t *hwif = HWIF(drive);
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u8 speed = -1;
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u8 cable;
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u8 ultra_66 = ((id->dma_ultra & 0x0010) ||
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(id->dma_ultra & 0x0008)) ? 1 : 0;
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cable = pdcnew_new_cable_detect(hwif);
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if (ultra_66 && cable) {
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printk(KERN_WARNING "Warning: %s channel requires an 80-pin cable for operation.\n", hwif->channel ? "Secondary":"Primary");
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printk(KERN_WARNING "%s reduced to Ultra33 mode.\n", drive->name);
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}
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if (drive->media != ide_disk)
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return 0;
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if (id->capability & 4) { /* IORDY_EN & PREFETCH_EN */
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hwif->OUTB((0x13 + ((drive->dn%2) ? 0x08 : 0x00)), hwif->dma_vendor1);
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hwif->OUTB((hwif->INB(hwif->dma_vendor3)|0x03), hwif->dma_vendor3);
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}
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speed = ide_dma_speed(drive, pdcnew_ratemask(drive));
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if (!(speed)) {
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hwif->tuneproc(drive, 5);
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return 0;
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}
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(void) hwif->speedproc(drive, speed);
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return ide_dma_enable(drive);
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}
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static int pdcnew_config_drive_xfer_rate (ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct hd_driveid *id = drive->id;
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drive->init_speed = 0;
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if (id && (id->capability & 1) && drive->autodma) {
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if (ide_use_dma(drive)) {
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if (config_chipset_for_dma(drive))
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return hwif->ide_dma_on(drive);
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}
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goto fast_ata_pio;
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} else if ((id->capability & 8) || (id->field_valid & 2)) {
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fast_ata_pio:
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hwif->tuneproc(drive, 5);
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return hwif->ide_dma_off_quietly(drive);
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}
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/* IORDY not supported */
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return 0;
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}
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static int pdcnew_quirkproc (ide_drive_t *drive)
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{
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return ((int) check_in_drive_lists(drive, pdc_quirk_drives));
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}
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static int pdcnew_ide_dma_lostirq(ide_drive_t *drive)
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{
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if (HWIF(drive)->resetproc != NULL)
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HWIF(drive)->resetproc(drive);
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return __ide_dma_lostirq(drive);
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}
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static int pdcnew_ide_dma_timeout(ide_drive_t *drive)
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{
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if (HWIF(drive)->resetproc != NULL)
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HWIF(drive)->resetproc(drive);
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return __ide_dma_timeout(drive);
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}
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static void pdcnew_new_reset (ide_drive_t *drive)
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{
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/*
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* Deleted this because it is redundant from the caller.
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*/
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printk(KERN_WARNING "PDC202XX: %s channel reset.\n",
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HWIF(drive)->channel ? "Secondary" : "Primary");
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}
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#ifdef CONFIG_PPC_PMAC
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static void __devinit apple_kiwi_init(struct pci_dev *pdev)
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{
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struct device_node *np = pci_device_to_OF_node(pdev);
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unsigned int class_rev = 0;
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void __iomem *mmio;
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u8 conf;
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if (np == NULL || !device_is_compatible(np, "kiwi-root"))
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return;
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pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class_rev);
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class_rev &= 0xff;
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if (class_rev >= 0x03) {
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/* Setup chip magic config stuff (from darwin) */
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pci_read_config_byte(pdev, 0x40, &conf);
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pci_write_config_byte(pdev, 0x40, conf | 0x01);
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}
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mmio = ioremap(pci_resource_start(pdev, 5),
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pci_resource_len(pdev, 5));
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/* Setup some PLL stuffs */
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switch (pdev->device) {
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case PCI_DEVICE_ID_PROMISE_20270:
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writew(0x0d2b, mmio + 0x1202);
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mdelay(30);
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break;
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case PCI_DEVICE_ID_PROMISE_20271:
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writew(0x0826, mmio + 0x1202);
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mdelay(30);
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break;
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}
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iounmap(mmio);
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}
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#endif /* CONFIG_PPC_PMAC */
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static unsigned int __devinit init_chipset_pdcnew(struct pci_dev *dev, const char *name)
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{
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if (dev->resource[PCI_ROM_RESOURCE].start) {
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pci_write_config_dword(dev, PCI_ROM_ADDRESS,
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dev->resource[PCI_ROM_RESOURCE].start | PCI_ROM_ADDRESS_ENABLE);
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printk(KERN_INFO "%s: ROM enabled at 0x%08lx\n",
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name, dev->resource[PCI_ROM_RESOURCE].start);
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}
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#ifdef CONFIG_PPC_PMAC
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apple_kiwi_init(dev);
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#endif
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return dev->irq;
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}
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static void __devinit init_hwif_pdc202new(ide_hwif_t *hwif)
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{
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hwif->autodma = 0;
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hwif->tuneproc = &pdcnew_tune_drive;
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hwif->quirkproc = &pdcnew_quirkproc;
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hwif->speedproc = &pdcnew_new_tune_chipset;
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hwif->resetproc = &pdcnew_new_reset;
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hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
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hwif->ultra_mask = 0x7f;
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hwif->mwdma_mask = 0x07;
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hwif->ide_dma_check = &pdcnew_config_drive_xfer_rate;
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hwif->ide_dma_lostirq = &pdcnew_ide_dma_lostirq;
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hwif->ide_dma_timeout = &pdcnew_ide_dma_timeout;
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if (!(hwif->udma_four))
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hwif->udma_four = (pdcnew_new_cable_detect(hwif)) ? 0 : 1;
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if (!noautodma)
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hwif->autodma = 1;
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hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
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#if PDC202_DEBUG_CABLE
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printk(KERN_DEBUG "%s: %s-pin cable\n",
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hwif->name, hwif->udma_four ? "80" : "40");
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#endif /* PDC202_DEBUG_CABLE */
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}
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static int __devinit init_setup_pdcnew(struct pci_dev *dev, ide_pci_device_t *d)
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{
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return ide_setup_pci_device(dev, d);
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}
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static int __devinit init_setup_pdc20270(struct pci_dev *dev,
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ide_pci_device_t *d)
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{
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struct pci_dev *findev = NULL;
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if ((dev->bus->self &&
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dev->bus->self->vendor == PCI_VENDOR_ID_DEC) &&
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(dev->bus->self->device == PCI_DEVICE_ID_DEC_21150)) {
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if (PCI_SLOT(dev->devfn) & 2)
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return -ENODEV;
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d->extra = 0;
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while ((findev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, findev)) != NULL) {
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if ((findev->vendor == dev->vendor) &&
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(findev->device == dev->device) &&
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(PCI_SLOT(findev->devfn) & 2)) {
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if (findev->irq != dev->irq) {
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findev->irq = dev->irq;
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}
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return ide_setup_pci_devices(dev, findev, d);
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}
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}
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}
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return ide_setup_pci_device(dev, d);
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}
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static int __devinit init_setup_pdc20276(struct pci_dev *dev,
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ide_pci_device_t *d)
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{
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if ((dev->bus->self) &&
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(dev->bus->self->vendor == PCI_VENDOR_ID_INTEL) &&
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((dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960) ||
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(dev->bus->self->device == PCI_DEVICE_ID_INTEL_I960RM))) {
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printk(KERN_INFO "ide: Skipping Promise PDC20276 "
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"attached to I2O RAID controller.\n");
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return -ENODEV;
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}
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return ide_setup_pci_device(dev, d);
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}
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static ide_pci_device_t pdcnew_chipsets[] __devinitdata = {
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{ /* 0 */
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.name = "PDC20268",
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.init_setup = init_setup_pdcnew,
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.init_chipset = init_chipset_pdcnew,
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.init_hwif = init_hwif_pdc202new,
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.channels = 2,
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.autodma = AUTODMA,
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.bootable = OFF_BOARD,
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},{ /* 1 */
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.name = "PDC20269",
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.init_setup = init_setup_pdcnew,
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.init_chipset = init_chipset_pdcnew,
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.init_hwif = init_hwif_pdc202new,
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.channels = 2,
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.autodma = AUTODMA,
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.bootable = OFF_BOARD,
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},{ /* 2 */
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.name = "PDC20270",
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.init_setup = init_setup_pdc20270,
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.init_chipset = init_chipset_pdcnew,
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.init_hwif = init_hwif_pdc202new,
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.channels = 2,
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.autodma = AUTODMA,
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#ifndef CONFIG_PDC202XX_FORCE
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.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
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#endif
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.bootable = OFF_BOARD,
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},{ /* 3 */
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.name = "PDC20271",
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.init_setup = init_setup_pdcnew,
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.init_chipset = init_chipset_pdcnew,
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.init_hwif = init_hwif_pdc202new,
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.channels = 2,
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.autodma = AUTODMA,
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.bootable = OFF_BOARD,
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},{ /* 4 */
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.name = "PDC20275",
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.init_setup = init_setup_pdcnew,
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.init_chipset = init_chipset_pdcnew,
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.init_hwif = init_hwif_pdc202new,
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.channels = 2,
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.autodma = AUTODMA,
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.bootable = OFF_BOARD,
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},{ /* 5 */
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.name = "PDC20276",
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.init_setup = init_setup_pdc20276,
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.init_chipset = init_chipset_pdcnew,
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.init_hwif = init_hwif_pdc202new,
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.channels = 2,
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.autodma = AUTODMA,
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#ifndef CONFIG_PDC202XX_FORCE
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.enablebits = {{0x50,0x02,0x02}, {0x50,0x04,0x04}},
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#endif
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.bootable = OFF_BOARD,
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},{ /* 6 */
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.name = "PDC20277",
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.init_setup = init_setup_pdcnew,
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.init_chipset = init_chipset_pdcnew,
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.init_hwif = init_hwif_pdc202new,
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.channels = 2,
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.autodma = AUTODMA,
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.bootable = OFF_BOARD,
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}
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};
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/**
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* pdc202new_init_one - called when a pdc202xx is found
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* @dev: the pdc202new device
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* @id: the matching pci id
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*
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* Called when the PCI registration layer (or the IDE initialization)
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* finds a device matching our IDE device tables.
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*/
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static int __devinit pdc202new_init_one(struct pci_dev *dev, const struct pci_device_id *id)
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{
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ide_pci_device_t *d = &pdcnew_chipsets[id->driver_data];
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return d->init_setup(dev, d);
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}
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static struct pci_device_id pdc202new_pci_tbl[] = {
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{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20268, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20269, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
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{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20270, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2},
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{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20271, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3},
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{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20275, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4},
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{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20276, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5},
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{ PCI_VENDOR_ID_PROMISE, PCI_DEVICE_ID_PROMISE_20277, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6},
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{ 0, },
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};
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MODULE_DEVICE_TABLE(pci, pdc202new_pci_tbl);
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static struct pci_driver driver = {
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.name = "Promise_IDE",
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.id_table = pdc202new_pci_tbl,
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.probe = pdc202new_init_one,
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};
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static int pdc202new_ide_init(void)
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{
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return ide_pci_register_driver(&driver);
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}
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module_init(pdc202new_ide_init);
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MODULE_AUTHOR("Andre Hedrick, Frank Tiernan");
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MODULE_DESCRIPTION("PCI driver module for Promise PDC20268 and higher");
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MODULE_LICENSE("GPL");
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