mirror of https://gitee.com/openkylin/linux.git
165 lines
4.1 KiB
C
165 lines
4.1 KiB
C
/*
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* Sonics Silicon Backplane
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* ChipCommon serial flash interface
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*
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* Licensed under the GNU/GPL. See COPYING for details.
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*/
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#include <linux/ssb/ssb.h>
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#include "ssb_private.h"
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static struct resource ssb_sflash_resource = {
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.name = "ssb_sflash",
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.start = SSB_FLASH2,
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.end = 0,
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.flags = IORESOURCE_MEM | IORESOURCE_READONLY,
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};
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struct platform_device ssb_sflash_dev = {
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.name = "ssb_sflash",
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.resource = &ssb_sflash_resource,
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.num_resources = 1,
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};
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struct ssb_sflash_tbl_e {
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char *name;
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u32 id;
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u32 blocksize;
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u16 numblocks;
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};
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static const struct ssb_sflash_tbl_e ssb_sflash_st_tbl[] = {
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{ "M25P20", 0x11, 0x10000, 4, },
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{ "M25P40", 0x12, 0x10000, 8, },
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{ "M25P16", 0x14, 0x10000, 32, },
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{ "M25P32", 0x15, 0x10000, 64, },
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{ "M25P64", 0x16, 0x10000, 128, },
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{ "M25FL128", 0x17, 0x10000, 256, },
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{ NULL },
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};
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static const struct ssb_sflash_tbl_e ssb_sflash_sst_tbl[] = {
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{ "SST25WF512", 1, 0x1000, 16, },
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{ "SST25VF512", 0x48, 0x1000, 16, },
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{ "SST25WF010", 2, 0x1000, 32, },
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{ "SST25VF010", 0x49, 0x1000, 32, },
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{ "SST25WF020", 3, 0x1000, 64, },
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{ "SST25VF020", 0x43, 0x1000, 64, },
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{ "SST25WF040", 4, 0x1000, 128, },
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{ "SST25VF040", 0x44, 0x1000, 128, },
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{ "SST25VF040B", 0x8d, 0x1000, 128, },
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{ "SST25WF080", 5, 0x1000, 256, },
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{ "SST25VF080B", 0x8e, 0x1000, 256, },
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{ "SST25VF016", 0x41, 0x1000, 512, },
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{ "SST25VF032", 0x4a, 0x1000, 1024, },
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{ "SST25VF064", 0x4b, 0x1000, 2048, },
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{ NULL },
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};
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static const struct ssb_sflash_tbl_e ssb_sflash_at_tbl[] = {
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{ "AT45DB011", 0xc, 256, 512, },
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{ "AT45DB021", 0x14, 256, 1024, },
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{ "AT45DB041", 0x1c, 256, 2048, },
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{ "AT45DB081", 0x24, 256, 4096, },
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{ "AT45DB161", 0x2c, 512, 4096, },
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{ "AT45DB321", 0x34, 512, 8192, },
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{ "AT45DB642", 0x3c, 1024, 8192, },
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{ NULL },
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};
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static void ssb_sflash_cmd(struct ssb_chipcommon *cc, u32 opcode)
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{
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int i;
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chipco_write32(cc, SSB_CHIPCO_FLASHCTL,
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SSB_CHIPCO_FLASHCTL_START | opcode);
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for (i = 0; i < 1000; i++) {
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if (!(chipco_read32(cc, SSB_CHIPCO_FLASHCTL) &
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SSB_CHIPCO_FLASHCTL_BUSY))
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return;
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cpu_relax();
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}
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pr_err("SFLASH control command failed (timeout)!\n");
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}
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/* Initialize serial flash access */
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int ssb_sflash_init(struct ssb_chipcommon *cc)
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{
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struct ssb_sflash *sflash = &cc->dev->bus->mipscore.sflash;
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const struct ssb_sflash_tbl_e *e;
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u32 id, id2;
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switch (cc->capabilities & SSB_CHIPCO_CAP_FLASHT) {
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case SSB_CHIPCO_FLASHT_STSER:
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ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_DP);
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chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 0);
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ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
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id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
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chipco_write32(cc, SSB_CHIPCO_FLASHADDR, 1);
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ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_ST_RES);
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id2 = chipco_read32(cc, SSB_CHIPCO_FLASHDATA);
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switch (id) {
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case 0xbf:
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for (e = ssb_sflash_sst_tbl; e->name; e++) {
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if (e->id == id2)
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break;
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}
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break;
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case 0x13:
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return -ENOTSUPP;
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default:
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for (e = ssb_sflash_st_tbl; e->name; e++) {
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if (e->id == id)
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break;
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}
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break;
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}
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if (!e->name) {
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pr_err("Unsupported ST serial flash (id: 0x%X, id2: 0x%X)\n",
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id, id2);
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return -ENOTSUPP;
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}
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break;
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case SSB_CHIPCO_FLASHT_ATSER:
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ssb_sflash_cmd(cc, SSB_CHIPCO_FLASHCTL_AT_STATUS);
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id = chipco_read32(cc, SSB_CHIPCO_FLASHDATA) & 0x3c;
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for (e = ssb_sflash_at_tbl; e->name; e++) {
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if (e->id == id)
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break;
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}
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if (!e->name) {
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pr_err("Unsupported Atmel serial flash (id: 0x%X)\n",
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id);
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return -ENOTSUPP;
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}
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break;
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default:
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pr_err("Unsupported flash type\n");
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return -ENOTSUPP;
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}
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sflash->window = SSB_FLASH2;
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sflash->blocksize = e->blocksize;
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sflash->numblocks = e->numblocks;
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sflash->size = sflash->blocksize * sflash->numblocks;
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sflash->present = true;
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pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n",
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e->name, sflash->size / 1024, e->blocksize, e->numblocks);
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/* Prepare platform device, but don't register it yet. It's too early,
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* malloc (required by device_private_init) is not available yet. */
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ssb_sflash_dev.resource[0].end = ssb_sflash_dev.resource[0].start +
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sflash->size;
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ssb_sflash_dev.dev.platform_data = sflash;
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return 0;
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}
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