mirror of https://gitee.com/openkylin/linux.git
734 lines
17 KiB
C
734 lines
17 KiB
C
/*
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* linux/arch/arm/mach-omap2/devices.c
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*
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* OMAP2 platform device setup/initialization
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/slab.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include <asm/mach-types.h>
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#include <asm/mach/map.h>
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#include <asm/pmu.h>
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#include <plat/tc.h>
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#include <plat/board.h>
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#include <plat/mcbsp.h>
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#include <mach/gpio.h>
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#include <plat/mmc.h>
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#include <plat/dma.h>
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#include <plat/omap_hwmod.h>
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#include <plat/omap_device.h>
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#include <plat/omap4-keypad.h>
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#include "mux.h"
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#include "control.h"
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#include "devices.h"
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#define L3_MODULES_MAX_LEN 12
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#define L3_MODULES 3
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static int __init omap3_l3_init(void)
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{
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int l;
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struct omap_hwmod *oh;
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struct omap_device *od;
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char oh_name[L3_MODULES_MAX_LEN];
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/*
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* To avoid code running on other OMAPs in
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* multi-omap builds
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*/
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if (!(cpu_is_omap34xx()))
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return -ENODEV;
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l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main");
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oh = omap_hwmod_lookup(oh_name);
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if (!oh)
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pr_err("could not look up %s\n", oh_name);
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od = omap_device_build("omap_l3_smx", 0, oh, NULL, 0,
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NULL, 0, 0);
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WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
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return IS_ERR(od) ? PTR_ERR(od) : 0;
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}
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postcore_initcall(omap3_l3_init);
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static int __init omap4_l3_init(void)
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{
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int l, i;
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struct omap_hwmod *oh[3];
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struct omap_device *od;
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char oh_name[L3_MODULES_MAX_LEN];
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/*
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* To avoid code running on other OMAPs in
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* multi-omap builds
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*/
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if (!(cpu_is_omap44xx()))
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return -ENODEV;
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for (i = 0; i < L3_MODULES; i++) {
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l = snprintf(oh_name, L3_MODULES_MAX_LEN, "l3_main_%d", i+1);
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oh[i] = omap_hwmod_lookup(oh_name);
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if (!(oh[i]))
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pr_err("could not look up %s\n", oh_name);
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}
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od = omap_device_build_ss("omap_l3_noc", 0, oh, 3, NULL,
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0, NULL, 0, 0);
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WARN(IS_ERR(od), "could not build omap_device for %s\n", oh_name);
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return IS_ERR(od) ? PTR_ERR(od) : 0;
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}
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postcore_initcall(omap4_l3_init);
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#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
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static struct resource omap2cam_resources[] = {
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{
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.start = OMAP24XX_CAMERA_BASE,
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.end = OMAP24XX_CAMERA_BASE + 0xfff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_24XX_CAM_IRQ,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device omap2cam_device = {
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.name = "omap24xxcam",
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.id = -1,
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.num_resources = ARRAY_SIZE(omap2cam_resources),
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.resource = omap2cam_resources,
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};
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#endif
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static struct resource omap3isp_resources[] = {
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{
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.start = OMAP3430_ISP_BASE,
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.end = OMAP3430_ISP_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3430_ISP_CCP2_BASE,
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.end = OMAP3430_ISP_CCP2_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3430_ISP_CCDC_BASE,
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.end = OMAP3430_ISP_CCDC_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3430_ISP_HIST_BASE,
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.end = OMAP3430_ISP_HIST_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3430_ISP_H3A_BASE,
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.end = OMAP3430_ISP_H3A_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3430_ISP_PREV_BASE,
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.end = OMAP3430_ISP_PREV_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3430_ISP_RESZ_BASE,
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.end = OMAP3430_ISP_RESZ_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3430_ISP_SBL_BASE,
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.end = OMAP3430_ISP_SBL_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3430_ISP_CSI2A_REGS1_BASE,
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.end = OMAP3430_ISP_CSI2A_REGS1_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3430_ISP_CSIPHY2_BASE,
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.end = OMAP3430_ISP_CSIPHY2_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3630_ISP_CSI2A_REGS2_BASE,
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.end = OMAP3630_ISP_CSI2A_REGS2_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3630_ISP_CSI2C_REGS1_BASE,
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.end = OMAP3630_ISP_CSI2C_REGS1_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3630_ISP_CSIPHY1_BASE,
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.end = OMAP3630_ISP_CSIPHY1_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP3630_ISP_CSI2C_REGS2_BASE,
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.end = OMAP3630_ISP_CSI2C_REGS2_END,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_34XX_CAM_IRQ,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device omap3isp_device = {
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.name = "omap3isp",
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.id = -1,
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.num_resources = ARRAY_SIZE(omap3isp_resources),
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.resource = omap3isp_resources,
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};
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int omap3_init_camera(struct isp_platform_data *pdata)
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{
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omap3isp_device.dev.platform_data = pdata;
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return platform_device_register(&omap3isp_device);
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}
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static inline void omap_init_camera(void)
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{
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#if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
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if (cpu_is_omap24xx())
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platform_device_register(&omap2cam_device);
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#endif
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}
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struct omap_device_pm_latency omap_keyboard_latency[] = {
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{
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.deactivate_func = omap_device_idle_hwmods,
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.activate_func = omap_device_enable_hwmods,
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.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
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},
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};
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int __init omap4_keyboard_init(struct omap4_keypad_platform_data
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*sdp4430_keypad_data)
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{
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struct omap_device *od;
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struct omap_hwmod *oh;
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struct omap4_keypad_platform_data *keypad_data;
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unsigned int id = -1;
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char *oh_name = "kbd";
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char *name = "omap4-keypad";
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oh = omap_hwmod_lookup(oh_name);
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if (!oh) {
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pr_err("Could not look up %s\n", oh_name);
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return -ENODEV;
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}
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keypad_data = sdp4430_keypad_data;
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od = omap_device_build(name, id, oh, keypad_data,
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sizeof(struct omap4_keypad_platform_data),
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omap_keyboard_latency,
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ARRAY_SIZE(omap_keyboard_latency), 0);
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if (IS_ERR(od)) {
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WARN(1, "Can't build omap_device for %s:%s.\n",
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name, oh->name);
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return PTR_ERR(od);
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}
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return 0;
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}
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#if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
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static struct omap_device_pm_latency mbox_latencies[] = {
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[0] = {
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.activate_func = omap_device_enable_hwmods,
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.deactivate_func = omap_device_idle_hwmods,
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.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
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},
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};
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static inline void omap_init_mbox(void)
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{
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struct omap_hwmod *oh;
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struct omap_device *od;
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oh = omap_hwmod_lookup("mailbox");
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if (!oh) {
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pr_err("%s: unable to find hwmod\n", __func__);
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return;
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}
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od = omap_device_build("omap-mailbox", -1, oh, NULL, 0,
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mbox_latencies, ARRAY_SIZE(mbox_latencies), 0);
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WARN(IS_ERR(od), "%s: could not build device, err %ld\n",
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__func__, PTR_ERR(od));
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}
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#else
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static inline void omap_init_mbox(void) { }
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#endif /* CONFIG_OMAP_MBOX_FWK */
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static inline void omap_init_sti(void) {}
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#if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
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static struct platform_device omap_pcm = {
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.name = "omap-pcm-audio",
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.id = -1,
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};
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/*
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* OMAP2420 has 2 McBSP ports
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* OMAP2430 has 5 McBSP ports
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* OMAP3 has 5 McBSP ports
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* OMAP4 has 4 McBSP ports
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*/
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OMAP_MCBSP_PLATFORM_DEVICE(1);
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OMAP_MCBSP_PLATFORM_DEVICE(2);
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OMAP_MCBSP_PLATFORM_DEVICE(3);
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OMAP_MCBSP_PLATFORM_DEVICE(4);
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OMAP_MCBSP_PLATFORM_DEVICE(5);
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static void omap_init_audio(void)
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{
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platform_device_register(&omap_mcbsp1);
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platform_device_register(&omap_mcbsp2);
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if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
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platform_device_register(&omap_mcbsp3);
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platform_device_register(&omap_mcbsp4);
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}
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if (cpu_is_omap243x() || cpu_is_omap34xx())
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platform_device_register(&omap_mcbsp5);
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platform_device_register(&omap_pcm);
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}
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#else
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static inline void omap_init_audio(void) {}
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#endif
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#if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
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#include <plat/mcspi.h>
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struct omap_device_pm_latency omap_mcspi_latency[] = {
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[0] = {
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.deactivate_func = omap_device_idle_hwmods,
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.activate_func = omap_device_enable_hwmods,
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.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
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},
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};
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static int omap_mcspi_init(struct omap_hwmod *oh, void *unused)
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{
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struct omap_device *od;
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char *name = "omap2_mcspi";
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struct omap2_mcspi_platform_config *pdata;
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static int spi_num;
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struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr;
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pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
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if (!pdata) {
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pr_err("Memory allocation for McSPI device failed\n");
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return -ENOMEM;
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}
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pdata->num_cs = mcspi_attrib->num_chipselect;
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switch (oh->class->rev) {
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case OMAP2_MCSPI_REV:
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case OMAP3_MCSPI_REV:
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pdata->regs_offset = 0;
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break;
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case OMAP4_MCSPI_REV:
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pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET;
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break;
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default:
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pr_err("Invalid McSPI Revision value\n");
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return -EINVAL;
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}
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spi_num++;
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od = omap_device_build(name, spi_num, oh, pdata,
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sizeof(*pdata), omap_mcspi_latency,
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ARRAY_SIZE(omap_mcspi_latency), 0);
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WARN(IS_ERR(od), "Can't build omap_device for %s:%s\n",
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name, oh->name);
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kfree(pdata);
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return 0;
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}
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static void omap_init_mcspi(void)
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{
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omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL);
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}
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#else
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static inline void omap_init_mcspi(void) {}
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#endif
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static struct resource omap2_pmu_resource = {
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.start = 3,
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.end = 3,
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.flags = IORESOURCE_IRQ,
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};
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static struct resource omap3_pmu_resource = {
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.start = INT_34XX_BENCH_MPU_EMUL,
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.end = INT_34XX_BENCH_MPU_EMUL,
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.flags = IORESOURCE_IRQ,
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};
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static struct platform_device omap_pmu_device = {
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.name = "arm-pmu",
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.id = ARM_PMU_DEVICE_CPU,
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.num_resources = 1,
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};
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static void omap_init_pmu(void)
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{
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if (cpu_is_omap24xx())
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omap_pmu_device.resource = &omap2_pmu_resource;
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else if (cpu_is_omap34xx())
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omap_pmu_device.resource = &omap3_pmu_resource;
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else
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return;
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platform_device_register(&omap_pmu_device);
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}
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#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
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#ifdef CONFIG_ARCH_OMAP2
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static struct resource omap2_sham_resources[] = {
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{
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.start = OMAP24XX_SEC_SHA1MD5_BASE,
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.end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_24XX_SHA1MD5,
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.flags = IORESOURCE_IRQ,
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}
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};
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static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
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#else
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#define omap2_sham_resources NULL
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#define omap2_sham_resources_sz 0
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#endif
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#ifdef CONFIG_ARCH_OMAP3
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static struct resource omap3_sham_resources[] = {
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{
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.start = OMAP34XX_SEC_SHA1MD5_BASE,
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.end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_34XX_SHA1MD52_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = OMAP34XX_DMA_SHA1MD5_RX,
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.flags = IORESOURCE_DMA,
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}
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};
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static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
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#else
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#define omap3_sham_resources NULL
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#define omap3_sham_resources_sz 0
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#endif
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static struct platform_device sham_device = {
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.name = "omap-sham",
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.id = -1,
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};
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static void omap_init_sham(void)
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{
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if (cpu_is_omap24xx()) {
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sham_device.resource = omap2_sham_resources;
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sham_device.num_resources = omap2_sham_resources_sz;
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} else if (cpu_is_omap34xx()) {
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sham_device.resource = omap3_sham_resources;
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sham_device.num_resources = omap3_sham_resources_sz;
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} else {
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pr_err("%s: platform not supported\n", __func__);
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return;
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}
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platform_device_register(&sham_device);
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}
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#else
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static inline void omap_init_sham(void) { }
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#endif
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#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
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#ifdef CONFIG_ARCH_OMAP2
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static struct resource omap2_aes_resources[] = {
|
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{
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.start = OMAP24XX_SEC_AES_BASE,
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.end = OMAP24XX_SEC_AES_BASE + 0x4C,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = OMAP24XX_DMA_AES_TX,
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.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.start = OMAP24XX_DMA_AES_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
}
|
|
};
|
|
static int omap2_aes_resources_sz = ARRAY_SIZE(omap2_aes_resources);
|
|
#else
|
|
#define omap2_aes_resources NULL
|
|
#define omap2_aes_resources_sz 0
|
|
#endif
|
|
|
|
#ifdef CONFIG_ARCH_OMAP3
|
|
static struct resource omap3_aes_resources[] = {
|
|
{
|
|
.start = OMAP34XX_SEC_AES_BASE,
|
|
.end = OMAP34XX_SEC_AES_BASE + 0x4C,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = OMAP34XX_DMA_AES2_TX,
|
|
.flags = IORESOURCE_DMA,
|
|
},
|
|
{
|
|
.start = OMAP34XX_DMA_AES2_RX,
|
|
.flags = IORESOURCE_DMA,
|
|
}
|
|
};
|
|
static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
|
|
#else
|
|
#define omap3_aes_resources NULL
|
|
#define omap3_aes_resources_sz 0
|
|
#endif
|
|
|
|
static struct platform_device aes_device = {
|
|
.name = "omap-aes",
|
|
.id = -1,
|
|
};
|
|
|
|
static void omap_init_aes(void)
|
|
{
|
|
if (cpu_is_omap24xx()) {
|
|
aes_device.resource = omap2_aes_resources;
|
|
aes_device.num_resources = omap2_aes_resources_sz;
|
|
} else if (cpu_is_omap34xx()) {
|
|
aes_device.resource = omap3_aes_resources;
|
|
aes_device.num_resources = omap3_aes_resources_sz;
|
|
} else {
|
|
pr_err("%s: platform not supported\n", __func__);
|
|
return;
|
|
}
|
|
platform_device_register(&aes_device);
|
|
}
|
|
|
|
#else
|
|
static inline void omap_init_aes(void) { }
|
|
#endif
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
|
|
|
|
static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
|
|
*mmc_controller)
|
|
{
|
|
if ((mmc_controller->slots[0].switch_pin > 0) && \
|
|
(mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
|
|
omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
|
|
OMAP_PIN_INPUT_PULLUP);
|
|
if ((mmc_controller->slots[0].gpio_wp > 0) && \
|
|
(mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
|
|
omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
|
|
OMAP_PIN_INPUT_PULLUP);
|
|
|
|
omap_mux_init_signal("sdmmc_cmd", 0);
|
|
omap_mux_init_signal("sdmmc_clki", 0);
|
|
omap_mux_init_signal("sdmmc_clko", 0);
|
|
omap_mux_init_signal("sdmmc_dat0", 0);
|
|
omap_mux_init_signal("sdmmc_dat_dir0", 0);
|
|
omap_mux_init_signal("sdmmc_cmd_dir", 0);
|
|
if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
|
|
omap_mux_init_signal("sdmmc_dat1", 0);
|
|
omap_mux_init_signal("sdmmc_dat2", 0);
|
|
omap_mux_init_signal("sdmmc_dat3", 0);
|
|
omap_mux_init_signal("sdmmc_dat_dir1", 0);
|
|
omap_mux_init_signal("sdmmc_dat_dir2", 0);
|
|
omap_mux_init_signal("sdmmc_dat_dir3", 0);
|
|
}
|
|
|
|
/*
|
|
* Use internal loop-back in MMC/SDIO Module Input Clock
|
|
* selection
|
|
*/
|
|
if (mmc_controller->slots[0].internal_clock) {
|
|
u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
|
|
v |= (1 << 24);
|
|
omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
|
|
}
|
|
}
|
|
|
|
void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
|
|
{
|
|
char *name = "mmci-omap";
|
|
|
|
if (!mmc_data[0]) {
|
|
pr_err("%s fails: Incomplete platform data\n", __func__);
|
|
return;
|
|
}
|
|
|
|
omap242x_mmc_mux(mmc_data[0]);
|
|
omap_mmc_add(name, 0, OMAP2_MMC1_BASE, OMAP2420_MMC_SIZE,
|
|
INT_24XX_MMC_IRQ, mmc_data[0]);
|
|
}
|
|
|
|
#endif
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
#if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
|
|
#if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430)
|
|
#define OMAP_HDQ_BASE 0x480B2000
|
|
#endif
|
|
static struct resource omap_hdq_resources[] = {
|
|
{
|
|
.start = OMAP_HDQ_BASE,
|
|
.end = OMAP_HDQ_BASE + 0x1C,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
{
|
|
.start = INT_24XX_HDQ_IRQ,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
static struct platform_device omap_hdq_dev = {
|
|
.name = "omap_hdq",
|
|
.id = 0,
|
|
.dev = {
|
|
.platform_data = NULL,
|
|
},
|
|
.num_resources = ARRAY_SIZE(omap_hdq_resources),
|
|
.resource = omap_hdq_resources,
|
|
};
|
|
static inline void omap_hdq_init(void)
|
|
{
|
|
(void) platform_device_register(&omap_hdq_dev);
|
|
}
|
|
#else
|
|
static inline void omap_hdq_init(void) {}
|
|
#endif
|
|
|
|
/*---------------------------------------------------------------------------*/
|
|
|
|
#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
|
|
defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
|
|
#if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
|
|
static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
|
|
};
|
|
#else
|
|
static struct resource omap_vout_resource[2] = {
|
|
};
|
|
#endif
|
|
|
|
static struct platform_device omap_vout_device = {
|
|
.name = "omap_vout",
|
|
.num_resources = ARRAY_SIZE(omap_vout_resource),
|
|
.resource = &omap_vout_resource[0],
|
|
.id = -1,
|
|
};
|
|
static void omap_init_vout(void)
|
|
{
|
|
if (platform_device_register(&omap_vout_device) < 0)
|
|
printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
|
|
}
|
|
#else
|
|
static inline void omap_init_vout(void) {}
|
|
#endif
|
|
|
|
/*-------------------------------------------------------------------------*/
|
|
|
|
static int __init omap2_init_devices(void)
|
|
{
|
|
/*
|
|
* please keep these calls, and their implementations above,
|
|
* in alphabetical order so they're easier to sort through.
|
|
*/
|
|
omap_init_audio();
|
|
omap_init_camera();
|
|
omap_init_mbox();
|
|
omap_init_mcspi();
|
|
omap_init_pmu();
|
|
omap_hdq_init();
|
|
omap_init_sti();
|
|
omap_init_sham();
|
|
omap_init_aes();
|
|
omap_init_vout();
|
|
|
|
return 0;
|
|
}
|
|
arch_initcall(omap2_init_devices);
|
|
|
|
#if defined(CONFIG_OMAP_WATCHDOG) || defined(CONFIG_OMAP_WATCHDOG_MODULE)
|
|
static struct omap_device_pm_latency omap_wdt_latency[] = {
|
|
[0] = {
|
|
.deactivate_func = omap_device_idle_hwmods,
|
|
.activate_func = omap_device_enable_hwmods,
|
|
.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
|
|
},
|
|
};
|
|
|
|
static int __init omap_init_wdt(void)
|
|
{
|
|
int id = -1;
|
|
struct omap_device *od;
|
|
struct omap_hwmod *oh;
|
|
char *oh_name = "wd_timer2";
|
|
char *dev_name = "omap_wdt";
|
|
|
|
if (!cpu_class_is_omap2())
|
|
return 0;
|
|
|
|
oh = omap_hwmod_lookup(oh_name);
|
|
if (!oh) {
|
|
pr_err("Could not look up wd_timer%d hwmod\n", id);
|
|
return -EINVAL;
|
|
}
|
|
|
|
od = omap_device_build(dev_name, id, oh, NULL, 0,
|
|
omap_wdt_latency,
|
|
ARRAY_SIZE(omap_wdt_latency), 0);
|
|
WARN(IS_ERR(od), "Can't build omap_device for %s:%s.\n",
|
|
dev_name, oh->name);
|
|
return 0;
|
|
}
|
|
subsys_initcall(omap_init_wdt);
|
|
#endif
|