linux/arch/powerpc/include/asm/nohash
Aneesh Kumar K.V bd5050e38a powerpc/mm/radix: Change pte relax sequence to handle nest MMU hang
When relaxing access (read -> read_write update), pte needs to be marked invalid
to handle a nest MMU bug. We also need to do a tlb flush after the pte is
marked invalid before updating the pte with new access bits.

We also move tlb flush to platform specific __ptep_set_access_flags. This will
help us to gerid of unnecessary tlb flush on BOOK3S 64 later. We don't do that
in this patch. This also helps in avoiding multiple tlbies with coprocessor
attached.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2018-06-03 20:40:34 +10:00
..
32 powerpc/mm/radix: Change pte relax sequence to handle nest MMU hang 2018-06-03 20:40:34 +10:00
64 powerpc/mm/radix: Change pte relax sequence to handle nest MMU hang 2018-06-03 20:40:34 +10:00
pgalloc.h License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
pgtable.h powerpc/nohash: Use IS_ENABLED() to simplify __set_pte_at() 2018-05-07 20:37:47 +10:00
pte-book3e.h powerpc/nohash: Remove _PAGE_BUSY 2018-05-07 20:37:46 +10:00