mirror of https://gitee.com/openkylin/linux.git
563 lines
14 KiB
C
563 lines
14 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* armadillo5x0.c
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*
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* Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
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* updates in http://alberdroid.blogspot.com/
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*
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* Based on Atmark Techno, Inc. armadillo 500 BSP 2008
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* Based on mx31ads.c and pcm037.c Great Work!
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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#include <linux/gpio.h>
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#include <linux/smsc911x.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/mtd/physmap.h>
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#include <linux/io.h>
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#include <linux/input.h>
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#include <linux/i2c.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/ulpi.h>
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#include <linux/delay.h>
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#include <linux/regulator/machine.h>
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#include <linux/regulator/fixed.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/memory.h>
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#include <asm/mach/map.h>
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#include "common.h"
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#include "devices-imx31.h"
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#include "crmregs-imx3.h"
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#include "ehci.h"
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#include "hardware.h"
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#include "iomux-mx3.h"
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#include "ulpi.h"
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static int armadillo5x0_pins[] = {
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/* UART1 */
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MX31_PIN_CTS1__CTS1,
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MX31_PIN_RTS1__RTS1,
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MX31_PIN_TXD1__TXD1,
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MX31_PIN_RXD1__RXD1,
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/* UART2 */
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MX31_PIN_CTS2__CTS2,
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MX31_PIN_RTS2__RTS2,
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MX31_PIN_TXD2__TXD2,
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MX31_PIN_RXD2__RXD2,
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/* LAN9118_IRQ */
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IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO),
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/* SDHC1 */
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MX31_PIN_SD1_DATA3__SD1_DATA3,
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MX31_PIN_SD1_DATA2__SD1_DATA2,
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MX31_PIN_SD1_DATA1__SD1_DATA1,
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MX31_PIN_SD1_DATA0__SD1_DATA0,
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MX31_PIN_SD1_CLK__SD1_CLK,
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MX31_PIN_SD1_CMD__SD1_CMD,
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/* Framebuffer */
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MX31_PIN_LD0__LD0,
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MX31_PIN_LD1__LD1,
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MX31_PIN_LD2__LD2,
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MX31_PIN_LD3__LD3,
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MX31_PIN_LD4__LD4,
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MX31_PIN_LD5__LD5,
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MX31_PIN_LD6__LD6,
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MX31_PIN_LD7__LD7,
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MX31_PIN_LD8__LD8,
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MX31_PIN_LD9__LD9,
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MX31_PIN_LD10__LD10,
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MX31_PIN_LD11__LD11,
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MX31_PIN_LD12__LD12,
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MX31_PIN_LD13__LD13,
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MX31_PIN_LD14__LD14,
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MX31_PIN_LD15__LD15,
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MX31_PIN_LD16__LD16,
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MX31_PIN_LD17__LD17,
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MX31_PIN_VSYNC3__VSYNC3,
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MX31_PIN_HSYNC__HSYNC,
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MX31_PIN_FPSHIFT__FPSHIFT,
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MX31_PIN_DRDY0__DRDY0,
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IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
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/* I2C2 */
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MX31_PIN_CSPI2_MOSI__SCL,
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MX31_PIN_CSPI2_MISO__SDA,
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/* OTG */
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MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
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MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
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MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
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MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
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MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
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MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
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MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
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MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
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MX31_PIN_USBOTG_CLK__USBOTG_CLK,
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MX31_PIN_USBOTG_DIR__USBOTG_DIR,
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MX31_PIN_USBOTG_NXT__USBOTG_NXT,
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MX31_PIN_USBOTG_STP__USBOTG_STP,
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/* USB host 2 */
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IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
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IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
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};
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/* USB */
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#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
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#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
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#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
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#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
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PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
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static int usbotg_init(struct platform_device *pdev)
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{
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int err;
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
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/* Chip already enabled by hardware */
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/* OTG phy reset*/
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err = gpio_request(OTG_RESET, "USB-OTG-RESET");
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if (err) {
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pr_err("Failed to request the usb otg reset gpio\n");
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return err;
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}
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err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
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if (err) {
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pr_err("Failed to reset the usb otg phy\n");
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goto otg_free_reset;
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}
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gpio_set_value(OTG_RESET, 0/*LOW*/);
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mdelay(5);
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gpio_set_value(OTG_RESET, 1/*HIGH*/);
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mdelay(10);
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return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
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MXC_EHCI_INTERFACE_DIFF_UNI);
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otg_free_reset:
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gpio_free(OTG_RESET);
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return err;
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}
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static int usbh2_init(struct platform_device *pdev)
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{
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int err;
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mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
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mxc_iomux_set_gpr(MUX_PGP_UH2, true);
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/* Enable the chip */
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err = gpio_request(USBH2_CS, "USB-H2-CS");
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if (err) {
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pr_err("Failed to request the usb host 2 CS gpio\n");
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return err;
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}
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err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
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if (err) {
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pr_err("Failed to drive the usb host 2 CS gpio\n");
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goto h2_free_cs;
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}
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/* H2 phy reset*/
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err = gpio_request(USBH2_RESET, "USB-H2-RESET");
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if (err) {
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pr_err("Failed to request the usb host 2 reset gpio\n");
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goto h2_free_cs;
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}
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err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
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if (err) {
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pr_err("Failed to reset the usb host 2 phy\n");
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goto h2_free_reset;
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}
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gpio_set_value(USBH2_RESET, 0/*LOW*/);
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mdelay(5);
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gpio_set_value(USBH2_RESET, 1/*HIGH*/);
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mdelay(10);
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return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED |
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MXC_EHCI_INTERFACE_DIFF_UNI);
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h2_free_reset:
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gpio_free(USBH2_RESET);
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h2_free_cs:
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gpio_free(USBH2_CS);
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return err;
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}
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static struct mxc_usbh_platform_data usbotg_pdata __initdata = {
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.init = usbotg_init,
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.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
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};
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static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
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.init = usbh2_init,
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.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
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};
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/* RTC over I2C*/
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#define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
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static struct i2c_board_info armadillo5x0_i2c_rtc = {
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I2C_BOARD_INFO("s35390a", 0x30),
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};
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/* GPIO BUTTONS */
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static struct gpio_keys_button armadillo5x0_buttons[] = {
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{
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.code = KEY_ENTER, /*28*/
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.gpio = IOMUX_TO_GPIO(MX31_PIN_SCLK0),
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.active_low = 1,
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.desc = "menu",
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.wakeup = 1,
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}, {
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.code = KEY_BACK, /*158*/
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.gpio = IOMUX_TO_GPIO(MX31_PIN_SRST0),
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.active_low = 1,
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.desc = "back",
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.wakeup = 1,
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}
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};
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static const struct gpio_keys_platform_data
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armadillo5x0_button_data __initconst = {
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.buttons = armadillo5x0_buttons,
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.nbuttons = ARRAY_SIZE(armadillo5x0_buttons),
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};
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/*
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* NAND Flash
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*/
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static const struct mxc_nand_platform_data
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armadillo5x0_nand_board_info __initconst = {
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.width = 1,
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.hw_ecc = 1,
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};
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/*
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* MTD NOR Flash
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*/
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static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
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{
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.name = "nor.bootloader",
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.offset = 0x00000000,
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.size = 4*32*1024,
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}, {
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.name = "nor.kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = 16*128*1024,
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}, {
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.name = "nor.userland",
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.offset = MTDPART_OFS_APPEND,
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.size = 110*128*1024,
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}, {
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.name = "nor.config",
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.offset = MTDPART_OFS_APPEND,
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.size = 1*128*1024,
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},
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};
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static const struct physmap_flash_data
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armadillo5x0_nor_flash_pdata __initconst = {
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.width = 2,
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.parts = armadillo5x0_nor_flash_partitions,
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.nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
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};
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static const struct resource armadillo5x0_nor_flash_resource __initconst = {
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.flags = IORESOURCE_MEM,
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.start = MX31_CS0_BASE_ADDR,
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.end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
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};
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/*
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* FB support
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*/
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static const struct fb_videomode fb_modedb[] = {
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{ /* 640x480 @ 60 Hz */
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.name = "CRT-VGA",
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.refresh = 60,
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.xres = 640,
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.yres = 480,
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.pixclock = 39721,
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.left_margin = 35,
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.right_margin = 115,
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.upper_margin = 43,
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.lower_margin = 1,
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.hsync_len = 10,
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.vsync_len = 1,
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.sync = FB_SYNC_OE_ACT_HIGH,
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.vmode = FB_VMODE_NONINTERLACED,
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.flag = 0,
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}, {/* 800x600 @ 56 Hz */
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.name = "CRT-SVGA",
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.refresh = 56,
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.xres = 800,
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.yres = 600,
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.pixclock = 30000,
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.left_margin = 30,
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.right_margin = 108,
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.upper_margin = 13,
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.lower_margin = 10,
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.hsync_len = 10,
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.vsync_len = 1,
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.sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_HOR_HIGH_ACT |
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FB_SYNC_VERT_HIGH_ACT,
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.vmode = FB_VMODE_NONINTERLACED,
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.flag = 0,
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},
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};
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static struct mx3fb_platform_data mx3fb_pdata __initdata = {
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.name = "CRT-VGA",
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.mode = fb_modedb,
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.num_modes = ARRAY_SIZE(fb_modedb),
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};
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/*
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* SDHC 1
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* MMC support
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*/
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static int armadillo5x0_sdhc1_get_ro(struct device *dev)
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{
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return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
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}
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static int armadillo5x0_sdhc1_init(struct device *dev,
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irq_handler_t detect_irq, void *data)
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{
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int ret;
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int gpio_det, gpio_wp;
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gpio_det = IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK);
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gpio_wp = IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B);
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ret = gpio_request(gpio_det, "sdhc-card-detect");
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if (ret)
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return ret;
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gpio_direction_input(gpio_det);
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ret = gpio_request(gpio_wp, "sdhc-write-protect");
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if (ret)
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goto err_gpio_free;
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gpio_direction_input(gpio_wp);
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/* When supported the trigger type have to be BOTH */
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ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)),
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detect_irq, IRQF_TRIGGER_FALLING,
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"sdhc-detect", data);
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if (ret)
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goto err_gpio_free_2;
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return 0;
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err_gpio_free_2:
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gpio_free(gpio_wp);
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err_gpio_free:
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gpio_free(gpio_det);
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return ret;
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}
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static void armadillo5x0_sdhc1_exit(struct device *dev, void *data)
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{
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free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK)), data);
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gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_DMACK));
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gpio_free(IOMUX_TO_GPIO(MX31_PIN_ATA_RESET_B));
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}
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static const struct imxmmc_platform_data sdhc_pdata __initconst = {
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.get_ro = armadillo5x0_sdhc1_get_ro,
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.init = armadillo5x0_sdhc1_init,
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.exit = armadillo5x0_sdhc1_exit,
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};
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/*
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* SMSC 9118
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* Network support
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*/
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static struct resource armadillo5x0_smc911x_resources[] = {
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{
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.start = MX31_CS3_BASE_ADDR,
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.end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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}, {
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/* irq number is run-time assigned */
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
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},
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};
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static struct smsc911x_platform_config smsc911x_info = {
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.flags = SMSC911X_USE_16BIT,
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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};
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|
|
|
static struct platform_device armadillo5x0_smc911x_device = {
|
|
.name = "smsc911x",
|
|
.id = -1,
|
|
.num_resources = ARRAY_SIZE(armadillo5x0_smc911x_resources),
|
|
.resource = armadillo5x0_smc911x_resources,
|
|
.dev = {
|
|
.platform_data = &smsc911x_info,
|
|
},
|
|
};
|
|
|
|
/* UART device data */
|
|
static const struct imxuart_platform_data uart_pdata __initconst = {
|
|
.flags = IMXUART_HAVE_RTSCTS,
|
|
};
|
|
|
|
static struct platform_device *devices[] __initdata = {
|
|
&armadillo5x0_smc911x_device,
|
|
};
|
|
|
|
static struct regulator_consumer_supply dummy_supplies[] = {
|
|
REGULATOR_SUPPLY("vdd33a", "smsc911x"),
|
|
REGULATOR_SUPPLY("vddvario", "smsc911x"),
|
|
};
|
|
|
|
/*
|
|
* Perform board specific initializations
|
|
*/
|
|
static void __init armadillo5x0_init(void)
|
|
{
|
|
imx31_soc_init();
|
|
|
|
mxc_iomux_setup_multiple_pins(armadillo5x0_pins,
|
|
ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
|
|
|
|
regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
|
|
|
|
imx31_add_imx_i2c1(NULL);
|
|
|
|
/* Register UART */
|
|
imx31_add_imx_uart0(&uart_pdata);
|
|
imx31_add_imx_uart1(&uart_pdata);
|
|
|
|
/* Register FB */
|
|
imx31_add_ipu_core();
|
|
imx31_add_mx3_sdc_fb(&mx3fb_pdata);
|
|
|
|
/* Register NOR Flash */
|
|
platform_device_register_resndata(NULL, "physmap-flash", -1,
|
|
&armadillo5x0_nor_flash_resource, 1,
|
|
&armadillo5x0_nor_flash_pdata,
|
|
sizeof(armadillo5x0_nor_flash_pdata));
|
|
|
|
/* Register NAND Flash */
|
|
imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
|
|
|
|
/* set NAND page size to 2k if not configured via boot mode pins */
|
|
imx_writel(imx_readl(mx3_ccm_base + MXC_CCM_RCSR) | (1 << 30),
|
|
mx3_ccm_base + MXC_CCM_RCSR);
|
|
}
|
|
|
|
static void __init armadillo5x0_late(void)
|
|
{
|
|
armadillo5x0_smc911x_resources[1].start =
|
|
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
|
|
armadillo5x0_smc911x_resources[1].end =
|
|
gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_0));
|
|
platform_add_devices(devices, ARRAY_SIZE(devices));
|
|
|
|
imx_add_gpio_keys(&armadillo5x0_button_data);
|
|
|
|
/* SMSC9118 IRQ pin */
|
|
gpio_direction_input(MX31_PIN_GPIO1_0);
|
|
|
|
/* Register SDHC */
|
|
imx31_add_mxc_mmc(0, &sdhc_pdata);
|
|
|
|
/* RTC */
|
|
/* Get RTC IRQ and register the chip */
|
|
if (!gpio_request(ARMADILLO5X0_RTC_GPIO, "rtc")) {
|
|
if (!gpio_direction_input(ARMADILLO5X0_RTC_GPIO))
|
|
armadillo5x0_i2c_rtc.irq =
|
|
gpio_to_irq(ARMADILLO5X0_RTC_GPIO);
|
|
else
|
|
gpio_free(ARMADILLO5X0_RTC_GPIO);
|
|
}
|
|
|
|
if (armadillo5x0_i2c_rtc.irq == 0)
|
|
pr_warn("armadillo5x0_init: failed to get RTC IRQ\n");
|
|
i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
|
|
|
|
/* USB */
|
|
usbotg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
|
ULPI_OTG_DRVVBUS_EXT);
|
|
if (usbotg_pdata.otg)
|
|
imx31_add_mxc_ehci_otg(&usbotg_pdata);
|
|
usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
|
|
ULPI_OTG_DRVVBUS_EXT);
|
|
if (usbh2_pdata.otg)
|
|
imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
|
|
}
|
|
|
|
static void __init armadillo5x0_timer_init(void)
|
|
{
|
|
mx31_clocks_init(26000000);
|
|
}
|
|
|
|
MACHINE_START(ARMADILLO5X0, "Armadillo-500")
|
|
/* Maintainer: Alberto Panizzo */
|
|
.atag_offset = 0x100,
|
|
.map_io = mx31_map_io,
|
|
.init_early = imx31_init_early,
|
|
.init_irq = mx31_init_irq,
|
|
.init_time = armadillo5x0_timer_init,
|
|
.init_machine = armadillo5x0_init,
|
|
.init_late = armadillo5x0_late,
|
|
.restart = mxc_restart,
|
|
MACHINE_END
|